Patents Assigned to National Applied Research Laboratories
  • Publication number: 20110232221
    Abstract: A buckling restrained brace is for connection between two connecting plates of a framework, and includes a restraining unit and an axial member. The axial member includes a middle section surrounded by the restraining unit, two first coupling sections, and two second coupling sections. The first coupling sections are connected respectively and perpendicularly to opposite longitudinal end portions of the middle section. Each first coupling section has a portion exposed from a respective one of longitudinal ends of the restraining unit, and is formed with a first coupling groove for engaging a respective one of the connecting plates. The second coupling sections are connected respectively and perpendicularly to the opposite longitudinal ends of the middle section. Each second coupling section has a portion exposed from a respective one of the longitudinal end portions of the restraining unit, and is formed with a second coupling groove for engaging a respective one of the connecting plates.
    Type: Application
    Filed: June 17, 2010
    Publication date: September 29, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Keh-Chyuan TSAI, Pao-Chun LIN, Chih-Yu WEI, An-Chien WU
  • Publication number: 20110235326
    Abstract: The present invention provides an apparatus for controlling a three-dimensional optical field. The apparatus includes a light-emission device and a set of zoom elements. The light-emission device emits a light. The set of zoom elements are disposed in front of the light-emission device, and focus the light from the light-emission device.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 29, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORY
    Inventors: Jerliang Yeh, Ling-Yu Tsai, Min-Wei Hung, Chi-Hung Huang, Yu-Cheng Su
  • Publication number: 20110188210
    Abstract: A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.
    Type: Application
    Filed: April 1, 2010
    Publication date: August 4, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chin-Long Wey, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Chi-Sheng Lin
  • Publication number: 20110181245
    Abstract: The present invention discloses a unitized charging and discharging battery management system and a programmable battery management module thereof The unitized charging and discharging battery management system includes a smart battery module and a programmable battery management module, which has a universal loop and a control unit. The smart battery module has at least two smart batteries which are electrically connected by a plurality of switches and circuits of the universal loop to form a charging/discharging loop in series/parallel. The control unit monitors the charging and discharging status of the smart batteries to turn on or off the switches accordingly, so as to manage the smart batteries, thereby enhancing the overall power efficacy of the smart battery module. Besides, the service life of the smart battery module is also prolonged due to the simultaneous charging and discharging capability.
    Type: Application
    Filed: March 22, 2010
    Publication date: July 28, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories.
    Inventors: Chin-Long Wey, Chun-Ming Huang, Shih-Lun Chen, Chi-Sheng Lin, Ting-Hsu Chien, Jiann-Jenn Wang
  • Publication number: 20110168940
    Abstract: The present invention discloses a composition for enhancing evaporation of a solution and a method thereof. A far-infrared ray is released by a far-infrared releasing substance in the composition so as to induce evaporation of the solution. The far-infrared releasing substance may be ceramic minerals and mainly comprises 80˜99.9 wt % of oxide minerals including 60˜95 wt % of the aluminum oxide. The present invention can enhance evaporation of the solution by a simple physical method. Hence, the present invention not only promotes the application of the products but also reduces the pollutants generated by a chemical reaction, thereby achieving the object of protecting the environment from the pollution.
    Type: Application
    Filed: February 23, 2010
    Publication date: July 14, 2011
    Applicants: NATIONAL APPLIED RESEARCH LABORATORIES, TAIPEI MEDICAL UNIVERSITY
    Inventors: YUNG-SHENG LIN, TING-KAI LEUNG, CHIEN-CHUNG CHEN, JIANN-SHIUN KAO
  • Publication number: 20110169056
    Abstract: A hydrogen ion-sensitive field effect transistor and a manufacturing method thereof are provided. The hydrogen ion-sensitive field effect transistor includes a semiconductor substrate, an insulating layer, a transistor gate, and a sensing film. A gate area is defined on the semiconductor substrate having a source area and a drain area. The insulating layer is formed within the gate area on the semiconductor substrate. The transistor gate is deposited within the gate area and includes a first gate layer. Further, the first gate layer is an aluminum layer, and a sensing window is defined thereon. The sensing film is an alumina film formed within the sensing window by oxidizing the first gate layer. Thus, the sensing film is formed without any film deposition process, and consequently the manufacturing method is simplified.
    Type: Application
    Filed: March 16, 2010
    Publication date: July 14, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories.
    Inventors: Chin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huei Tsai, Chen-Fu Lin
  • Publication number: 20110159547
    Abstract: The present invention discloses a polymerase chain reaction (PCR) method, a PCR droplet device and a PCR droplet device array. The steps of the method comprise that a liquid comprising an analyzer is dropped on the heating coil disposed on the droplet device to form a droplet, then dropping a hydrophobic solution to prevent the droplet from evaporating. When an electric current or a voltage is supplied through at least one conducting wire to heat the heating coil, the inside of the droplet can generate buoyancy to drive the analyzer to move to the top of the inside of the droplet. Subsequently, the analyzer is moved to a periphery of the inside of the droplet so as to form a thermal cycle. Therefore the template is amplified by recycling the thermal cycle.
    Type: Application
    Filed: February 10, 2010
    Publication date: June 30, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: CHIH-SHENG YU, YI-CHIUEM HU, FAN-GANG TSENG
  • Publication number: 20110158861
    Abstract: The present invention discloses a volatility-type isolation and purification device comprising a substrate and at least one separation region. The surface of the at least one separation region comprises at least one immobilization layer. When a mixture solution comprising at least one substance to be separated is dropped on the at least one separation region, the substances to be separated each is immobilized on the immobilization layer respectively by the volatility or hysteresis of the mixture solution itself.
    Type: Application
    Filed: February 10, 2010
    Publication date: June 30, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: CHIH-SHENG YU, YI-CHIUEM HU, FANG-GANG TSENG
  • Patent number: 7969563
    Abstract: A lens measuring device and method applied therein. The lens measuring device includes a light source, a first polarizer, a second polarizer, and an image analysis module. The method includes enabling the light source to orderly pass through the first polarizer, a lens to be measured, and the second polarizer to generate a light beam to be measured, and then enabling the image analysis module to analyze image-related information of the light beam to be measured, consequently deducing the structural center and energy distribution of the lens to be measured, and then further analyzing errors in polarity and skewness of the lens to be measured. By applying a common light source, the method is spared complicated correction that is otherwise required when a conventional collimating laser light source is applied, and the method can also easily and simultaneously test a plurality of lenses to be measured.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: June 28, 2011
    Assignees: National Taiwan University, National Applied Research Laboratories
    Inventors: Chien-Ching Ma, Ching-Yuan Chang, Kuo-Cheng Huang, Shih-Feng Tseng
  • Publication number: 20110138248
    Abstract: A method for arranging memories of a low-complexity low-density parity-check (LDPC) decoder and a low-complexity LDPC decoder using the same method are provided. The main idea of the method for arranging memories of a low-complexity LDPC decoder is to merge at least one or two small-capacity memory blocks into one memory group, so that the memory area can be reduced and the power consumption in reading or writing data is lowered. Besides, as the merged memory group shares the same address line in reading or writing data, at least one delay unit is used to adjust the reading or writing order and thereby ensure data validity. A low-complexity LDPC decoder using the disclosed method can meet the demands of high processing rate and low power consumption.
    Type: Application
    Filed: February 18, 2010
    Publication date: June 9, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chien-Ming Wu, Ming-Der Shieh, Chun-Ming Huang, Chi-Sheng Lin, Shih-Hao Fang, Shing-Chung Tang
  • Publication number: 20110133256
    Abstract: The present invention discloses a CMOS-MEMS cantilever structure. The CMOS-MEMS cantilever structure includes a substrate, a circuit structure, and a cantilever beam. The substrate has a circuit area and a sensor unit area defined thereon. The circuit structure is formed in the circuit area. The cantilever beam is disposed in the sensor unit area with one end floating above the substrate and the other end connecting to the circuit structure. With the above arrangement, the manufacturing process of CMOS-MEMS cantilever structure of this invention can be simplified. Furthermore, the structure of the cantilever beam is thinned down and therefore has a higher sensitivity.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 9, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chin-Fong Chiu, Ying Zong Juang, Hann Huei Tsai, Sheng-Hsiang Tseng, Chen-Fu Lin
  • Patent number: 7952782
    Abstract: An observing device for observing a flow field in a detection space is provided. The observing device includes a light source generating a light beam, a light-deflecting device deflecting the light beam, and a light sheet-generating component receiving the light beam deflected by the light-deflecting device and generating a light sheet in the detection space corresponding to the deflected light beam.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: May 31, 2011
    Assignee: National Applied Research Laboratories
    Inventor: Po-Hsuan Huang
  • Publication number: 20110117747
    Abstract: A method of fabricating a single chip for integrating a field-effect transistor into a microelectromechanical systems (MEMS) structure is provided. The method includes the steps of: providing a substrate having thereon at least one transistor structure, a MEMS structure and a blocking structure, wherein the blocking structure encircles the MEMS structure to separate the MEMS structure from the transistor structure; forming a masking layer for covering the transistor structure, the MEMS structure and the blocking structure; forming a patterned photoresist layer on the masking layer; performing a first etching process by using the patterned photoresist layer to remove the masking layer on the MEMS structure; and performing a second etching process by removing a portion of the MEMS structure to form a plurality of microstructures such that a relative motion among the microstructures takes place in a direction perpendicular to the substrate.
    Type: Application
    Filed: January 5, 2010
    Publication date: May 19, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huei Tsai, Sheng-Hsiang Tseng, Hsin-Hao Liao
  • Patent number: 7940483
    Abstract: A focusing device is provided. The focusing device has a changing focal length along a physical parameter thereof. The focusing device could be annular or in a shape of a disk. The annular focusing device has a width thereof changing with a periphery thereof, and the disk-shaped focusing device has a thickness, wherein the thickness of the disk-shaped focusing device is changing with an angular position thereof.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 10, 2011
    Assignee: National Applied Research Laboratories
    Inventor: Po-Hsuan Huang
  • Publication number: 20110096506
    Abstract: A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.
    Type: Application
    Filed: January 12, 2010
    Publication date: April 28, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, Chi-Sheng Lin
  • Patent number: 7919724
    Abstract: A cutting device for cutting a hard-brittle material along a cutting path is provided. The cutting device includes a cooling source having a first output terminal for providing a first cooling effect along the cutting path, and a heating source having a second output terminal disposed in the first output terminal for providing a heating effect following the first cooling effect along the cutting path.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: April 5, 2011
    Assignee: National Applied Research Laboratories
    Inventors: Kuo-Cheng Huang, Chien-Yao Huang, Shih-Feng Tseng, Wen-Hong Wu
  • Patent number: 7906155
    Abstract: A method for increasing an amount of effective constituents from a plant in a solvent is provided. The method comprises steps of treating the solvent with a far-infrared radiating (FIR) material and extracting the effective constituents from the plant by the treated solvent for increasing the amount of the effective constituents dissolved in the solvent.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: March 15, 2011
    Assignees: National Applied Research Laboratories, Taipei Medical University
    Inventors: Kai-Hsuan Chang, Ming-Yu Lin, Yung-Sheng Lin, Ting-Kai Leung
  • Publication number: 20110046701
    Abstract: The present invention provides a composition used for increasing calmodulin and a method thereof. A far-infrared ray is released by a far-infrared releasing substance in the composition so as to induce intracellular calmodulin concentration increased in organisms. The far-infrared releasing substance consists of ceramic minerals and mainly comprises 80-99.9 wt % of oxide minerals including 60-95 wt % of the mineral alumina. The far-infrared releasing substance according to the present invention has the advantages of easy to carry and continuously working, so as to significantly improve the shortcoming of drugs with short-term acting.
    Type: Application
    Filed: September 18, 2009
    Publication date: February 24, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Yung-Sheng Lin, Ting-Kai Leung, Jiann-Shiun Kao
  • Publication number: 20110044509
    Abstract: The present invention discloses a bridge structural safety monitoring system and a bridge structural safety monitoring method. The method includes the steps of capturing an image of a monitoring area of a bridge to create a standard image of the bridge operated at normal conditions, capturing images of the monitoring area of the bridge continuously to obtain monitoring images, comparing the standard image with the monitoring image to obtain a displacement correlation coefficient of the monitoring area of the bridge, and transmitting the displacement correlation coefficient to a central console, such that the central console can determine the using condition of the bridge according to the displacement correlation coefficient.
    Type: Application
    Filed: October 2, 2009
    Publication date: February 24, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chi-Hung Huang, Wei-Chieh Chiang, Tai-Shan Liao, Chia-Wei Hsu, Jen-Yu Wen, Tzu-Hsuan Wei, Yung-Hsiang Chen
  • Publication number: 20110045466
    Abstract: The present invention discloses a field-effect transistor (FET) type biosensor and a bio-signal amplification method. The biosensor comprises a field-effect transistor chip, a biomolecular immobilization layer and at least one primer. The biomolecular immobilization layer is formed on a gate surface of the FET chip or a surface of an external device connected to a gate. The primer used for performing a nucleic acid amplification is immobilized onto the gate surface or the external device surface by binding with the biomolecular immobilization layer, such that an analyte can have a nucleic acid amplification reaction with the primer at room temperature or a constant temperature environment. With an extension of a nucleic acid sequence, the inducing electricity of the FET gate surface can be increased so as to amplify an inspection signal, thereby enhancing the sensitivity of the FET type biosensor effectively.
    Type: Application
    Filed: October 2, 2009
    Publication date: February 24, 2011
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Ming-Yu Lin, Yuh-Shyong Yang, Hsin Chen