Abstract: A method for cutting a nonmetal material is provided. The method includes steps of (a) generating a tension stress on a surface of the nonmetal material by exerting a bending stress thereon; (b) providing a thermal effect along a path direction on the surface, wherein the thermal effect grows along a direction opposite to the path direction; (c) providing a first cryogenic effect in a first incident direction along the path direction; and (d) providing a second cryogenic effect in a second incident direction along the path direction, wherein a crack along the path direction on the surface is formed as a result of the tension stress, the thermal effect, and the cryogenic effects therealong for cutting the nonmetal material.

Abstract: A fabrication method for a system-on-chip (SoC) module is provided. The fabrication method includes the steps of providing at least two SoC sub-modules and connecting the SoC sub-modules. The SoC sub-modules are electrically connected with each other by connection interfaces of the SoC sub-modules so as to form the SoC module. As the SoC sub-modules have been verified in advance, the time required for verifying the resulting SoC module can be significantly reduced. As for application-specific SoC modules, they are fabricated by connecting with application-specific SoC sub-modules via the appropriate connection interfaces. Thus, the time and costs for developing SoC modules can both be minimized.

Abstract: An edge-missing detector structure includes a first detector, a first delay unit, a first logic gate, a second detector, a second delay unit, and a second logic gate. After being input separately into the edge-missing detector structure, a first reference signal and a first clock signal are detected by the first and second detectors and then subjected to cycle suppression by the first and second logic gates, respectively, so as to generate a second reference signal and a second clock signal which present a phase difference less than 2?. Moreover, the edge-missing detector structure generates a compensative current corresponding to the number of occurrences of cycle suppression. Thus, a phase-locked loop (PLL) using the edge-missing detector structure can avoid cycle slip problems and achieve fast acquisition of phase lock.

Abstract: A method to generate random and density controllable dot patterns on an optical device includes steps of dividing a 2D domain into multiple cell units; determining dot density in each cell; creating at random initial location of dots in each cell; solving the force operation cut radius of the dot; setting up a residual force; solving the force control parameter in the cell; performing the force operation for the cell; making the dots in the cell to achieve balanced positions after repeated operation; completing the generation of a dot pattern within a 2D domain; and so transferring the dot pattern to the optical device by a transfer printing equipment.

Abstract: A liquid level detection method includes capturing an image of a liquid surface, a structural surface, and graduation markings provided on the structural surface using an image-capturing device to thereby obtain an initial image. Subsequently, the initial image is processed so as to generate a processed image, and a level reference value of the liquid surface is obtained from the processed image. The level reference value represents a height of the liquid surface in terms of inherent characteristics of the processed image. Lastly, a liquid level of the liquid surface is calculated based on a relative proportional relation among the level reference value, an overall height of the processed image interms of the inherent characteristics of the processed image, and dimensions of any one of the initial and processed images relative to the graduation markings.

Abstract: A programmable frequency divider with a full dividing range includes a plurality of cascaded 2/1 frequency dividers. Each of the 2/1 frequency dividers has a first input node, a first output node, a second input node, a second output node and a third input node. The first input node receives a first clock signal divided by the 2/1 frequency divider and outputted as a second clock signal through the first output node. A second logical signal is generated according to the second clock signal, the first clock signal and a first logical signal received from the second input node. The 2/1 frequency divider selectively switches to perform a divide-by-two or divide-by-one operation according to the second logical signal and a first divisor signal received from the third input nodes. The programmable frequency divider provides the full dividing range as the result of utilizing various divisor of the 2/1 frequency divider.

Abstract: An auto focus device and method are provided. The device comprises a beam splitter set; a laser emitting device disposed at a first side of the beam splitter set for providing a laser beam to the beam splitter; a lens set disposed at a second side of the beam splitter set and opposing to the testing subject positioned at a third side of the beam splitter set for refracting a reflected beam from a testing subject for generating a light spot; and a photo detecting device disposed with respect to the lens set for receiving the light spot and generating a driving signal.

Abstract: A Ge epitaxial layer is grown on a silicon substrate with a patterned structure. Through a cyclic annealing, dislocation defects are confined. The present invention provides a method for manufacturing a high-quality Ge epitaxial layer with a low cost and a simple procedure. The Ge epitaxial layer obtained can be applied to high mobility Ge devices or any lattice-mismatched epitaxy on a photonics device.

Abstract: The present invention provides a method and an apparatus for producing a two-dimensional patterned beam, e.g. a two-dimensional patterned and focused ion beam, for fabricating a nano-structure on a substrate with the precursor gas. In comparison with the conventional focused ion beam that is applied for fabricating a dot-like nano-structure the method is more simplified and easy to be achieved.

Abstract: The present invention relates to methods for searching and constructing a 3D motif image database, wherein said 3D motif image database can be used to understand the connection relationship of a 3D network, e.g. a neural network comprising biological neural networks or artificial neural networks. The searching and constructing methods are applied on the 3D motif image database, a proper computer-aided graphic platform. The database not only facilitates the management of the huge amount of categorized data but also rationally excavates the hidden information cloaked within.

Abstract: An edge-missing detector structure includes a first detector, a first delay unit, a first logic gate, a second detector, a second delay unit, and a second logic gate. After being input separately into the edge-missing detector structure, a first reference signal and a first clock signal are detected by the first and second detectors and then subjected to cycle suppression by the first and second logic gates, respectively, so as to generate a second reference signal and a second clock signal which present a phase difference less than 2?. Moreover, the edge-missing detector structure generates a compensative current corresponding to the number of occurrences of cycle suppression. Thus, a phase-locked loop (PLL) using the edge-missing detector structure can avoid cycle slip problems and achieve fast acquisition of phase lock.

Abstract: A lithographic machine platform and applications thereof is disclosed. The lithographic machine platform comprises: an electron beam or an ion beam generator generating an electron beam or an ion beam; a substrate supporting platform supporting a substrate; and a precursory gas injector injecting a precursory gas above the substrate. The present invention uses the electron beam or the ion beam to induce the precursory gas to react with the electron beam or the ion beam, and then the precursory gas is deposited on the substrate. The present invention not only fabricates a patterned layer on the substrate in a single step but also achieves a high lithographic resolution and avoids remains of contaminations by using the properties of the electron beam or the ion beam and the precursory gas.

Abstract: A mesoporous silica having adjustable pores is obtained to form a template and thus a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) photodetector is obtained. A gate dielectric of a nano-structural silicon-base membrane is used as infrared light absorber in it. Thus, a semiconductor photodetector made of pure silicon having a quantum-dot structure is obtained with excellent near-infrared optoelectronic response.

Abstract: A Ge epitaxial layer is grown on a silicon substrate with a patterned structure. Through a cyclic annealing, dislocation defects are confined. The present invention provides a method for manufacturing a high-quality Ge epitaxial layer with a low cost and a simple procedure. The Ge epitaxial layer obtained can be applied to high mobility Ge devices or any lattice-mismatched epitaxy on a photonics device.

Abstract: An adapter for RF front end processor chip wherein the RF front end processor chip includes a low noise amplifier which is used to receive a RF filter signal so as to generate a first signal. An adapter is used to receive a first signal so as to induce and generate a second signal and a third signal which is electrically reverse. Then a frequency mixer of the RF front end processor chip is used to receive the second signal and the third signal and a resonant signal, the second signal and the third signal are used to generate a medium frequency signal. Wherein, adapter includes a primary measured coil.

Abstract: The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound is used to package the common die which electrically connects to the substrate and the custom interface respectively. The carrier structure which includes the common die can form a complete SoC by connecting to an expansive die through the custom interface. The carrier structure with the common die which can be tested and certified in advance allows reducing and simplifying the developing procedures of the SoC.

Abstract: A high-accuracy and computational efficient phase-discriminating device is provided and includes a phase-discriminating unit. The phase-discriminating unit converts an input and a reference signals into an input and a reference sequences respectively by a one-bit A/D conversion operation, determines a first value, an in-phase component and a quadrature component of the input signal in response to the input and the reference sequences, and produces an estimated phase of the input signal according to a relation among the first value, the in-phase component and a polarity of the quadrature component, wherein the first value is a certain integer being one of a first integer and a second integer, the first integer is a sampling count of the one-bit A/D conversion operation for producing the input sequence, and the second integer is a summation of an absolute value of the in-phase component and that of the quadrature component.

Abstract: An electrospinning equipment is provided. The electrospinning equipment includes a power supply, a collector and a material supply electrically connected to the power supply facing the collector and having a spinneret and a guide unit coupled to the spinneret and bent toward the collector, and the spinneret is configured at a central portion of the guide unit.

Abstract: The present invention relates to a brightness enhancement film and a backlight module having the brightness enhancement film. The brightness enhancement film includes first micro-reflectors and second micro-reflectors. The cross-section of each of the first and second micro-reflectors is a triangle having two same or different base angles and a wavy crest line. The widths of the first and second micro-reflectors vary along with the valleys and peaks to broaden or to narrow with respect to two sides thereof such that the neighboring lines between the first and second micro-reflectors are wavy. The backlight module is coupled with the brightness enhancement film. This enhances brightness, illuminates evenly, and avoids a moire effect.

Abstract: A biochip package structure is provided. The biochip package structure includes a substrate, a biochip, at least one wire, and a molding compound. The substrate has a circuit unit electrically connected, by wiring, to the biochip defined with a sensing region. The molding compound covers the wire but leaves the sensing region of the biochip exposed, allowing a cavity to be formed in the sensing region. The cavity delivers a biomedical sample. The biomedical sample reacts in the sensing region. Thus, the biochip package structure is applicable to various medical and biochemical assays.