Patents Assigned to NEC
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Publication number: 20100115285Abstract: Each participant apparatus (103) encrypts a plaintext by using a secret key of secret key cryptography, encrypts the encryption key by a public key, and sends the plaintext and public key to a substitution/decryption apparatus (112). With this processing, the limitation on the length of a ciphertext to be processed can be eliminated. In this invention, a verifiable proof text using a public key by each substitution/decryption apparatus is verified by a verification apparatus (109) by using the public key. If one of a plurality of organizations to decrypt and shuffle ciphertexts has not correctly executed the operation, a third party can specify it and prove that the specified organization is unauthorized.Type: ApplicationFiled: January 8, 2010Publication date: May 6, 2010Applicant: NEC CORPORATIONInventors: JUN FURUKAWA, KAZUE SAKO
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Publication number: 20100114484Abstract: Provided is a general-purpose map matching system enabling high-speed map matching while maintaining a precision of an analysis based on a map matching result even when event data is transmitted from numerous vehicles. The grid road generation unit 8 generates each grid obtained by the division of a region in which a road network exists into a latitude direction and a longitude direction by equal spaces based on data stored in the road network storage unit. Then, combine grids whose sets of roads passing are the same. The event grid matching unit correlates event data collected from a vehicle and a grid. When the number of pieces of event data correlated with the grid is large, the event processing priority determination unit selects a part of the data. The event road matching unit correlates the selected event data and a road in the grid.Type: ApplicationFiled: March 25, 2008Publication date: May 6, 2010Applicant: NEC CORPORATIONInventors: Kouji Kida, Kenichiro Fujiyama
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Publication number: 20100109769Abstract: A power amplifier is provided with a signal generating circuit, a plurality of control signal amplifiers and an RF amplifier. The signal generating circuit outputs the amplitude modulation components of an input signal by dividing the components into a plurality of control signals, and outputs a modulation wave signal or the phase modulation components of the modulation wave signal. The control signal amplifier is provided with a pulse modulator, which performs pulse modulation of a control signal; a switching amplifier, which performs current amplification of a rectangular wave signal outputted from the pulse modulator; and a low-pass filter, which removes spurious components from the signal outputted from the switching amplifier. The RF amplifier amplifies the inputted signal, performs amplitude modulation with the signal outputted from the low-pass filter and outputs the amplitude-modulated signal.Type: ApplicationFiled: December 27, 2007Publication date: May 6, 2010Applicant: NEC CorporationInventor: Shingo Yamanouchi
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Publication number: 20100114855Abstract: The present invention provides a method and system for automatic objects classification. The method comprises: acquiring a set of objects; classifying the objects based on query log to generate a first classification result; classifying the objects based on ontological information to generate a second classification result; and semantically fusing the first and second classification results to generate a final classification result. According to the present invention, compared with the prior arts, by semantically fusing the query log-based classification result and the ontology-based classification result, the accuracy and user-friendness of the object classification can be improved.Type: ApplicationFiled: October 28, 2009Publication date: May 6, 2010Applicant: NEC (China) Co., Ltd.Inventors: Jianqiang Li, Xin Meng, Yu Zhao, Jingwei Shi
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Publication number: 20100115324Abstract: A memory interface circuit includes a clock signal supply buffer configured to send a system clock signal which is supplied through a reference node, to a memory through a transmission line; a data strobe buffer configured to receive a data strobe signal supplied from the memory; a system clock synchronizing circuit configured to supply a data read from the memory to a logic circuit in synchronization with the system clock signal; and a delay detecting circuit provided at a front stage to the system clock synchronizing circuit and configured to detect a transmission delay from the clock signal supply buffer to the data strobe buffer. The delay detecting circuit generates a phase difference data indicating the transmission delay based on a difference between a phase of the system clock signal and a phase of the data strobe signal outputted from the data strobe buffer, and supplies the phase difference data to the system clock synchronizing circuit.Type: ApplicationFiled: October 29, 2009Publication date: May 6, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Reiko Kuroki
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Publication number: 20100115485Abstract: A circuit design device decides placement of elements and interconnections included in a circuit, on the basis of connection information of the circuit. The circuit design device includes an equivalent fault class extracting unit, a weighting unit, and a placement deciding unit. The equivalent fault class extracting unit extracts one or more classes (hereinbelow referred to as “equivalent fault classes”) having, as members, interconnections (hereinbelow referred to as “equivalent fault interconnections”) which mutually cause an equivalent fault in the circuit. The weighting unit gives a greater weight to the equivalent fault class or the equivalent fault interconnections included in the equivalent fault class, as the number of the members in the equivalent fault class (hereinbelow referred to as the “number of equivalent fault interconnections”) increases.Type: ApplicationFiled: November 4, 2009Publication date: May 6, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Junpei Nonaka
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Publication number: 20100110920Abstract: A method used for radio measurement in a communication network is provided. The communication network comprises multiple basic service sets controlled by a core network controller. The method comprises the steps of: the core network controller issuing a measurement request to a communication node working on a service channel; the communication node switching to a non-service channel based on the measurement request; the communication node broadcasting a measurement beacon in the non-service channel and returning to the service channel immediately after the broadcasting; a node in the non-service channel receiving the measurement beacon; and based on the measurement beacon, calculating the received signal strength indicator (RSSI) from the communication node to the node in the non-service channel.Type: ApplicationFiled: September 29, 2009Publication date: May 6, 2010Applicant: NEC (China) Co., Ltd.Inventors: Yongqiang LIU, Yong Xia, Quan Huang, Gang Wang
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Patent number: 7710169Abstract: A semiconductor integrated circuit according to the invention has a plurality of output transistors connected to an output terminal through which output data is outputted, and an impedance control circuit and a slew rate control circuit. The impedance control circuit generates control signals specifying output transistors to be turned on when the output data is output, from among the plurality of output transistors. The slew rate control circuit generates, according to the control signals, drive signals driving the output transistors to be turned on, and variably sets respective delay times of the drive signals according to the control signals.Type: GrantFiled: October 22, 2007Date of Patent: May 4, 2010Assignee: NEC Electronics CorporationInventor: Yoshihiro Tanaka
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Patent number: 7711827Abstract: A communication system comprises a first communication terminal (101) provided with an ID tag (106) and having a communication function for a first medium, a second communication terminal (102) provided with an ID reader (107) and having a communication function for a second medium different from the first medium, and a communication server (109) connected to the first and the second communication terminals. The ID tag stores terminal address information representative of an address of the first communication terminal. When the ID reader reads, as readout address information, the terminal address information from the ID tag, the second communication terminal informs the readout address information to the communication server.Type: GrantFiled: December 14, 2005Date of Patent: May 4, 2010Assignee: NEC Infrontia CorporationInventor: Kunio Nagashima
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Patent number: 7710189Abstract: A semiconductor switch according to an embodiment of the invention includes resistive members connected with a source and a drain witch are n-type diffusion layers formed in a P-well of an n-type MOSFET. When a gate of the n-type MOFET is turned off, a positive voltage is applied to a node between the resistive members for a reverse bias at a PN junction between the source and the drain, and the well. When the gate is turned on, the node between the resistive members is set to 0 V.Type: GrantFiled: May 1, 2006Date of Patent: May 4, 2010Assignee: NEC Electronics CorporationInventor: Tetsu Toda
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Patent number: 7708450Abstract: A liquid crystal display device includes an LED backlighting unit and a liquid crystal display panel disposed on the backlighting unit. The backlighting unit includes a light source of an array of LEDs and a reflector disposed so as to cover the light source and configured to reflect light emitted from the light source. And a light shielding spacer member is provided between the reflector and the LED light source.Type: GrantFiled: November 3, 2005Date of Patent: May 4, 2010Assignee: NEC LCD Technologies, Ltd.Inventor: Kazuaki Mikami
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Patent number: 7710521Abstract: An LCD device includes a reflective area in each pixel. A reflection film having a convex-concave surface is provided in the reflective area, film in cross section configuration is formed. Each pixel includes a pixel electrode and a common electrode for applying a lateral electric field on a LC layer. The inclination angle of the reflection film has an inclination angle distribution, wherein the angle component in an area corresponding to the electrodes has a lower angle distribution than the angle components in an area corresponding to a gap between adjacent two of the electrodes.Type: GrantFiled: January 15, 2008Date of Patent: May 4, 2010Assignee: NEC LCD Technologies, LtdInventors: Kenichirou Naka, Michiaki Sakamoto, Hiroshi Nagai, Kenichi Mori
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Patent number: 7710373Abstract: A liquid crystal display device is composed of first and second data lines, first and second operational amplifiers, and a short-circuiting circuit. The first operational amplifier is configured to drive the first data line to a potential of a first polarity during a first period, and to drive the second data line to a potential to the first polarity during a second period following the first period. The second operational amplifier is configured to drive the second data line to a potential of a second polarity complementary to the first polarity during the first period, and to drive the first data line to a potential to the second polarity during the second period. The short-circuiting circuit is configured to short-circuit the first and second data lines during a short-circuiting period between the first and second periods.Type: GrantFiled: April 6, 2006Date of Patent: May 4, 2010Assignee: NEC Electronics CorporationInventor: Takashi Nose
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Patent number: 7710533Abstract: A liquid crystal display (LCD) panel is fixed to a supporting stage by vacuum holding in a way that an end portion of a predetermined one of edges of the pair of substrates protrudes from the supporting stage. Next, scribe lines are formed respectively in positions on upper and lower surfaces of the end portion of the pair of substrates, and the end portion protruding from the supporting stage. Thereafter, a load is applied to a predetermined position by using a break pin. The load is applied to the predetermined position at a side of the scribe lines toward the outside closer to starting points of the respective scribe lines. Accordingly, the LCD panel is cut.Type: GrantFiled: December 1, 2006Date of Patent: May 4, 2010Assignee: NEC LCD Technologies, Ltd.Inventor: Makoto Mori
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Patent number: 7711525Abstract: A method for bounded model checking of arbitrary Linear Time Logic temporal properties. The method comprises translating properties associated with temporal operators F(p), G(p), U(p, q) and X(p) into property checking schemas comprising Boolean satisfiability checks, wherein F represents an eventuality operator, G represents a globally operator, U represents an until operator and X represents a next-time operator. The overall property is checked in a customized manner by repeated invocations of the property checking schemas for F(p), G(p), U(p, q), X(p) operators and standard handling of atomic propositions and Boolean operators.Type: GrantFiled: May 30, 2002Date of Patent: May 4, 2010Assignee: NEC CorporationInventors: Malay Ganai, Lintao Zhang, Aarti Gupta, Zijiang Yang, Pranav Ashar
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Patent number: 7709063Abstract: In a plasma CVD apparatus, a plate formed with a plurality of perforated holes is arranged to separate a plasma generation region and a processing region. The aperture ratio of the perforated holes to the plate is not greater than five percent. Plasma including radicals and excited species is generated from an oxygen (O2) gas in the plasma generation region, then the radicals and excited species flow into the processing region through the perforated holes. A monosilane (SiH4) gas is also supplied into the processing region, but the backward flow of the monosilane gas into the plasma generation region is suppressed by the plate. In the processing region, the radicals and the excited species and the monosilane gas result in a gas phase reaction that yields the silicon dioxide film formed on the substrate or the wafer with high quality.Type: GrantFiled: January 5, 2007Date of Patent: May 4, 2010Assignees: NEC Corporation, Canon Anelva CorporationInventors: Katsuhisa Yuda, Hiroshi Nogami
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Patent number: 7710948Abstract: A transmitting terminal creates a data PCM stream in which data is recognized as a PCM stream by placing a prefixed idle code string before data to transmit and a postfixed idle code string after the data to transmit. By switching between a voice PCM stream and a data PCM stream, PCM steam is transmitted to a receiving terminal. The receiving terminal, when detecting the prefixed idle code string from a received PCM stream, receive the data from the transmitting terminal until detecting the postfixed idle code string.Type: GrantFiled: March 4, 2005Date of Patent: May 4, 2010Assignee: NEC CorporationInventor: Takao Hosokubo
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Patent number: 7710202Abstract: An amplifier includes a carrier amplifier which performs signal amplification at all times, a peak amplifier which operates only at a time when the high electric power is outputted, a combiner which combines the output from the carrier amplifier and the peak amplifier, and a distributor which distributes an input signal to the carrier amplifier and the peak amplifier. The carrier amplifier and the peak amplifier are included in a single package transistor.Type: GrantFiled: September 29, 2008Date of Patent: May 4, 2010Assignee: NEC CorporationInventor: Kazumi Shiikuma
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Patent number: 7710401Abstract: A mobile phone includes a pointing device and an activation mark in the vicinity of the display section. When a user moves a pointer on the display section to a position indicating the mark and operates the decision key, a predetermined action is activated. The number of icons that can be displayed on the display section of the mobile phone is limited. Therefore, in order to easily activate a number of actions of the mobile phone, the aforementioned mark is utilized.Type: GrantFiled: December 11, 2003Date of Patent: May 4, 2010Assignee: NEC CorporationInventor: Hideaki Nagata
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Patent number: 7709904Abstract: A thin film transistor substrate is provided including a first thin film transistor and a second thin film transistor. The first thin film transistor comprises a first active layer, a first gate insulating film, and a first gate electrode. The second thin film transistor comprises a second active layer formed, a second gate insulating film, and a second gate electrode. A thickness of the second gate insulating film is larger than a thickness of the first gate insulating film, the second active layer has at least two impurity doping regions which overlap the second gate electrode, the first active layer has at least two impurity doping regions formed in a self-aligning manner with respect to the first gate electrode, and the second gate electrode comprises a semiconductor layer.Type: GrantFiled: February 9, 2004Date of Patent: May 4, 2010Assignee: NEC CorporationInventor: Hiroshi Okumura