Patents Assigned to NEC
-
Publication number: 20100066981Abstract: There are provided a projector which is capable of managing the temperature of the light source highly accurately, and a method of cooling the light source of a projector. The projector includes light source means 2 for emitting light for projecting an image, holding means 4 for holding air, holding means 4 including air discharging means 4b directed toward light source means 2, air pump means 3 for holding air in holding means 4 and compressing air in holding means 4, pressure detecting means 5 for detecting a pressure in holding means 4, and control means 7 for controlling operation of air pump means 3 based on the pressure detected by pressure detecting means 5.Type: ApplicationFiled: September 13, 2007Publication date: March 18, 2010Applicant: NEC DISPLAY SOLUTIONS, LTD.Inventor: Takeshi Kato
-
Patent number: 7680962Abstract: An array type processor comprises a data path unit to execute processing, and a state management unit to control the state of the data path unit in accordance with a command that specifies processing on the data. An input DMA circuit reads from a memory information and data to be processed including a command corresponding to the data. The input DMA circuit first transfers the command to the state management unit, and then transfers the data to be processed to the data path unit.Type: GrantFiled: December 21, 2005Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventors: Kenichiro Anjo, Katsumi Togawa, Ryoko Sasaki, Taro Fujii, Masato Motomura
-
Patent number: 7681111Abstract: In this parity data generating circuit, a Galois field multiplying calculation is realized by performing data conversion by index table information generated from a Galois field multiplying table so that data for RAID6 are generated. A table check circuit inspects nonconformity of the index table information in advance by using results in which the Galois field multiplying table is indexed from different directions constructed by the longitudinal direction and the transversal direction. Data and parity for making the multiplying calculation are decomposed into plural data and parities by using this table check circuit, and index table information different from each other are allocated to these data and parities. Thus, a longitudinal index table making circuit and a transversal index table making circuit themselves are checked.Type: GrantFiled: August 12, 2008Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Eiji Kobayashi
-
Patent number: 7677456Abstract: An information reader includes an object reading unit for reading an image of an object and obtaining the image as image data, an object data obtaining unit for analyzing the image data and obtaining object data as data contained in the object itself, a state data obtaining unit for obtaining state data indicating a state of the object during object image reading operation to read an image of the object, and an identifying unit for identifying predetermined processing by using as identification data the object data and at least one of the state data. The information which is obtained when an object is shot and which is meaningless in the conventional techniques can be effectively used. Therefore, the quantity of overall information can be increased without adding new hardware to the information reader.Type: GrantFiled: May 10, 2006Date of Patent: March 16, 2010Assignee: NEC CorporationInventors: Norio Uchida, Takeaki Minamizawa
-
Patent number: 7678485Abstract: The operability of a fuel cell which uses a fuel cartridge housing a liquid fuel is improved. A fuel cartridge 1400 houses a liquid fuel 124. The fuel cartridge 1400 includes a gas-liquid separation film 1408 which divides a fuel housing section 1402 into a liquid housing chamber 1402a and a gas housing chamber 1402b. A fuel gas, which is the vaporized liquid fuel, is housed in the gas housing chamber 1402b. A gas exhaust pipe 1410 is connected to the gas housing chamber 1402b, and the fuel gas housed in the gas housing chamber 1402b is discharged to outside the fuel cartridge 1400 via a gas discharge port 1414.Type: GrantFiled: December 6, 2004Date of Patent: March 16, 2010Assignee: NEC CorporationInventors: Yasutaka Kono, Yoshimi Kubo, Tsutomu Yoshitake, Takashi Manako, Hiroshi Kajitani, Hidekazu Kimura, Satoshi Nagao, Eiji Akiyama, Yoshinori Watanabe
-
Patent number: 7679456Abstract: A semiconductor integrated circuit includes S PLLs (S is an integer satisfying S?2), and the (k?1)th PLL 12(k-1) (k is an integer satisfying 2?k?S) is connected to the kth PLL 12k in the test mode. In this manner, the examination of S PLLs can be performed in a single test, and thereby it can reduce the time needed to examine PLLs in the semiconductor integrated circuit having a plurality of PLLs.Type: GrantFiled: April 21, 2008Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventor: Hayato Ogawa
-
Patent number: 7679199Abstract: A semiconductor apparatus capable of simply detecting a crack generated in plural semiconductor chips while the design freedom is improved, includes a first semiconductor chip and a second semiconductor chip that is laminated on the first semiconductor chip, in which a first wiring that is formed along the outer periphery of the first semiconductor chip and a second wiring that is formed along the outer periphery of the second semiconductor chip are connected in series.Type: GrantFiled: August 13, 2008Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventors: Kou Sasaki, Takashi Yonezawa
-
Patent number: 7679003Abstract: A carrier tape according to the present invention includes a plurality of tape carrier packages provided at a regular interval on a lengthy insulating tape, a first and a second integrated circuit device respectively and mounted to each of the plurality of tape carrier packages. Further, a connecting line electrically short-circuits only between one of terminals for the first integrated circuit device and one of terminals for the second integrated circuit device. This configuration prevents the integrated circuit devices from being damaged by discharged static electricity as well as allows to conduct a performance test on the integrated circuit devices such as checking for input/output of a signal by applying a probe pin to an input or output pin.Type: GrantFiled: May 23, 2006Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventor: Yuzo Suzuki
-
Patent number: 7680466Abstract: To eliminate the necessity of providing a special heat insulating structure or heat resisting properties and to simplify wiring. A modulation/demodulation unit, transmission/reception units of active and standby transmission systems, branching units of active and standby transmission systems, and a line switching and monitor control unit are accommodated in one casing. The modulation/demodulation unit and the line switching and monitor control unit, commonly used in the active and standby transmission systems, are incorporated in the lower part of the casing, and the transmission/reception units and the branching units of the active and standby transmission systems are incorporated in the upper part of the casing. The transmission/reception units and the branching units of the active and standby transmission systems are arranged in parallel such that the branching units are positioned at the center thereof.Type: GrantFiled: March 8, 2005Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Yukihiko Yokoyama
-
Patent number: 7680196Abstract: The present invention provides a calibrating method of an array antenna transceiver for performing multicarrier transmission capable of minimizing the increase of a transceiver size and a signal processing load and keeping a certain calibration accuracy. A method of calibrating a transmission route using an array antenna transceiver for performing broadband transmission by a multicarrier includes grouping all subcarriers into a plurality of subcarrier groups and calibrating a transmission route for each group.Type: GrantFiled: October 29, 2003Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Tomohiro Azuma
-
Patent number: 7678687Abstract: In a method for manufacturing a semiconductor device, insulation resistance of the porous film is stabilized, and leakage current between adjacent interconnects provides an improved reliability in signal propagation therethrough. The method includes: sequentially forming over a semiconductor substrate a porous film and a patterned resist film; forming a concave exposed surface of the substrate; forming a non-porous film covering the interior wall of the concave portion and the porous film; selectively removing the non-porous film from the bottom of the concave portion and the non-porous film by anisotropic etch; forming a barrier metal film covering the porous film and the interior wall; and forming a metallic film on the barrier metal film to fill the concave portion. The anisotropic etch process uses an etching gas with mixing ratio MR, 45?MR?100, where MR=((gaseous “nitrogen” containing compound)+(inert gas))/(gaseous “fluorine” containing compound).Type: GrantFiled: August 1, 2006Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventor: Akira Furuya
-
Patent number: 7679679Abstract: A synchronization signal detector includes a horizontal synchronization level detector, a synchronization signal extractor, a first filter circuit, and a synchronous separator. The horizontal synchronization level detector detects a horizontal synchronization detection level HL for detecting a horizontal synchronization signal from a video signal Din. The synchronization signal extractor outputs a limited signal D1 obtained by extracting only a signal within a limit range (HL?n) to (HL+m) that is set based on the horizontal synchronization detection level HL from the video signal Din. The first filter circuit removes a high frequency component of the limited signal D1 and outputs it. The synchronous separator detects a horizontal synchronization signal HS from the output signal of the first filter circuit.Type: GrantFiled: December 19, 2005Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventor: Hirofumi Sakurai
-
Patent number: 7680235Abstract: A PLL circuit includes a phase comparing section, a low pass filter, a digital VCO circuit, and a frequency divider. The phase comparing section compares an inputted clock signal and a frequency-divided clock signal in phase to detect a phase difference. The low pass filter averages the phase difference outputted from the phase comparing section to output the averaged result as a frequency control input. The digital VCO circuit operates in synchronism with a reference clock signal, and generates a sync clock signal based on the frequency control input while a phase of the sync clock signal is controlled in units of predetermined resolution values. The predetermined resolution value is a 1/K (K is a natural number more than 1) of a period of the reference clock signal. The frequency divider frequency-divides the synch clock signal to generate the frequency-divided clock signal.Type: GrantFiled: December 27, 2004Date of Patent: March 16, 2010Assignees: NEC Electronics Corporation, NEC CorporationInventors: Masaki Sano, Kinji Kayanuma
-
Patent number: 7679148Abstract: The task of the present invention is to enable formation of a gate insulating film structure having a good-quality interface between a silicon oxide film and silicon in an interface between a high dielectric constant thin film and a silicon substrate to provide a semiconductor device and a semiconductor manufacturing method which are capable of improving interface electrical characteristics, which has been a longstanding task in practical use of a high dielectric constant insulating film. A metal layer deposition process and a heat treatment process which supply metal elements constituting a high dielectric constant film on a surface of a base silicon oxide film 103 allow the metal elements to be diffused into the base silicon oxide film 103 to thereby form an insulating film structure 105 as a gate insulating film, after forming the base silicon oxide film 103 on a surface of a silicon substrate 101.Type: GrantFiled: July 16, 2003Date of Patent: March 16, 2010Assignee: NEC CorporationInventors: Heiji Watanabe, Hirohito Watanabe, Toru Tatsumi, Shinji Fujieda
-
Patent number: 7679394Abstract: Provided is a power supply noise resistance testing circuit, in which a test pattern is applied to a data input portion of a functional block formed on a semiconductor chip and a voltage on which a power supply noise is superimposed is supplied to a power supply portion of the functional block, thereby testing a power supply noise resistance of the functional block. In the power supply noise resistance testing circuit, a power supply noise generating circuit for generating the power supply noise is provided around or inside the functional block. A power supply of the power supply noise generating circuit is connected with a power supply of the functional block through a connection path to transmit the power supply noise.Type: GrantFiled: December 4, 2006Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Mutsumi Aoki
-
Patent number: 7679700Abstract: To provide a transflective liquid crystal display apparatus that employs in-plane switching mode (in-plane switching system), which exhibits a reflection property of wide view angles. Provided is a transflective liquid crystal display apparatus which comprises: a reflective area and a transmissive area; an uneven reflective plate provided in the reflective area; a flattening film laminated on the uneven reflective plate; and common electrodes and pixel electrodes arranged on the flattening film, wherein, the uneven reflective plate comprises a diffusive reflecting function that is capable of diffusely reflecting light making incident at an incident angle of 30 degrees towards directions at exit angles of 0-10 degrees, and a surface of the flattening film is set to be substantially flat.Type: GrantFiled: May 31, 2007Date of Patent: March 16, 2010Assignee: NEC LCD Technologies, Ltd.Inventors: Kenichi Mori, Michiaki Sakamoto, Daisuke Inoue, Kenichirou Naka, Hiroshi Nagai
-
Patent number: 7681168Abstract: A semiconductor integrated device has a wire layout structure such that SL1?SL2<SL3 wherein a minimum wiring space in a location where both of neighboring wires are fine wires is SL1, a minimum wiring space in a location where at least one of neighboring wires is a wide wire and the neighboring wires are at an equal potential is SL2, and a minimum wiring space in a location where at least one of neighboring wires is a wide wire and the neighboring wires are at an unequal potential is SL3.Type: GrantFiled: December 1, 2005Date of Patent: March 16, 2010Assignee: NEC Electronics CorporationInventor: Taro Sakurabayashi
-
Patent number: 7680106Abstract: In a subscriber line accommodation apparatus, subscriber line termination units individually terminate a plurality of subscriber lines. An address information acquisition unit successively acquires, as address information, a dynamic address dynamically assigned to each of the communication terminals connected to the subscriber lines terminated by the subscriber line termination unit. A packet information reading unit reads out, from a packet to be sent to one of the communication terminals, packet information containing a dynamic address indicating the destination of the packet. An address information coincidence presence/absence determination unit determines whether the readout dynamic address coincides with one of the pieces of address information acquired by the address information acquisition unit. A packet sending control unit permits sending of only a packet determined to be coincident. A packet filtering method is also disclosed.Type: GrantFiled: September 22, 2005Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Sou Satou
-
Patent number: 7680837Abstract: There is disclosed a file management method in a log-structured file system for storing accesses to files that are sequentially performed by sequentially adding logs. A storage area of a storage medium is previously divided into a data area for storing a log including data of the file and a management area that can store management information related to the log stored in said data area for a plurality of entries. Then, the management information including a first number indicating the order of writing the entry is added and stored in the management area as a new entry.Type: GrantFiled: October 24, 2006Date of Patent: March 16, 2010Assignee: NEC CorporationInventor: Junichi Yamato
-
Patent number: 7680506Abstract: The object of the present invention is to realize a method and a server which enable insertion of advertisement even in voice communication including multimedia communication. The server is configured as a server for managing PoC communication among multiple terminals, comprising: a right-to-speak management section for managing the right to speak of the multiple terminals; a data distribution section for transmitting and receiving data to and from the multiple terminals; and an advertisement control section for storing advertisement data and transmitting the stored advertisement data to the multiple terminals via the data distribution section.Type: GrantFiled: March 1, 2007Date of Patent: March 16, 2010Assignee: NEC CorporationInventors: Kazuhiro Takahashi, Yoshihiro Ono, Shin Harada, Takashi Shiraki, Takehiko Kashiwagi, Junpei Kamimura