Abstract: In a mobile terminal device, at least one heat conduction layer formed of a member, such as copper, aluminum or carbon, being excellent in heat conductivity is provided inside a circuit board on which electronic components are mounted. The heat generated in the electronic components is promptly dispersed in the direction of the face of the circuit board by the heat conduction layer, and transferred from the whole face of the circuit board to the operation member, such as keys, and the housing, and then radiated to the outside. With this structure, the local temperature rise at the operation member and the housing can be suppressed, and the temperature on the surface of the mobile terminal device can be made uniform, without significantly increasing the cost and the thickness of the mobile terminal device. In addition, high-performance electronic components can be used by adopting this structure.

Abstract: A semiconductor device having a DRAM region and a logic region embedded together therein, including a first transistor formed in a DRAM region, and having a first source/drain region containing arsenic and phosphorus as impurities; and a second transistor formed in a logic region, and having a second source/drain region containing at least arsenic as an impurity, wherein each of the first source/drain region and the second source/drain region has a silicide layer respectively formed in the surficial portion thereof, and the first source/drain region has a junction depth which is determined by phosphorus and is deeper than the junction depth of the second source/drain region.

Abstract: A method of manufacturing a semiconductor device including implanting an element selected from fluorine and nitrogen, over the entire region of a semiconductor substrate; oxidizing the semiconductor substrate to thereby form a first oxide film over the surface of the semiconductor substrate; selectively removing the first oxide film in a partial region; oxidizing the semiconductor substrate in the partial region to thereby form a second oxide film thinner than the first oxide film in the partial region; and forming gates to thereby form transistors.

Abstract: Disclosed is a regulator including: a differential amplifier having a differential input stage receiving a reference voltage and an output terminal voltage, a push-pull type output portion of a current mirror configuration, a drive transistor having a control terminal connected to an output portion of the differential amplifier, first and second transistors cascode-connected between a control terminal of the drive transistor and a power supply, and third and fourth transistors cascode-connected between the control terminal of the drive transistor and ground. Control terminals of the first and the third transistors are respectively connected to control terminals of the push-pull transistors, control terminals of the second and fourth transistors are respectively connected to a first and a second control signal.

Abstract: An electromagnetic noise suppressor including a ferrite film is formed by regularly arranging constituents such as magnetized grains or one analogous to that. In the ferrite film, the constituents have at least one of the uniaxial anisotropy and the multiaxial anisotropy. The ferrite film has the magnetic anisotropy or the magnetic isotropy. The ferrite film is formed by a plating method in the presence of a magnetic field.

Abstract: A distance measuring system comprising: a transmitter that simultaneously emits an infrared radiation and an ultrasonic wave; and a receiver that include a table showing a relationship between an arrival time, indicative of a period from detection of the received infrared radiation to detection of the received ultrasonic wave, and a required received signal strength of the ultrasonic wave corresponding to the arrival time when the ultrasonic wave is directly received, that compares the received signal strength of the ultrasonic wave with a required received signal strength corresponding to the arrival time retrieved from the table, and that calculates the distance to the transmitter based on the arrival time when the received signal strength of the ultrasonic wave is higher than the required received signal strength corresponding to the arrival time retrieved from the table.

Abstract: Disclosed is a logic circuit which includes first and second MOS transistors which are connected in series between a first signal-input terminal and GND. The gates of the first and second MOS transistors are connected in common to a second signal-input terminal and a connection node between the drains of the first and second MOS transistors is connected to an output terminal. When the first and second MOS transistors are both in an off state, the output terminal is less than or equal to a low level.

Abstract: A semi-transmission type liquid crystal display that maximizes the luminance in reflection mode and transmission mode. The liquid crystal display comprises a lower substrate with thin film transistors, an opposite substrate facing the lower substrate, a liquid crystal layer between the lower substrate and the opposite substrate, a reflection electrode formed in a reflection area of the lower substrate, a transparent electrode formed in a transparent area of the lower substrate, a common electrode formed on the opposite substrate, and a drive circuit for applying a voltage between the reflection electrode and the transparent electrode and the common electrode. The potential difference between a drive voltage applied to that surface of the lower substrate which contacts the liquid crystal layer and a drive voltage applied to that surface of the opposite substrate which contacts the liquid crystal layer is lower in the reflection area than in the transparent area.

Abstract: An array-type computer processor including a data path unit communicating with a state control unit obtains data of a predetermined number of cooperative partial instruction codes, and operates with temporarily holding only a predetermined number of data-obtained instruction codes comprising cooperative partial instruction codes corresponding to contexts and operation states for the data path unit and the state control unit, respectively, from an external program memory which stores data of a computer program.

Abstract: The present invention provides a circuit analysis device including: storage unit having stored therein: connection information about multiple components; delay information including information about the delay time of a discrete component and a chain delay time which is a delay time in the case in which a chain delay effect is generated by a connection with another component about each kind of the multiple components; and chain effect propagating component information including information about kinds of chain effect propagating components which are components for transmitting the chain delay effect, and data processing unit for: referring to the information stored in the storage unit; performing a total delay time calculation process of sequentially adding the delay times of the components along a signal path in the circuit; and if the chain effect propagating component is halfway through the signal path in the total delay time calculation process, examining a connection relation between components that prec

Abstract: A modulation and demodulation system capable of minimizing a bit error rate in a six-phase phase modulation method. A senary signal phase-modulated and outputted by a modulator is received and phase-modulated by a destination demodulator to a binary signal before conversion by the modulator. The modulator assigns (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) which are senary signals (bi, ti) to first to sixth phases respectively. The demodulator performs a conversion process from the senary signals to the binary signals, for instance, by storing transmitted senary signals and sequentially converting every senary signal of length m to binary signal of length b so as to output them. The process of the demodulator assigns the first to sixth phases as the senary signals (bi, ti) to (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) respectively.

Abstract: There is provided a variable-gain amplifier, including two cascode amplifiers and an attenuator. The cascode amplifiers are mutually connected in parallel via the attenuator.

Abstract: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film. The second interconnection is connected to the first interconnection via the via. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, with a warped shape such that when the wiring substrate rests on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised.

Abstract: Propagation of a crack in a semiconductor device is to be suppressed, thus to protect an element forming region. An interface reinforcing film is provided so as to cover a sidewall of a concave portion that penetrates a SiCN film and a SiOC film formed on a silicon substrate. The interface reinforcing film is integrally and continuously formed with another SiOC film, and includes an air gap.

Abstract: An optical signal receiver is provided which is capable of making an optical signal receiver come into common and shared use even when a plurality of transmission methods is to be performed and of constructing a simplified optical transmission system. In a performance monitoring circuit, a switching control section transmits a connecting control signal to make a switching section operate so that the switching section selects a monitoring section to be connected based on bit-rate information corresponding to information about a transmission method type fed from a frequency detecting circuit and the selected monitoring section is connected to a clock/data regenerating circuit. The monitoring section extracts alarm information from a data signal fed from the clock/data regenerating circuit and transfers the alarm information to the selection connecting section. When the switching control section receives alarm information, the alarm information is transferred to devices mounted on a downstream side.

Abstract: A semiconductor device 1 includes a substrate 10, a semiconductor chip 20 (first semiconductor chip), semiconductor chips 30 (second semiconductor chips) and a heat sink 40. Semiconductor chips 20 and 30 are mounted on the substrate 10. The level of the top surface of the semiconductor chip 20 on the substrate 10 is lower than the level of the top surface of the semiconductor chip 30. A heat sink 40 is fixed to the semiconductor chip 20. Among the semiconductor chip 20 and the semiconductor chips 30, only above the semiconductor chip 20 is provided with the heat sink 40.

Abstract: A mode-selecting apparatus for selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on the display unit in accordance with a data-enable signal, includes a first unit which counts a number of input horizontal synchronization control signals in each of frame periods, a second unit which counts a number of input data-enable signals in each of frame periods, and a third unit which selects one of the first and second modes in accordance with both the number of input horizontal synchronization control signals and the number of input data-enable signals.

Abstract: A technique for improving usage efficiency of a shared resource and improving processing capacity in an information processing apparatus, without increasing the transmission rate or the bit width of a bus is disclosed. Multiple bus interfaces are connected to at least one shared resource. The multiple bus interfaces are connected to a multi-layer bus respectively. Furthermore, data buffers for holding read data and write data respectively are provided for each bus interface. An arbiter arbitrates access requests from the respective bus interfaces, and the shared resource reads and writes data in response to the access request which has been given an access right.

Abstract: The propagation time (1605) of signals between a terminal (1304) and a base station (1302) is calculated from the round-trip time (1601) of signals between the terminal (1304) and the base station (1302) and the turn-around time (1603) from the reception by terminal (1304) of a signal from base station (1302) until the transmission of the signal to the base station (1302). The propagation time (1606) of signals between the terminal (1304) and another base station (1303) is similarly calculated. The difference between the propagation times (1605 and 1606) and the arrival time difference (1607) that is calculated in the terminal (1304) are then compared to calculate the transmission time difference (1608) between the base stations (1302 and 1303).