Abstract: Systems and methods are disclosed to verify a program by symbolically enumerating path programs; verifying each path program to determine if the path program is correct or leads to a violation of a correctness property; determining a conflict set from the path program if the path program is proved correct; using the conflict set to avoid enumerating other related path programs that are also correct.

Abstract: A waveform generating circuit includes a constant current circuit that supplies a constant current through a power source; a current mirror circuit that flows an output current that is n times an input current; and a switching circuit that switches a flowing direction of the current in the constant current circuit between the current mirror circuit and the output terminal according to the logical level of the rectangle input signal. The waveform generating circuit generates a triangle wave having a falling slope waveform that is n times the rising slope. On the other hand, the waveform generating circuit that receives an inverted signal of the signal generates a triangle wave and its voltage is compared with another in the comparator to generate an output signal.

Abstract: A system and method for integrated circuit diagnosis includes partitioning an integrated circuit design into sub-regions according to a structure of the integrated circuit design. A decision function is generated for a sub-region by training a machine learning tool. A sequence of test patterns is applied to a device under test (DUT) to determine responses. If the DUT fails, all the decision functions are evaluated with the errors produced by the DUT. A sub-region whose decision function yielded a highest value is selected to find a defect sub-region in the DUT.

Abstract: A method of manufacturing a semiconductor device includes: forming a groove portion in a dicing region of an insulating layer and forming a via hole in an internal circuit formation region; providing a first resist film on the insulating layer; providing a second resist film to cover the first resist film; forming an interconnect opening in a region covering an internal circuit formation region of the second resist film and forming a position aligning opening in a region covering the dicing region of the second resist film; and detecting a positional relationship between the groove portion and the position aligning opening so as to detect whether the interconnect opening of the second resist film exists at a predetermined position with respect to the via hole of the insulating layer. In selective removing of the second resist film, the position aligning opening is formed such that a region of the position aligning opening covers the groove portion of the insulating layer.

Abstract: A method and system for detecting and counting mitotic figures in an image of a biopsy sample stained with at least one dye, includes color filtering the image in a computer process to identify pixels in the image that have a color which is indicative a mitotic figure; extracting the mitotic pixels in the image that are connected to one another in a computer process, thereby producing blobs of mitotic pixels; shape-filtering and clustering the blobs of mitotic pixels in a computer process to produce mitotic figure candidates; extracting sub-images of mitotic figures by cropping the biopsy sample image at the location of the blobs; extracting two sets of features from the mitotic figure candidates in two separate computer processes; determining which of the mitotic figure candidates are mitotic figures in a computer classification process based on the extracted sets of features; and counting the number of mitotic figures per square unit of biopsy sample tissue.

Abstract: A virtual machine location system includes a resource conflict detection unit for detecting a resource conflict using measurement data regarding a resource usage state of the entirety of a single server and a resource usage state of virtual machines running on the server, and a virtual machine relocation determination unit for transferring the virtual machine on the server for which a resource conflict has been detected to another server having a lower resource usage rate are included.

Abstract: A information extraction rule making support system comprises: a storage section for storing an extraction object document, which is an electronic document of an information extraction object; an input unit for inputting a plurality of extraction rules, which are rules used to extract information from said extraction object document; an information extraction section for respectively deriving extraction results matching each of said extraction rules from said extraction object document stored by said storage section, using each of said extraction rules inputted by said input means; and a rule relation creating section for creating a rule relation network indicating a relation between each of said extraction rules by analyzing an overlapping relation or including relation between extraction results derived by said information extraction section and linking each of said extraction rules based on the result of the analysis.

Abstract: The memory unit is compatible with a plurality of operation modes. The plurality of operation modes include the normal mode allowing access and the standby mode consuming a lower power than the normal mode. The branch detection section detects a branch instruction from an instruction fetched from the memory unit by the CPU. The mode control section changes an operation mode of the memory unit according to a detection result by the branch detection section.

Abstract: A semiconductor device of the present invention has a first-conductivity-type substrate having second-conductivity-type base regions exposed to a first surface thereof; trench gates provided to a first surface of the substrate; first-conductivity-type source regions formed shallower than the base regions; a plurality of second-conductivity-type column regions located between two adjacent trench gates in a plan view, while being spaced from each other in a second direction normal to the first direction; the center of each column region and the center of each base contact region fall on the center line between two trench gates; and has no column region formed below the trench gates.

Abstract: A bidirectional switch includes a first switch and a second switch. The switch includes a well region of a first-conductivity-type formed on a semiconductor substrate, and serving as drains of the first switch and the second switch, a gate electrode of the first switch provided in a first trench formed in the well region through a first gate insulating film, a gate electrode of the second switch formed in a second trench formed in the well region so as to be spaced apart from the first trench with a second gate insulating film, a source region of the first switch formed on a side wall of the first trench, and on a surface of the well region via a first channel region of a second-conductivity-type, and a source region of the second switch formed on a side wall of the second trench, and on a surface of the well region via a second channel region of the second-conductivity-type. The well region is formed in a region between the first trench and the second trench.

Abstract: In a method of allocating carriers of a cellular system comprising mobile stations and a wireless network of multiple base stations, multiple carriers being available for communication between base and mobile stations, the wireless network performs the following. Carriers are divided into first and second carriers, and allocated the same for each cell formed by the base stations. Each mobile station is classified as an intracell-inner-area or an intracell-outer-area mobile station. Communication is performed with the intracell-inner-area and intracell-outer-area mobile stations by the first and second carriers, respectively. A status of use of the first carriers in a first cell is measured based on communicated data, as is that of the second carriers in a second cell. The number of second carriers in the second cell is changed based on at least the status of use of the first carriers and the status of use of the second carriers.

Abstract: A method of driving a display panel is provided. The display panel includes a first scan group including first to third scan lines, and a plurality of data lines which intersect the first to third scan lines, and first display cells of a first color which are connected with the first scan line, second display cells of a second color which are connected with the second scan line, third display cells of a third color which are connected with the third scan line. The method is achieved by precharging the data lines to a predetermined voltage in a first horizontal period; and by supplying a data signal to the first to third display cells through the data lines driving of the first to third display cells after the data lines are precharged in the first horizontal period. In the driving of the first to third display cells, one of the first to third display cells corresponding to one of said first to third colors, having a maximum spectral luminous efficacy, is first driven.

Abstract: There are provided a memory space allocation method and a memory space allocation device that aim at higher-speed accesses when a memory is shared by a plurality of circuits. In this memory, one data is accessed by issuing addresses a plurality of times. Memory allocation is performed so that high-order addresses of memory spaces of an external memory 505 may be maximally shared by a plurality of circuits 501. When the high-order addresses are common, a memory control circuit does not transfer the high-order addresses, thereby reducing the number of transfers of the high-order addresses. Therefore, the higher-speed access is achieved.

Abstract: An epithelial detector and method for automatically identifying epithelial portions of a tissue sample, includes: staining the tissue sample with at least two dyes; applying a color transformation to a color image of the tissue sample to obtain one or more color channels; and applying a trained convolutional neural network to the color channels to obtain a decision for position in the tissue as to whether it is inside or outside an epithelial layer. Also, a method for training the convolutional neural network.

Abstract: An analog-to-digital converter includes a reference voltage generator that outputs a reference voltage, a first comparator and a second comparator that compare the reference voltage and a voltage of an input signal and output a digital signal having a first logical value or a second logical value, and a calibrator that compares an output of the first comparator and an output of the second comparator and outputs a first offset control signal and a second offset control signal. The first comparator sets an offset value having a positive or negative polarity to an output inversion threshold level based on the first offset control signal, and the second comparator sets an offset value having a polarity opposite to the polarity set by the first comparator to an output inversion threshold level based on the second offset control signal.

Abstract: A semiconductor integrated circuit includes multiple cells each containing transistors. The transistors include a gate and diffusion layers. The multiple cells are adjacently formed in a first direction perpendicular to the gate. The distance between the cell border and the adjacent and corresponding diffusion layer, the first direction, is the same.

Abstract: An information processing device includes an instruction fetch unit, an instruction buffer, an instruction executing unit, and an instruction fetch control unit. The instruction fetch unit supplies a fetch address to an instruction memory. The instruction buffer stores an instruction read out from the instruction memory. The instruction executing unit decodes and executes the instruction supplied from the instruction buffer. The instruction fetch control unit stops supply of the fetch address to the instruction memory by the instruction fetch unit when the fetch address corresponds to a first address or an address after the first address while the instruction executing unit executes loop processing. The loop processing is repeatedly executed for a predetermined number of times in accordance with decoding of the loop instruction by the instruction executing unit. The first address is an address after an address of an end instruction included in the loop processing.

Abstract: A J-FET includes a channel layer of a first conductivity type (a Si-doped n-type AlGaAs electron supply layers 3 and 7, undoped AlGaAs spacer layers 4 and 6, and an undoped InGaAs 5 channel layer 5) formed above a semi-insulating GaAs substrate, an upper semiconductor layer made up of at least one semiconductor layer and formed above the channel layer of the first conductivity type, a semiconductor layer of a second conductivity type (C-doped p+-GaAs layer 18) formed in a recess made in the upper semiconductor layer or formed above the upper semiconductor layer, a gate electrode placed above and in contact with the semiconductor layer of the second conductivity type, and a gate insulating film including a nitride film formed above and in contact with the upper semiconductor layer and an oxide film formed above the nitride film and having a larger thickness than the nitride film.

Abstract: To provide a liquid crystal display device capable of improving a moving picture characteristic at a low cost by achieving high luminance of the liquid crystal display device which performs quasi-impulse drive. In the liquid crystal display device of the present invention, a first switching device constituting each pixel has a control terminal connected to a gate line, another control terminal connected to another gate line, and becomes electrically conductive when one of the control terminals is low level while the other is high level. A second switching device has a control terminal connected to the gate line and a control terminal connected to the other gate line. A pixel capacitance and a storage capacitance are connected to data lines via the first switching device, and connected to a black signal supplying wiring via the second switching device. The black signal supplying wiring is common to all the pixels.

Abstract: A non-volatile semiconductor memory device includes a semiconductor substrate, a charge-storage layer that is formed above the semiconductor substrate, a first gate that is formed above the charge-storage layer, and that includes a first surface and a second surface, a second gate that is formed beside the first surface of the first gate, an insulating layer that is formed above the second surface of the first gate, a diffusion region that is formed on the semiconductor substrate at a position corresponding to the second surface of the first gate, and a silicide layer that is formed above the insulating layer and the diffusion region.