Abstract: A system and method for bounded model checking of computer programs includes decomposing a program having at least one reachable property node for bounded model checking (BMC) into sub-problems by employing a tunneling and slicing-based (TSR) BMC reduction method. The sub-problems of the TSR method are partitioned in a distributed environment, where the distributed environment includes at least one master processing unit and at least one client unit. The sub-problems are solved by each client independently of other clients to reduce communication overhead and provide scalability.

Abstract: Provided is a semiconductor integrated circuit including: a first path that includes a first logic circuit; a second path that includes a second logic circuit; and a subsequent-stage circuit that is connected to an output of the first path and is connected to an output of the second path, in which the second path further includes a first internal path that is selected as a propagation path during a normal operation period; and a second internal path that is selected as a propagation path during a test operation period and includes a delay circuit having a delay amount larger than a delay amount of the first internal path.

Abstract: Systems and methods are disclosed for transmission with a plurality of base stations (BSs) in a wireless cellular data network where one BS communicates with neighboring BSs by determining a binary or discrete new power level on each subchannel to determine a weighted sum modified rates of a BS and in-neighbor BSs; and resolving concurrent power update in each BS in a distributed manner.

Abstract: A liquid crystal display device includes a display section, an image signal drive circuit, a scan signal drive circuit, a common electrode potential control circuit, and a synchronous circuit. The display section has scan electrodes, image signal electrodes, a plurality of pixel electrodes arranged in a matrix, a plurality of switching elements for transmitting an image signal to the pixel electrodes, and a common electrode. The common electrode potential control circuit changes an electric potential of the common electrode into a pulse shape, after the scan signal drive circuit has scanned all the scan electrodes and the image signal has been transmitted to the pixel electrodes. Otherwise, the image signal is overdriven. Otherwise, torque for returning to a no-voltage-application state is increased.

Abstract: To eliminate a signal deviation that occurs when scaling processing is performed on image data including multiple signals having different data rates, there is provided an image processing apparatus which performs scaling processing on image data including multiple signals having different data rates and includes a first scaling processing unit that performs a first scaling processing according to a first scale factor in a first area; and a second scaling processing unit that performs a second scaling processing subsequent to the first scaling processing, according to a second scale factor in a second area adjacent to the first area, on a signal having a high data rate using the first scale factor, and performs the second scaling processing on a signal having a low data rate using the second scale factor obtained by correcting the first scale factor, after the first scaling processing.

Abstract: To facilitate counting of memory cells in failure analysis, without limiting the arrangement of memory cells or increasing the number of processes. A memory cell array region 3 in which memory cells 3a are formed in a repetitive pattern is formed on a semiconductor substrate 2. Power supply wirings 4a and ground wirings 4b in a predetermined layer formed on the memory cell array region 3 are vertically and horizontally arranged in the form of a gird to correspond to the arrangement of the memory cells 3a at least in the memory cell array region 3.

Abstract: A semiconductor device includes a substrate; an alignment mark formed on the substrate and composed of a metal film; a cover insulating film formed on the alignment mark and covering an entire surface of the alignment mark; and a polyimide film formed on the cover insulating film, and having an opening, which is opened on the alignment mark and has an end face aligning with an end face of the alignment mark, in plan view.

Abstract: A method for manufacturing a semiconductor device includes preparing two substrates having a first and a second surface and having first and second pads and a second testing-dedicated pad, the first pads in the first surface, the second pads in the second surface and arranged with an inter-pad distance that is larger than that for the first pad, and the second testing-dedicated pad being in the second surface; coupling a wafer with a apparatus, and inspecting the wafer with a probe card, the wafer having a LSI, which is an object of an inspection, the apparatus applicable signal to the LSI formed in the wafer, and measurable electrical characteristics of the LSI formed in the wafer, and the probe card having one of the two substrates; dicing the wafer into semiconductor elements containing the LSI; and packaging the semiconductor element over the other of the two substrates.

Abstract: A LCD unit includes a drive unit that drives a LC layer in at least a part of a unit pixel by applying thereto a longitudinal electric field. The drive unit drives the at least a part of the unit pixel in an image period by applying thereto an image voltage corresponding to an image, and in a preliminary period preceding to the image period by applying a preliminary voltage equal to or higher than a threshold voltage that allows LC molecules in the LC layer to start change of orientation of the LC molecules.

Abstract: Provided is a wiring substrate which enables wiring density to be increased and enables transmission speed of signals to be adjusted without making a design change of wirings. A wiring substrate 100 is provided with a first terminal 110, a second terminal 120, a first wiring 112 and a second wiring 114. The first wiring 112 is such that one end thereof is connected to the first terminal 110, and is formed on the wiring substrate 100. The second wiring 114 is such that one end thereof is connected to the second terminal 120, and is formed on the wiring substrate 100. One end of each of a plurality of third wirings formed on the wiring substrate 100 is connected to the other end of the first wiring 112, and one end of each of a plurality of fourth wirings formed on the wiring substrate 100 is connected to the other end of the second wiring 114. The other end of at least one third wiring and the other end of at least fourth wiring are connected together.

Abstract: A method for establishing a secret key between two nodes in a communication network, in particular in a wireless local area network (WLAN), includes concealment of the fact that a key exchange occurs, one of the nodes—first node (B)—broadcasts one or more packets (Pi) that can be received by the other node—second node (A)—, wherein the packets (Pi) contain each a first key (Ki) and wherein the packets (Pi) are each encrypted with a second key (ki) before being sent, the second node (A) randomly chooses one packet (Pm) from the packets (Pi) received and breaks the encryption of the chosen packet (Pm) in order to obtain the first key (Km), and the second node (A) initiates a key exchange protocol, wherein the second node (A) encrypts the message to be sent for initiating the key exchange protocol with the revealed key (Km).

Abstract: A semiconductor device, includes: a semiconductor substrate; a multilayered interconnect structure formed on the semiconductor substrate; a terminal for flip-chip packaging arranged on the surface of the multilayered interconnect structure; and a spiral inductor formed to enclose the terminal for flip-chip packaging, in a plan view, which is not electrically connected with the spiral inductor. The spiral inductor may be provided for peaking by which the gain reduction caused in a high frequency is compensated.

Abstract: A method of manufacturing ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer with an insulating interlayer portion made of SiO2. The method comprises the steps of treating, with a silane compound, an SiO2 surface on which the insulating interlayer portion is to be formed, performing catalyzation with an aqueous solution containing a palladium compound, forming the diffusion prevention layer by electroless plating, and then forming the wiring layer on this diffusion prevention layer. Furthermore, a capping layer is formed on the wiring layer by electroless plating. Consequently, the diffusion prevention layer having good adhesive properties can all be formed through a simple process by wet processes, and further, the wiring layer can directly be formed on this diffusion prevention layer by the wet process. In addition, the capping layer can directly be formed on this wiring layer by electroless plating.

Abstract: There are disclosed a network interference evaluating method, a dynamic channel assignment method and apparatus used in wireless networks.

Abstract: An operational amplifier includes an input stage amplifier that receives an input signal, an output stage amplifier that amplifies a signal output from the input stage amplifier and outputs the signal, a capacitor that is connected between an input node and an output node of the output stage amplifier, and a charge and discharge control circuit that controls a charge and discharge current of the capacitor.

Abstract: A fuel cell (100) is mounted with a fuel cartridge (1220) in a detachable manner. The fuel cartridge (1220) is provided with a connecting part (1225) and the fuel cell (100) is provided with a fitting part (1205) into which the connecting part (1225) is fitted. The fuel cell (100) identifies the fitted fuel cartridge (1220).

Abstract: A data processing device for debugging code for a parallel arithmetic device that includes a plurality of data processing circuits arranged in a matrix and that causes, for each operating cycle, successive transitions of operation states in accordance with object code includes: operation execution means for causing the parallel arithmetic device to execute state transitions by means of the object code; device halt means for temporarily halting the state transitions for each operating cycle; a result output means for reading and supplying as output at least a portion of held data, connection relations, and operation commands of the plurality of data processing circuits of the halted parallel arithmetic device; a resume input means for receiving as input a resume command of the state transitions; and an operation resumption means for causing the operation execution means to resume the state transitions upon input of a resume command.

Abstract: A pipeline type analog-digital converter includes a first to an N-th (N is an integer of not less than 2) stages (101 to 10N) brought into cascade connection and converting an analog signal input from a preceding stage to a digital signal of a predetermined bit and outputting the digital signal. Each of the first to the (N?1)-th stages (101 to 10N?1) includes an analog-digital converter circuit including comparators comparing an analog signal with reference potential being determined in advance and mutually different in parallel. The first to the (N?1)-th stages are in redundant configuration with the comparators of the stage including an auxiliary comparator.

Abstract: Each mobile terminal and/or radio base station determines whether a radio base station transmits radio waves of excessive power. Based on determination results obtained by a plurality of mobile terminals and/or radio base stations, a radio-system management server determines whether a certain radio base station transmits radio waves of excessive power. When the certain radio base station transmits radio waves of excessive power, the radio-system management server instructs the certain radio base station to forcefully stop its radio transmission by transmitting a forced transmission-stop control message to the radio network controller that controls the certain radio base station.

Abstract: An insulating layer is formed on a semiconductor substrate, and has a through hole for via. A porous silica layer has a trench for interconnection communicating to the through hole for via, and is formed on the insulating layer in contact therewith. A conductive layer is formed in the through hole for via and in the trench for interconnection. The insulating layer is formed from a material containing carbon, hydrogen, oxygen, and silicon, and having absorption peak attributed to Si—CH3 bond in a range from at least 1260 cm?1 to at most 1280 cm?1 (around 1274 cm?1) when measured with FT-IR. Thus, a semiconductor device having a porous insulating layer in which depth of the trench for interconnection is readily controlled, a dielectric constant is low, and increase in leakage current is less likely, as well as a manufacturing method thereof can be obtained.