Patents Assigned to Novellus Systems
  • Patent number: 6855225
    Abstract: A plasma source for use in, for example, semiconductor processing contains a radio-frequency generator, an impedance matching network, and a coil that encloses a tube. The coil is bifilar, i.e., the turns of one are interlaced with the turns of a second winding. The matching network supplies only a single coil in the plasma source, unlike conventional arrangements wherein a single matching network supplies multiple coils in the plasma source.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: February 15, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Yuh-Jia Su, David Lee Chen, Vincent Bernard Decaux
  • Patent number: 6855645
    Abstract: A low-k precursor reactant compound containing silicon and carbon atoms is flowed into a CVD reaction chamber. High-frequency radio-frequency power is applied to form a plasma. Preferably, the reaction chamber is part of a dual-frequency PECVD apparatus, and low-frequency radio-frequency power is applied to the reaction chamber. Reactive components formed in the plasma react to form low-dielectric-constant silicon carbide (SiC) on a substrate surface. A low-k precursor is characterized by one of: a silicon atom and a carbon—carbon triple bond; a silicon atom and a carbon—carbon double bond; a silicon—silicon bond; or a silicon atom and a tertiary carbon group.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: February 15, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Xingyuan Tang, Haiying Fu
  • Patent number: 6848455
    Abstract: Contaminants are removed from a semiconductor wafer by the in-situ generation of oxidizing species. These active species are generated by the simultaneous application of ultra-violet radiation and chemicals containing oxidants such as hydrogen peroxide and dissolved ozone. Ultrasonic or megasonic agitation is employed to facilitate removal. Radicals are generated in-situ, thus generating them close to the semiconductor substrate. The process chamber has a means of introducing both gaseous and liquid reagents, through a gas inlet, and a liquid inlet. O2, O3, and H2O vapor gases are introduced through the gas inlet. H2O and H2O2 liquids are introduced through the liquid inlet. Other liquids such as ammonium hydroxide (NH4OH), hydrochloric acid (HCI), hydrofluoric acid (HF), and the like, may be introduced to further constitute those elements of the traditional RCA clean. The chemicals are premixed in a desired ration and to a predetermined level of dilution prior to being introduced into the chamber.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: February 1, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Krishnan Shrinivasan, Adrianne Tipton
  • Patent number: 6848458
    Abstract: The present invention pertains to a system for cleaning wafers that includes specialized pressurization, process vessel, recirculation, chemical addition, depressurization, and recapture-recycle subsystems, as well as methods for implementing wafer cleaning using such a system. A solvent delivery mechanism converts a liquid-state sub-critical solution to a supercritical cleaning solution and introduces it into a process vessel that contains a wafer or wafers. The supercritical cleaning solution is recirculated through the process vessel by a recirculation system. An additive delivery system introduces chemical additives to the supercritical cleaning solution via the solvent delivery mechanism, the process vessel, or the recirculation system. Addition of chemical additives to the sub-critical solution may also be performed. The recirculation system provides efficient mixing of chemical additives, efficient cleaning, and process uniformity.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 1, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Krishnan Shrinivasan, Souvik Banerjee, Francisco Juarez, Karen A. Reinhardt, Sanjay Gopinath
  • Patent number: 6849122
    Abstract: A CVD method deposits conformal metal layers on small features of a substrate surface. The method includes three principal operations: depositing a thin conformal layer of precursor over some or all of the substrate surface; oxidizing the precursor to convert it to a conformal layer of metal oxide; and reducing some or all of the metal oxide to convert it to a conformal layer of the metal itself. The conformal layer of precursor may form a “monolayer” on the substrate surface. Examples of metals for deposition include copper, cobalt, ruthenium, indium, and rhodium.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: February 1, 2005
    Assignee: Novellus Systems, Inc.
    Inventor: James A. Fair
  • Patent number: 6846745
    Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of both hydrogen and fluorine as process gases in the reactive mixture of a plasma-containing CVD reactor. The process gas also includes dielectric forming precursors such as silicon and oxygen-containing molecules.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: January 25, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Vishal Gauri, Raihan M. Tarafdar, Vikram Singh
  • Patent number: 6846391
    Abstract: A process for filling high aspect ratio gaps on substrates uses conventional high density plasma deposition processes to deposit fluorine-doped films, with an efficient sputtering inert gas, such as Ar, replaced or reduced with an inefficient sputtering inert gas such as He and/or hydrogen. By reducing the sputtering component, sidewall deposition from the sputtered material is reduced. Consequently, gaps with aspect ratios greater than 3.0:1 and spacings between lines less than 0.13 microns can be filled with low dielectric constant films without the formation of voids and without damaging circuit elements.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: January 25, 2005
    Assignee: Novellus Systems
    Inventors: George D. Papasouliotis, Robert D. Tas, Patrick A. Van Cleemput, Bart van Schravendijk
  • Patent number: 6844612
    Abstract: A fluorine-doped silica glass (FSG) dielectric layer includes a number of sublayers. Each sublayer is doped with fluorine in such a way that the doping concentration of fluorine in the sublayer decreases as one moves from an interior region of the sublayer towards one or both of the interfaces between the sublayer and adjacent sublayers. This structure reduces the generation of HF when the layer is exposed to moisture and thereby improves the stability and adhesion properties of the layer. The principles of this invention can also be applied to dielectric layers doped with such other dopants as boron, phosphorus or carbon.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: January 18, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Jason Tian, Wenxian Zhu, M. Ziaul Karim, Cong Do
  • Patent number: 6844258
    Abstract: A method for creating a refractory metal and refractory metal nitride cap effective for reducing copper electromigration and copper diffusion is described. The method includes depositing a refractory metal nucleation layer and nitriding at least the upper portion of the refractory metal layer to form a refractory metal nitride. Methods to reduce and clean the copper lines before refractory metal deposition are also described. Methods to form a thicker refractory metal layer using bulk deposition are also described.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: January 18, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Robert H. Havemann, Jungwan Sung, Nerissa Taylor, Sang-Hyeob Lee, Mary Anne Plano
  • Patent number: 6841044
    Abstract: A process merges chemical vapor deposition and physical vapor deposition technologies. It allows physical and chemical vapor deposition to occur in the same process chamber, contemporaneously. The “physical” component involves creation of ionized metal atoms. Ionization is typically accomplished via a plasma within the chamber. If the metal vapor is generated by sputtering, a separate plasma generation mechanism may be employed, which is different from the mechanism employed to generate a “source plasma” for generating sputtering species (e.g., argon ions). Alternatively, a single plasma source may be employed to generate the sputtering species and provide additional ionization of the metal vapor, as is the case with hollow cathode magnetron chambers. In some cases, the CVD precursor is introduced through a first line into the process chamber, while a sputtering gas is introduced via a second line.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: January 11, 2005
    Assignee: Novellus Systems, Inc.
    Inventor: David Ruzic
  • Patent number: 6827982
    Abstract: The adhesion of overlying layers to a silicalite-plus-binder dielectric layer is enhanced by forming a layer that includes the binder in a higher concentration. The overlying layer, e.g., silicon dioxide, silicon carbide or silicon nitride, adheres more tightly to the higher-concentration binder layer. Although the presence of the higher-concentration binder layer may increase the dielectric constant of the overall silicalite-plus-binder stack, the increase is generally minimal.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: December 7, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Judy Huang, Justin F. Gaynor, Archita Sengupta
  • Publication number: 20040231996
    Abstract: A negative bias is applied to an integrated circuit wafer immersed in an electrolytic plating solution to generate a DC current. After about ten percent to sixty percent of the final layer thickness has formed in a first plating time, biasing is interrupted during short pauses during a second plating time to generate substantially zero DC current. The pauses are from about 2 milliseconds to 5 seconds long, and typically about 10 milliseconds to 500 milliseconds. Generally, about 2 pauses to 100 pauses are used, and typically about 3 pauses to 15 pauses. Generally, the DC current density during the second plating time is greater than the DC current density during the initial plating time. Typically, the integrated circuit wafer is rotated during electroplating. Preferably, the wafer is rotated at a slower rotation rate during the second plating time than during the first plating time.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: Novellus Systems, Inc.
    Inventors: Eric G. Webb, Jonathan D. Reid, John H. Sukamto, Sesha Varadarajan, Margolita M. Pollack, Bryan L. Buckalew, Tariq Majid
  • Patent number: 6821407
    Abstract: An electroplating system includes (a) a phosphorized anode having an average grain size of at least about 50 micrometers and (b) plating apparatus that separates the anode from the cathode and prevents most particles generated at the anode from passing to the cathode. The separation may be accomplished by interposing a microporous chemical transport barrier between the anode and cathode. The relatively few particles that are generated at the large grain phosphorized copper anode are prevented from passing into the cathode (wafer) chamber area and thereby causing a defect in the part.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: November 23, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Timothy Mark Archer, Thomas Tan Vu, Seshasayee Varadarajan, Jon Henri, Steven T. Mayer, David Sauer, Anita Kang, Gerald Feldewerth
  • Patent number: 6821794
    Abstract: A system and method for determining endpoint detection in semiconductor wafer planarization is provided. The system and method provide a flexible solution that can compensate for baseline variability induced errors that may otherwise occur in endpoint detection. The system uses an endpoint detection signal that monitors the optical characteristics of the wafer being planarized. The system and method continue to monitor the detection signal during planarization until it meets endpoint criterion that indicates endpoint completion. When the endpoint criterion is reached, a new snapshot is taken from a previous time period and a new baseline is calculated. The endpoint detection signal is then recalculated based upon the new baseline and the recalculated detection signal is again compared to the endpoint criterion. If the recalculated endpoint detection signal again substantially meets the endpoint criterion then the detection of endpoint is confirmed.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: November 23, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas Laursen, Mamoru Yamayoshi
  • Patent number: 6815349
    Abstract: An apparatus for holding work pieces during electroless plating has certain improved features designed for use at relatively high temperatures (e.g., at least about 50 degrees C.). Cup and cone components of a “clamshell” apparatus that engage a work piece are made from dimensionally stable materials with relatively low coefficients of thermal expansion. Further, O-rings are removed from positions that come in contact with the work piece. This avoids the difficulty caused by O-rings sticking to work piece surfaces during high temperature processing. In place of the O-ring, a cantilever member is provided on the portion of the cone that contacts the work piece. Still further, the apparatus makes use of a heat transfer system for controlling the temperature of the work piece backside during plating.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: November 9, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Edmund B. Minshall, Kevin Biggs, R. Marshall Stowell, Wayne Fetters
  • Patent number: 6805801
    Abstract: The present invention pertains to methods and apparatus for removal of one or more solutes from a supercritical process solution. Solute additives and contaminants are removed from supercritical processing solutions via a contaminant removal system that is either part of the process vessel itself or is part of a local recirculation loop in fluid communication with the process vessel. This invention provides supercritical processing methods and apparatus for the removal of additives and contaminants during circulation so that depressurization and substrate removal can occur without contamination. The removal in some cases, for example cleaning residue, can be done continuously during a process to improve its efficiency. Removal mechanisms may include separation, destruction, conversion of the contaminant to acceptable species, or combinations thereof.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: October 19, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Raashina Humayun, Patrick Christopher Joyce
  • Publication number: 20040202786
    Abstract: Methods and apparatus for preparing a low-resistivity tungsten film on a substrate are provided. Methods involve the formation of a tungsten nucleation layer on a substrate using pulsed nucleation layer (PNL) techniques and depositing a bulk tungsten layer thereon. Methods for forming the tungsten nucleation layer involve the use of a boron-containing species, a tungsten-containing precursor, and optionally, a silane. The methods described are particularly useful for applications where thin, low resistivity films are desired, such as interconnect applications.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 14, 2004
    Applicant: Novellus Systems, Inc.
    Inventors: Panya Wongsenakhum, Aaron R. Fellis, Kaihan A. Ashtiani, Karl B. Levy, Juwen Gao, Joshua Collins, Junghwan Sung, Lana Hiului Chan
  • Patent number: 6800142
    Abstract: Methods for cleaning semiconductor wafers are presented. Contaminants, particularly photoresist and post-etch residue, are removed from semiconductor wafers. A wafer or wafers is first treated with a peroxide-containing medium, for example, to oxidatively cleave bond structures of contaminants on the wafer work surface. Excitation energy is used to activate the peroxide-containing medium toward the formation of radical species. After treatment with the peroxide-containing medium, a supercritical fluid treatment is used to remove any remaining contaminants as well as to condition the wafer for subsequent processing.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: October 5, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Adrianne Kay Tipton, Krishnan Shrinivasan, Souvik Banerjee, Raashina Humayun, Patrick Christopher Joyce
  • Patent number: 6800187
    Abstract: An apparatus for engaging a work piece during plating facilitates electrolyte flow during a plating operation. The apparatus helps to control the plating solution fluid dynamics and electric field shape to keep the wafer's local plating environment uniform and bubble free. The apparatus holding the work piece in a manner that facilitates electrolyte circulation patterns in which the electrolyte flows from the center of the work piece plating surface, outward toward the edge of the edge of the work piece. The apparatus holds the work piece near the work piece edges and provides a flow path for electrolyte to flow outward away from the edges of the work piece plating surface. That flow path has a “snorkel” shape in which the outlet is higher than the inlet. In addition, the flow path may have a slot shape that spans much or all of the circumference of holding apparatus. It may be made from a material that resists deformation and corrosion such as certain ceramics.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: October 5, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Steven T. Mayer, R. Marshall Stowell, Evan E. Patton, Jeff A. Hawkins
  • Patent number: 6800173
    Abstract: A deposition system in accordance with one embodiment of the present invention includes a process chamber, a stationary pedestal for supporting a substrate in the process chamber, and a moveable shield forming at least a portion of an enclosure defining the process chamber. Motion of the shield with respect to the stationary pedestal controls a variable gas conductance path for gases flowing through the process chamber thereby modulating the pressure of the process chamber with respect to an external volume. The moveable shield in accordance with an embodiment of the present invention may include several gas channel openings for introducing various process gases into the process chamber. In some embodiments, the moveable shield may alternatively or additionally include an interior cooling or heating channel for temperature control.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: October 5, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Tony P. Chiang, Karl F. Leeser, Jeffrey A. Brown, Jason E. Babcoke