Abstract: A gas monitoring system includes at least one sensor device that detects gas and outputs a detection result; and a gateway that receives the detection result. The at least one sensor device includes a sensor module having a gas sensor that detects gas; an analog-to-digital (A/D) converter that processes the detection result outputted from the gas sensor; a communication module that communicates with the sensor module and transmits information processed by the A/D converter exteriorly of the at least one sensor device; a power source that is an electric power source of the sensor module; and a power source that is an electric power source of the communication module.

Abstract: A light-emitting device including: a mounting substrate including a mounting surface; a light-emitting element disposed on the mounting surface; a light transmissive component disposed on the light-emitting element; and a resin component directly contacting and covering a side surface of the light-emitting element and a side surface of the light transmissive component. The resin component includes a peripheral portion that directly contacts and covers the side surface of the light transmissive component, a protrusion that protrudes from the peripheral portion, and a cover portion that directly contacts and covers an outer edge portion of a topmost surface of the light transmissive component. The height from the mounting surface to a top of the cover portion is greater than a height from the mounting surface to the topmost surface of the light transmissive component, and the topmost surface of the light transmissive component includes a region exposed from the resin component.

Abstract: A semiconductor device includes: a semiconductor layer in a rectangular shape in a plan view; a transistor provided in a first region; and a drain lead-out region provided in a second region. A border line is a straight line parallel to longer sides of the semiconductor layer. The first region includes a plurality of source pads and gate pads. The second region includes a plurality of drain pads. One gate pad among the gate pads is disposed to dispose none of the plurality of source pads between (i) the one gate pad and (ii) one longer side and one shorter side. One drain pad among the plurality of drain pads is in the same shape as the one gate pad and is disposed close to a second vertex. The plurality of source pads include a source pad that is in a rectangular shape or an obround shape having a longitudinal direction parallel to the longer sides of the semiconductor layer.

Abstract: A distance-measuring imaging device includes a light source that applies light according to timing of a light emission signal; a solid-state imager that performs, for an object, exposure according to timing of an exposure signal, and generates raw data corresponding to an exposure amount of the exposure; a signal amount comparator that determines a magnitude relationship in signal amount in the raw data; and a distance calculator that generates and outputs a distance signal based on a determination result. The solid-state imager accumulates, in each of different signal accumulation regions for accumulating signals detected in a same pixel, a signal by exposure in an exposure period that differs in exposure signal timing. The signal amount comparator determines the magnitude relationship between the signals accumulated in the signal accumulation regions. The distance calculator calculates the distance to the object using an arithmetic expression selected depending on the determination result.

Abstract: A voltage measurement device includes: a plurality of voltage detection circuits which measure cell voltages of a plurality of cells connected in series. Each of the plurality of voltage detection circuits includes: a device address generating circuit which generates a device address according to a first address assignment command received from a preceding voltage detection circuit located at a preceding stage; and an address assignment command generating circuit which generates a second address assignment command according to the first address assignment command, and sends the second address assignment command to a next voltage detection circuit located at a next stage.

Abstract: A semiconductor device includes: a mounting board; and a semiconductor element disposed on the mounting board via metal bumps, wherein the semiconductor element includes a semiconductor stacked structure and first electrodes, the mounting board includes second electrodes, the metal bumps include a second layer in contact with the second electrodes of the semiconductor element and a first layer located on a side opposite to the second electrodes, an average crystal grain size of crystals included in the second layer is larger than an average crystal grain size of crystals included in the first layer, and the first layer is spaced apart from the second electrodes of the semiconductor element.

Abstract: In a first vertical field-effect transistor in which first source regions and first connectors each of which electrically connects a first body region and a first source electrode are alternately and periodically disposed in a first direction (Y direction) in which a first trench extends, a ratio of LS [?m] to LB [?m] is at least 1/7 and at most 1/3, where LS denotes a length of one of the first source regions in the first direction, and LB denotes a length of one of the first connectors in the first direction, and LB??0.024×(VGS)2+0.633×VGS?0.721 is satisfied for a voltage VGS [V] of a specification value of a semiconductor device, the voltage VGS being applied to a first gate conductor with reference to an electric potential of the first source electrode.

Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.

Abstract: A solid-state imaging device includes: a plurality of pixel cells arranged in a matrix. In the solid-state imaging device, each of the plurality of pixel cells includes: a photoelectric converter that generates charge by photoelectric conversion, and holds a potential according to an amount of the charge generated; an initializer that initializes the potential of the photoelectric converter; a comparison section that compares the potential of the photoelectric converter and a predetermined reference signal, and causes the initializer to perform initialization when the potential of the photoelectric converter and the predetermined reference signal match; and a counter that counts a total number of times of initialization performed by the initializer, and outputs a signal corresponding to the total number of times as a first signal indicating an intensity of incident light.

Abstract: A semiconductor laser element includes: an n-type cladding layer disposed above an n-type semiconductor substrate (a chip-like substrate); an active layer disposed above the n-type cladding layer; and a p-type cladding layer disposed above the active layer, in which the active layer includes a well layer and a barrier layer, an energy band gap of the barrier layer is larger than an energy band gap of the n-type cladding layer, and a refractive index of the barrier layer is higher than a refractive index of the n-type cladding layer.

Abstract: A semiconductor device includes: a first latch circuit that includes a first inverting circuit, a second inverting circuit, a third inverting circuit, and a fourth inverting circuit; a first first-type well region; a second first-type well region; and a second-type well region. In a plan view, a distance between a drain of a first-type MOS transistor in the first inverting circuit and a drain of a first-type MOS transistor in the third inverting circuit is longer than a distance between the drain of the first-type MOS transistor in the first inverting circuit and a drain of a first-type MOS transistor in the fourth inverting circuit.

Abstract: A solid-state imaging apparatus includes pixel cells arranged in a matrix. Each pixel cell includes: a first photodiode that accumulates a signal charge generated by photoelectric conversion; a second photodiode that functions as a first holder that holds a signal charge that overflows from the first photodiode; a second holder; and a first transfer transistor that transfers the signal charge held in the second photodiode to the second holder.

Abstract: A voltage measurement device is a voltage measurement device including a plurality of voltage detection circuits which measure cell voltages of a plurality of cells connected in series. Each of the plurality of voltage detection circuits includes: a communication end information holding circuit which holds communication end information specifying, as at least one communication end position, at least one of the plurality of voltage detection circuits; and a communication control circuit which controls transfer for sending a communication command received from a preceding voltage detection circuit located at a preceding stage to a next voltage detection circuit located at a next stage, according to the communication end information.

Abstract: A power amplifier device includes: a first power supply terminal for inputting a first power supply voltage; a first transistor for power amplification that (i) includes a first gate to which a bias voltage is applied, and (ii) is supplied with power from the first power supply terminal; a second power supply terminal for inputting a second power supply voltage lower than the first power supply voltage; a second transistor for monitoring that (i) includes a second gate to which the bias voltage is applied, (ii) is supplied with power from the first power supply terminal or the second power supply terminal, and (iii) imitates an operation of the first transistor; and a bias circuit that is supplied with power from the second power supply terminal and generates and adjusts the bias voltage according to a drain current or a source current of the second transistor.

Abstract: A chip singulation method includes, in stated order: forming a surface supporting layer on an upper surface of a wafer; thinning the wafer from the undersurface to reduce the thickness to at most 30 ?m; removing the surface supporting layer from the upper surface; forming a first metal layer and subsequently a second metal layer on the undersurface of the wafer; applying a dicing tape onto an undersurface of the second metal layer; applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer; forming a water-soluble protective layer on the surface of the wafer; cutting the wafer, the first metal layer, and the second metal layer by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and removing the water-soluble protective layer from the surface of the wafer using wash water.

Abstract: Provided is a first vertical field effect transistor in which first source regions and first connection portions via which a first body region is connected to a first source electrode are disposed alternately and cyclically in a first direction in which first trenches extend. In a second direction orthogonal to the first direction, Lxm?Lxr?0.20 ?m holds true where Lxm denotes a distance between adjacent first trenches and Lxr denotes the inner width of a first trench. The lengths of the first connection portions are in a convergence region in which the on-resistance of the vertical field effect transistor at the time when a voltage having a specification value is applied to first gate conductors to supply current having a specification value does not decrease noticeably even when the lengths of the first connection portions are made much shorter.

Abstract: An illumination device includes a first light source that emits first light having a first peak wavelength which is highest in intensity in a wavelength range from near-ultraviolet to green in an emission spectrum; a second light source that emits second light having a second peak wavelength which is highest in intensity in a wavelength range from near-ultraviolet to green in an emission spectrum, the second light illuminating a position identical to a position illuminated by the first light; and a detection device that detects whether an object is present at a given position, wherein the second peak wavelength is shorter than the first peak wavelength, and a luminous flux of the first light is decreased and a luminous flux of the second light is increased when the detection device detects that the object is present at the predetermined position.

Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.

Abstract: A light source unit includes: a first light emission point from which a first beam is emitted; a second light emission point from which a second beam is emitted and which is disposed apart from the first light emission point in a second direction perpendicular to a first direction; a deflection element that deflects the first and/or second beam; and a first condensing optical element that focuses, on a light collection surface, the first and second beams. The first beam at the first light emission point overlaps the second beam at the second light emission point in a third direction, and on the light collection surface, the first and second beams overlap each other in the second direction and are separate from each other in the third direction.

Abstract: A voltage detection circuit includes a first terminal for connecting to one end of a first voltage detection line through a first resistor, the first voltage detection line having another end connected to a cathode or an anode of a first individual battery; a second terminal for connecting to the one end of the first voltage detection line without the first resistor; a first current generating circuit connected to the first terminal; and a voltage detector which detects a voltage of the first terminal and a voltage of the second terminal. The voltage detector includes at least one first AD converter connected to the first terminal, and at least one second AD converter connected to the second terminal.