Patents Assigned to NUVOTON TECHNOLOGY CORPORATION JAPAN
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Patent number: 11200688Abstract: An imaging apparatus that is mounted on a vehicle that runs on a road surface includes: a light source that emits illumination light which is infrared light; a solid-state imaging device that images a subject and outputs an imaging signal indicating a light exposure amount; and a computator that computes subject information regarding the subject by using the imaging signal. The solid-state imaging device includes: first pixels that image the subject by receiving reflected light that is the illumination light reflected off the subject; and second pixels that image the subject by receiving visible light. Information indicated by an imaging signal outputted from the first pixels is information regarding a slope of the road surface, and information indicated by an imaging signal outputted from the second pixels is information regarding an appearance of the road surface.Type: GrantFiled: June 3, 2019Date of Patent: December 14, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kenji Iwahashi, Hiroki Shinde, Tomohiro Honda, Noritaka Shimizu, Hiroshi Iwai, Osamu Shibata
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Patent number: 11194025Abstract: A solid-state imaging device includes: pixels arranged in a matrix on a semiconductor substrate. Each of the pixels includes: a photoelectric converter that converts received light into a signal charge; at least one read gate that reads the signal charge from the photoelectric converter; charge accumulators that each accumulate the signal charge read by the at least one read gate; and a charge holder that receives, from one of the charge accumulators, transfer of the signal charge accumulated in the charge accumulator, holds the signal charge, and transfers, to one of the charge accumulators, the signal charge held, each of the charge accumulators includes a part of a transfer channel and a part of a transfer electrode overlapping with the part of the transfer channel in a planar view of the semiconductor substrate, and the transfer channel per one pixel comprises transfer channels.Type: GrantFiled: March 12, 2020Date of Patent: December 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Sei Suzuki, Junichi Matsuo, Shinichi Kawai
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Patent number: 11195582Abstract: A non-volatile memory device includes: a memory group of a plurality of variable resistance memory cells in which digital data is recorded according to a magnitude of a resistance value, the memory group including at least one data cell and at least one dummy cell which are associated with each other; and a read circuit which performs, in parallel, a read operation on each of the plurality of memory cells included in the memory group. Dummy data, for reducing a correlation between a side-channel leakage generated when the read operation is performed by the read circuit and information data recorded in the at least one data cell, is recorded in the at least one dummy cell.Type: GrantFiled: July 22, 2020Date of Patent: December 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Yuhei Yoshimoto, Yoshikazu Katoh, Naoto Kii
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Patent number: 11195904Abstract: A high-frequency transistor includes a source electrode, a drain electrode, a gate electrode, and a gate drive line that applies a voltage to the gate electrode. An impedance adjustment circuit is connected between the gate electrode and the gate drive line. A characteristic impedance of the gate electrode is Z1, when a connecting point between the impedance adjustment circuit and the gate electrode is viewed from the impedance adjustment circuit. A characteristic impedance of the gate drive line is Z2, when a connecting point between the impedance adjustment circuit and the gate drive line is viewed from the impedance adjustment circuit. X that denotes a characteristic impedance of the impedance adjustment circuit is a value between Z1 and Z2.Type: GrantFiled: July 20, 2020Date of Patent: December 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kouki Yamamoto, Masatoshi Kamitani, Shingo Matsuda, Hiroshi Sugiyama, Kaname Motoyoshi, Masao Nakayama
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Patent number: 11181245Abstract: A light source device includes: a substrate; a light-emitting unit matrix including a plurality of light-emitting units disposed in a matrix on the substrate; and a reflective resin disposed in a region, on the substrate, including a region where the light-emitting unit matrix is disposed. The plurality of light-emitting units include a first light-emitting unit and a second light-emitting unit adjacent to each other in a column direction of the light-emitting unit matrix. The reflective resin includes a first reflective portion disposed between the first light-emitting unit and the second light-emitting unit and extending in a direction intersecting the column direction. At least a portion of an upper surface of the first reflective portion protrudes beyond an upper surface of the first light-emitting unit and an upper surface of the second light-emitting unit.Type: GrantFiled: February 13, 2020Date of Patent: November 23, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Ryota Yuge, Shigeo Hayashi, Tooru Aoyagi, Tetsuya Kamada
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Patent number: 11183615Abstract: A semiconductor device includes: a mounting board; and a semiconductor element disposed on the mounting board via metal bumps, wherein the semiconductor element includes a semiconductor stacked structure and first electrodes, the mounting board includes second electrodes, the metal bumps include a first layer in contact with the first electrodes of the semiconductor element and a second layer located on a side opposite to the first electrodes, an average crystal grain size of crystals included in the first layer is larger than an average crystal grain size of crystals included in the second layer, and the second layer is spaced apart from the first electrodes of the semiconductor element.Type: GrantFiled: December 20, 2018Date of Patent: November 23, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Masanori Hiroki, Shigeo Hayashi, Kenji Nakashima, Toshiya Fukuhisa, Keimei Masamoto, Atsushi Yamada
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Patent number: 11184567Abstract: An imaging device includes: a light source emitting light based on a first pulse; a solid-state imaging element including pixel units and exposing the light based on a second pulse; and a signal processor. Each pixel unit includes a photoelectric converter and charge accumulating units, and generates first to third signal charges by first to third exposure processes in this order to be accumulated in the charge accumulating units. Each of the first and third exposure processes is based on the second pulse delayed from the first pulse by a first period, and the second exposure process is based on the second pulse delayed from the first pulse by a second period. A total period of the first and third exposure processes is equal to that of the second exposure process. The signal processor calculates a distance signal for each pixel unit by using the first to third signal charges.Type: GrantFiled: January 29, 2021Date of Patent: November 23, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Mitsuhiko Otani, Junichi Matsuo
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Patent number: 11175406Abstract: A range imaging system includes a light source unit configured to emit an irradiation light beam to an object, an imaging unit including a solid-state imaging device, and a calculation unit. The solid-state imaging device outputs an image capture signal for forming an image and an imaging signal of a light beam which is obtained when the irradiation light beam emitted is reflected by the object. The calculation unit is configured to calculate range information from the imaging signal, the range information being stored in association with the image.Type: GrantFiled: September 19, 2018Date of Patent: November 16, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventor: Junji Ito
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Patent number: 11171234Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.Type: GrantFiled: August 6, 2020Date of Patent: November 9, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Ryosuke Okawa, Toshikazu Imai, Kazuma Yoshida, Tsubasa Inoue, Takeshi Imamura
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Patent number: 11171465Abstract: A submount includes a substrate, the substrate including: a first surface; a second surface that is perpendicular to the first surface; a third surface that is perpendicular to the first surface and the second surface; a fourth surface that is perpendicular to the first surface and the second surface, and is opposed to the third surface; a fifth surface that is perpendicular to the second surface and the third surface, and is opposed to the first surface; a sixth surface that is opposed to the second surface; a first notch part that is provided in a portion at which the second surface and the third surface are adjacent to each other; and a second notch part that is provided in a portion at which the second surface and the fourth surface are adjacent to each other, the first notch part and the second notch part each having a recessed surface.Type: GrantFiled: January 31, 2020Date of Patent: November 9, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Shinichi Ijima, Kazumasa Nagano, Norio Ikedo
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Patent number: 11171480Abstract: In a switching power supply device including an overload protection circuit, when a load state turns into an overload state due to a decrease in an input voltage, an overload protection signal is activated in response to activation of an overload detection signal, and the overload protection signal is deactivated when an input low voltage detection signal is in an inactive state.Type: GrantFiled: February 19, 2019Date of Patent: November 9, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Takashi Saji, Tomoko Usukura
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Patent number: 11172146Abstract: An imaging apparatus includes: an infrared light source; and a solid-state imaging device. The solid-state imaging device includes: light receivers that convert incident light from the subject to signal charges; a signal storage that stores the signal charges; a signal drain into which the signal charges are discharged; microlenses disposed on the light receivers; and openings through which the incident light enters the light receivers. The solid-state imaging device reads and discharges the signal charges in response to a signal drain voltage being switched between on and off. Each microlens is disposed such that the center of the microlens is displaced toward the center of the pixel array from the center of the corresponding light receiver, as the position of the microlens is closer to the perimeter of the pixel array. The openings have different shapes according to the positions of the openings in the pixel array.Type: GrantFiled: October 2, 2019Date of Patent: November 9, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Takuya Asano, Takuya Nohara
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Patent number: 11163043Abstract: A distance measuring device includes: a light emitter which emits light from a light source to a target object; a light receiver which receives reflected light in a group of pixels two-dimensionally disposed, the reflection light being generated through reflection of the light emitted from the light emitter on the target object; a synthesizer which generates a synthesized signal by synthesizing pixel signals read from pixels exposed at different exposure intervals to generate a synthesized signal; and a distance arithmetic operator which calculates a value of distance to the target object based on the synthesized signal and the difference in time between emission and reception of the light.Type: GrantFiled: December 22, 2017Date of Patent: November 2, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Mayu Nishikawa, Keiichi Mori
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Patent number: 11139848Abstract: A communication system including a transmission device and a reception device which wirelessly communicate with each other. The transmission device includes a transmission circuit that performs: cyclical transmission of a wake-up signal including a specific pattern; and transmission of data. The reception device includes: a standby circuit that receives a signal, and outputs a detection signal indicating reception of the wake up signal when detecting that the specific pattern is cyclically included in the signal received; and a reception circuit that receives the data from the transmission device after the detection signal is output from the standby circuit.Type: GrantFiled: May 14, 2020Date of Patent: October 5, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kenichi Hoshi, Ryoichi Suzuki, Akifumi Nagao, Kentaro Watanabe
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Patent number: 11115611Abstract: A solid-state imaging device includes a first converter which converts an analog signal representing a pixel value to an upper bit of a digital signal, and a second converter which converts the analog signal to a lower bit of the digital signal. The second converter includes a first latch circuit which latches, as phase information, a plurality of clock signals having different phases upon conversion to the upper bit in the first converter, a conversion circuit which generates the lower bit of the digital signal by converting the phase information to a binary value, and an adder, and a second latch circuit which latches an addition result of the adder. The adder adds the binary value converted by the conversion circuit and a value latched by the second latch circuit.Type: GrantFiled: May 12, 2020Date of Patent: September 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Yosuke Higashi, Norihiko Sumitani
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Patent number: 11115009Abstract: A semiconductor integrated circuit includes a first flip-flop that includes a first slave latch, a second flip-flop that includes a second slave latch, and a clock generation circuit that provides a common clock signal to the first flip-flop and the second flip-flop. The first slave latch includes a first inverter, a first feedback inverter that receives an output signal from the first inverter, and a first switch that is connected between an input terminal of the first inverter and an output terminal of the first feedback inverter. The first flip-flop outputs an output signal from the output terminal of the first feedback inverter.Type: GrantFiled: July 14, 2020Date of Patent: September 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventor: Kazuyuki Nakanishi
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Patent number: D934820Type: GrantFiled: October 24, 2019Date of Patent: November 2, 2021Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Ryosuke Okawa, Toshikazu Imai, Kazuma Yoshida, Tsubasa Inoue, Takeshi Imamura
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Patent number: D934821Type: GrantFiled: January 16, 2020Date of Patent: November 2, 2021Assignee: Nuvoton Technology Corporation JapanInventors: Masahide Taguchi, Ryosuke Okawa, Toshikazu Imai
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Patent number: D937232Type: GrantFiled: July 30, 2021Date of Patent: November 30, 2021Assignee: Nuvoton Technology Corporation JapanInventors: Ryosuke Okawa, Toshikazu Imai, Kazuma Yoshida, Tsubasa Inoue, Takeshi Imamura
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Patent number: D937233Type: GrantFiled: July 30, 2021Date of Patent: November 30, 2021Assignee: Nuvoton Technology Corporation JapanInventors: Ryosuke Okawa, Toshikazu Imai, Kazuma Yoshida, Tsubasa Inoue, Takeshi Imamura