Abstract: A biological state detecting apparatus which generates biological information of a person, light sources which emit light having a first wavelength and light having a second wavelength, respectively, an imaging device which receives reflected light of the emitted light, a controller which controls the light sources, an arithmetic operator which reads out a first image and a second image from the imaging device and performs an arithmetic operation thereon, and a state estimator which generates the biological information of the person. The arithmetic operator generates a distance image based on the first image and the second image.

Abstract: A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts.

Abstract: An output buffer of a super source follower for driving a reference ramp signal of a column-parallel single slope type ADC of a solid-state imaging device is made as a class AB feedback configuration for controlling a feedback variable current source with a signal obtained by amplifying a current fluctuation flowing through an amplification transistor by an amplifier, and thereby, the upper limit of the drain voltage of the amplification transistor is not limited by the voltage between the gate and the source of the feedback variable current source.

Abstract: A nitride light emitter includes: a nitride semiconductor light-emitting element including an AlxGa1-xN substrate (0?x?1) and a multilayer structure above the AlxGa1-xN substrate; and a submount substrate on which the nitride semiconductor light-emitting element is mounted. The multilayer structure includes a first clad layer of a first conductivity type, a first light guide layer, a quantum-well active layer, a second light guide layer, and a second clad layer of a second conductivity type which are stacked sequentially from the AlxGa1-xN substrate. The multilayer structure and submount substrate are opposed to each other. The submount substrate comprises diamond. The nitride semiconductor light-emitting element has a concave warp on a surface closer to the AlxGa1-xN substrate.

Abstract: A voltage detection circuit measures a plurality of cell voltages of an assembled battery configured by connecting a plurality of cells in series. The voltage detection circuit includes a plurality of input terminals connected to respective electrodes of the plurality of cells through a plurality of voltage detection lines; a multiplexer that periodically selects and outputs voltages of a plurality of cells in a group, a plurality of series cells configured as the group; an analog-to-digital (AD) converter that AD-converts an output voltage from the multiplexer and outputs digital data of the output voltage; and a control circuit that controls a timing for the selection by the multiplexer and a timing for the AD conversion. The control circuit switches over a time interval for which the multiplexer selects each of the cells to change a period of the AD conversion.

Abstract: In a method for manufacturing a nitride semiconductor light-emitting element by splitting a semiconductor layer stacked substrate including a semiconductor layer stacked body with a plurality of waveguides extending along the Y-axis to fabricate a bar-shaped substrate, and splitting the bar-shaped substrate along a lengthwise split line to fabricate an individual element, the waveguide in the individual element has different widths at one end portion and the other end portion and the center line of the waveguide is located off the center of the individual element along the X-axis, and in the semiconductor layer stacked substrate including a first element forming region and a second element forming region which are adjacent to each other along the X-axis, two lengthwise split lines sandwiching the first element forming region and two lengthwise split lines sandwiching the second element forming region are misaligned along the X-axis.

Abstract: A noise suppression device includes: a DFT executor that expands a baseband signal into a discrete Fourier series X0(n), the baseband signal being generated by mixing an AM broadcast wave signal including a carrier wave of the angular frequency ?C with a complex sine wave of the same frequency; and an amplitude spectrum calculator that calculates an amplitude spectrum |X0(n)| from X0(n). The noise suppression device also includes: an asymmetric component detector that detects an asymmetric component in |X0(n)|; a suppressor that calculates a discrete Fourier series X1(n) by multiplying the value corresponding to the asymmetric frequency bin by a first factor and multiplying the other values by a second factor in X0(n); and an IDFT executor that performs inverse discrete Fourier transform on X1(n) to obtain a discrete-time signal.

Abstract: A solid-state imaging device includes: a first semiconductor substrate including a light receiver that receives incident light; and a second semiconductor substrate including an image processing circuit that processes a signal from the light receiver and generates an image signal. The second semiconductor substrate includes: a nonvolatile memory including a region in which use history data is stored; and a control circuit (use history securing circuit) that restricts output of the image signal when the use history data is stored in the nonvolatile memory.

Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.

Abstract: A method of fabricating a semiconductor light-emitting device includes: (a) forming a semiconductor layer including a light-emitting layer on the first surface of a substrate; (b) forming a first trench and a second trench in the semiconductor layer, the first trench extending in a first direction that is parallel to a principal plane of the substrate, and the second trench being disposed inside and parallel to the first trench; (c) forming a third trench parallel to the first trench in the second surface of the substrate opposite to the first surface of the substrate; and (d) forming a semiconductor light-emitting device by dividing the substrate. In (d), an end of at least one divided side of the semiconductor light-emitting device is in the second trench. The first trench has a first width, and the second trench has a second width. The second width is less than the first width.

Abstract: A solid-state imaging device includes: an imager including pixels arranged in rows and columns; vertical transfer portions in one-to-one correspondence with columns of the pixels, each of which includes a readout electrode that reads out signal charges generated in the pixels and a transfer electrode that transfers the read-out signal charges in the column direction; and a horizontal transfer portion which transfers, in the row direction, the signal charges transferred by the vertical transfer portions, and outputs the signal charges. The imager is formed by alternately disposing, in the column direction, a first row in which visible light pixels each including a first photoelectric converter that converts visible light into signal charges are arranged adjacent in the row direction and a second row in which infrared light pixels each including a second photoelectric converter that converts infrared light into signal charges are arranged adjacent in the row direction.

Abstract: A solid-state imaging device includes: a latch circuit that holds a digital signal of pixel data, the digital signal having 1 bit; a driver circuit that outputs the digital signal held in the latch circuit to a read bit line pair; a sense amplifier connected to the read bit line pair; and a selector circuit that selects whether the digital signal output from the sense amplifier is to be output in normal form or in inverted form.

Abstract: A power supply protection circuit is a circuit that controls a protection switch provided on a power supply line connecting a direct current power supply and a load circuit. The power supply protection circuit includes: circuitry connected to the protection switch; and a controller that switches an operation state of the circuitry between a first state and a second state. The first state is an operation state in which driving of the protection switch is enabled when the protection switch is a first semiconductor switch having a control terminal connected to a semiconductor layer of a first conductivity type. The second state is an operation state in which driving of the protection switch is enabled when the protection switch is a second semiconductor switch having a control terminal connected to a semiconductor layer of a second conductivity type that is different from the semiconductor layer of a first conductivity type.

Abstract: A semiconductor light-emitting element includes: a semiconductor stack including an n-type, layer and a p-type layer and having at least one n exposure portion being a recess where the n-type layer is exposed; a p wiring electrode layer on the p-type layer; an insulating layer (i) continuously covering inner lateral surfaces of at least one n exposure portion and part of a top surface of the p wiring electrode layer and (ii) having an opening portion that exposes the n-type layer; an n wiring electrode layer disposed above the p-type layer and the p wiring electrode layer and in contact with the n-type layer in the opening portion; and at least one first n connecting member connected to the n wiring electrode layer in at least one first n terminal region. The n wiring electrode layer and the p-type layer are disposed below at least one first n terminal region.

Abstract: A resistive element that includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer; a two-dimensional electron gas layer on the first nitride semiconductor layer side at an interface between the first nitride semiconductor layer and the second nitride semiconductor layer; a first electrode ohmically connected to the two-dimensional electron gas layer; a second electrode ohmically connected to the two-dimensional electron gas layer; and an insulating layer between the first electrode and the second electrode in plan view. The two-dimensional electron gas layer functions as an electric resistance element. A conductive layer is not provided above the insulating layer between the first electrode and the second electrode in the plan view. The resistive element has a resistance-value stabilization structure that functions to keep a resistance value of the electric resistance element constant.

Abstract: A semiconductor device includes a mounting substrate; a first wiring electrode and a second wiring electrode disposed on a main surface of a mounting substrate; an interposing member disposed between the first wiring electrode and the second wiring electrode; a semiconductor element flip-chip connected with the first wiring electrode and the second wiring electrode via a first electrical connection member and a second electrical connection member so as to at least partially overlap the interposing member in a top surface view; and a resin disposed in contact with the semiconductor element and the mounting substrate. The wettability of the interposing member to the resin is higher than that of the mounting substrate to the resin. The resin is disposed in contact with the semiconductor element and the interposing member.

Abstract: A monolithic semiconductor device includes: a substrate; a first nitride semiconductor layer disposed on the substrate; a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a first transistor disposed on the substrate and including the first nitride semiconductor layer and the second nitride semiconductor layer, the first transistor being of a high-electron-mobility transistor (HEMT) type for power amplification; and a first bias circuit disposed on the substrate and including a second transistor of the HEMT type disposed outside a propagation path of a radio-frequency signal inputted to the first transistor, the first bias circuit applying bias voltage to a gate of the first transistor.

Abstract: A light-emitting device includes: a mounting substrate including a mounting surface; a light-emitting element disposed on the mounting surface; a light transmissive component disposed on the light-emitting element; and a resin component that covers a side surface of the light-emitting element and a side surface of the light transmissive component. The resin component includes a cover portion that covers an outer edge portion of a topmost surface of the light transmissive component. A height from the mounting surface to a top of the cover portion is greater than a height from the mounting surface to the topmost surface of the light transmissive component. The topmost surface of the light transmissive component includes an exposed region that is exposed from the resin component. The cover portion is disposed continuously along one side of the light transmissive component.

Abstract: A matrix converter control device includes a plurality of delay circuits which correspond to logic change timings of a plurality of input pulse width modulation (PWM) signals for controlling ON and OFF states of a plurality of switching elements included in a matrix converter. Specifically, the plurality of delay circuits are a first delay circuit, a second delay circuit, a third delay circuit, a fourth delay circuit, and a fifth delay circuit. Each of the plurality of delay circuits delays an input PWM signal by an amount of delay set for the delay circuit at a logic change timing corresponding to the delay circuit.