Patents Assigned to NVidia
  • Adding greater realism to a computer-generated image by smoothing jagged edges
    Patent number: 12141946
    Abstract: During the rendering of an image, specific pixels in the image are identified where antialiasing would be helpful. Antialiasing is then performed on these identified pixels, where anti-aliasing is a technique used to add greater realism to a digital image by smoothing jagged edges. This reduces a cost of performing antialiasing by reducing a number of pixels within an image on which antialiasing is performed.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: November 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Adam Christopher Marrs, Josef B. Spjut, Holger Heinrich Gruen, Morgan McGuire, Rahul Sathe
  • Implementing hardware-based memory safety for a graphic processing unit
    Patent number: 12135781
    Abstract: While a compiler compiles source code to create an executable binary, code is added into the compiled source code that, when executed, identifies and stores in a metadata table base and bounds information associated with memory allocations. Additionally, additional code is added into the compiled source code that enables hardware to determine a safety of memory access requests during an implementation of the compiled source code by performing an out-of-bounds (OOB) check in hardware using the base and bounds information stored in the metadata table. This enables the identification and avoidance of unsafe memory operations during the implementation of the executable by a GPU.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: November 5, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Aamer Jaleel, Mohamed Tarek Bnziad Mohamed Hassan, Mark Stephenson
  • Hardware-efficient PAM-3 encoder and decoder
    Patent number: 12135607
    Abstract: Data bits are encoded in one or both of an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol (11b7s) format and a three bit two symbol (3b2s) format on a plurality of data channels and on an error correction channel. One or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as 11b7s and/or 3b2s PAM-3 symbols on the error correction channel.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: November 5, 2024
    Assignee: NVIDIA Corp.
    Inventors: Gautam Bhatia, Sunil Sudhakaran, Kyutaeg Oh
  • Glare mitigation using image contrast analysis for autonomous systems and applications
    Patent number: 12136249
    Abstract: In various examples, contrast values corresponding to pixels of one or more images generated using one or more sensors of a vehicle may be computed to detect and identify objects that trigger glare mitigating operations. Pixel luminance values are determined and used to compute a contrast value based on comparing the pixel luminance values to a reference luminance value that is based on a set of the pixels and the corresponding luminance values. A contrast threshold may be applied to the computed contrast values to identify glare in the image data to trigger glare mitigating operations so that the vehicle may modify the configuration of one or more illumination sources so as to reduce glare experienced by occupants and/or sensors of the vehicle.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: November 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Igor Tryndin, Abhishek Bajpayee, Yu Wang, Hae-Jong Seo
  • Virtual channel starvation-free arbitration for switches
    Patent number: 12137055
    Abstract: A switching system having input ports and output ports and comprising an input queued (IQ) switch with virtual channels. Typically, only one virtual channel can, at a given time, access a given output port. Typically, the IQ switch includes an arbiter apparatus that controls the input ports and output ports to ensure that an input port transmits at most one cell at a time, and/or that an output port receives a cell over only one virtual channel, and/or an output port receives at most one cell at a time.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: November 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Anil Mugu, Srijith Haridas
  • SYNTHETIC DATA GENERATION USING VIEWPOINT AUGMENTATION FOR AUTONOMOUS SYSTEMS AND APPLICATIONS
    Publication number: 20240362897
    Abstract: In various examples, systems and methods are disclosed relating to synthetic data generation using viewpoint augmentation for autonomous and semi-autonomous systems and applications. One or more circuits can identify a set of sequential images corresponding to a first viewpoint and generate a first transformed image corresponding to a second viewpoint using a first image of the set of sequential images as input to a machine-learning model. The one or more circuits can update the machine-learning model based at least on a loss determined according to the first transformed image and a second image of the set of sequential images.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 31, 2024
    Applicant: NVIDIA Corporation
    Inventors: Tzofi Klinghoffer, Jonah Philion, Zan Gojcic, Sanja Fidler, Or Litany, Wenzheng Chen, Jose Manuel Alvarez Lopez
  • Physically unclonable cell using dual-interlocking and error correction techniques
    Patent number: 12131800
    Abstract: PUF cells utilizing a dual-interlocking scheme demonstrating improved noise immunity and stability across different V/T conditions and different uses over time in noisy environments. The PUF cell may be advantageously utilized in conjunction with error detection techniques that screen out unstable cells. A set of such PUF cells utilized to generate a device-specific bit pattern, for example a master key.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: October 29, 2024
    Assignee: NVIDIA Corp.
    Inventors: Mahmut Ersin Sinangil, Sudhir Shrikantha Kudva, Nikola Nedovic, Carl Thomas Gray
  • Hardware support for optimizing huge memory page selection
    Patent number: 12130750
    Abstract: Computer systems often employ virtual address translation hierarchies in which virtual memory addresses are mapped to physical memory. Use of the virtual address translation hierarchy speeds up the virtual address translation when the required mapping is stored in one of the higher levels of the hierarchy. To reduce a number of misses occurring in the virtual address translation hierarchy, huge memory pages may be selectively employed, which map larger continuous regions of virtual memory to continuous regions of physical memory, thereby increasing the coverage of each entry in the virtual address translation hierarchy. The present disclosure provides hardware support for optimizing this huge memory page selection.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: October 29, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Aninda Manocha, Zi Yan, David Nellans
  • Techniques for controlling computing performance for power-constrained multi-processor computing systems
    Patent number: 12130687
    Abstract: A computer-implemented method of controlling power consumption in a multi-processor computing device comprises: determining whether a first processor is operating in a high-power regime or a low-power regime; selecting a first set of control rules that includes a first subset of control rules that apply when the first processor is operating in the high-power regime and a second subset of control rules that apply when the first processor is operating in the low-power regime; determining one or more power settings for the first processor based on the first set of control rules; and causing the first processor to perform one or more operations based on the one or more power settings.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: October 29, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Thomas E. Dewey, Michael Irwin, Simon Lai, Sau Yan Keith Li
  • Hardware-efficient PAM-3 encoder and decoder
    Patent number: 12132590
    Abstract: Data bits are encoded in one or both of an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol (11b7s) format and a three bit two symbol (3b2s) format on a plurality of data channels, one or more auxiliary data channels, and an error correction channel. One or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as 11b7s and/or 3b2s PAM-3 symbols on an error correction channel.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: October 29, 2024
    Assignee: NVIDIA, Corp.
    Inventor: Sunil Sudhakaran
  • Leaf spring for an integrated circuit heat sink
    Patent number: 12129901
    Abstract: Various embodiments of the present disclosure relate to a leaf spring for coupling a heat sink to an integrated circuit, where the leaf spring includes a central portion that has an aperture, a first spring arm that is formed on a first side of the central portion and includes a first through-hole for a first fastener, and a second spring arm that is formed on a second side of the central portion and includes a second through-hole for a second fastener. In various embodiments, a first bending axis passes through the first side and is substantially perpendicular to a longitudinal axis of the leaf spring that passes through the first through-hole and the second through-hole, and a second bending axis passes through the second side and is substantially perpendicular to the longitudinal axis of the leaf spring.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: October 29, 2024
    Assignee: NVIDIA Corporation
    Inventors: Shenglei Wang, Qiang Chen, Yifei Dou, John Harold Drew
  • Object fence generation for lane assignment in autonomous machine applications
    Patent number: 12131556
    Abstract: In various examples, object fence corresponding to objects detected by an ego-vehicle may be used to determine overlap of the object fences with lanes on a driving surface. A lane mask may be generated corresponding to the lanes on the driving surface, and the object fences may be compared to the lanes of the lane mask to determine the overlap. Where an object fence is located in more than one lane, a boundary scoring approach may be used to determine a ratio of overlap of the boundary fence, and thus the object, with each of the lanes. The overlap with one or more lanes for each object may be used to determine lane assignments for the objects, and the lane assignments may be used by the ego-vehicle to determine a path or trajectory along the driving surface.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: October 29, 2024
    Assignee: NVIDIA Corporation
    Inventors: Josh Abbott, Miguel Sainz Serra, Zhaoting Ye, David Nister
  • Keeper-free volatile memory system
    Patent number: 12131775
    Abstract: A static random access memory (SRAM) or other bit-storing cell arrangement includes memory cells and a hierarchical bitline structure including local bitlines for subsets of the memory banks and a global bitline spanning the subsets. A keeper circuit for the global bitline is replaced by bias circuitry on output transistors of the memory cells.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: October 29, 2024
    Assignee: NVIDIA Corp.
    Inventors: Lalit Gupta, Stefan P Sywyk, Andreas Jon Gotterba, Jesse Wang
  • Real-time persistent object tracking for intelligent video analytics systems
    Patent number: 12125277
    Abstract: Apparatuses, systems, and techniques for real-time persistent object tracking for intelligent video analytics systems. A state of a first object included in an environment may be tracked based on a first set of images depicting the environment. The first set of images may be generated during a first time period. It may be determined that the first object is not detected in the environment depicted in a second set of images. The second set of images may be generated during a second time period that is subsequent to the first time period. One or more predicted future states of the first object may be obtained in view of the state of the first object in the environment depicted in the first set of images. A second object may be detected in the environment depicted in a third set of images generated during a third time period that is subsequent to the second time period.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: October 22, 2024
    Assignee: NVIDIA Corporation
    Inventors: Joonhwa Shin, Fangyu Li, Zheng Liu, Kaustubh Purandare
  • Context-based state estimation
    Patent number: 12122392
    Abstract: State information can be determined for a subject that is robust to different inputs or conditions. For drowsiness, facial landmarks can be determined from captured image data and used to determine a set of blink parameters. These parameters can be used, such as with a temporal network, to estimate a state (e.g., drowsiness) of the subject. To improve robustness, an eye state determination network can determine eye state from the image data, without reliance on intermediate landmarks, that can be used, such as with another temporal network, to estimate the state of the subject. A weighted combination of these values can be used to determine an overall state of the subject. To improve accuracy, individual behavior patterns and context information can be utilized to account for variations in the data due to subject variation or current context rather than changes in state.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: October 22, 2024
    Assignee: Nvidia Corporation
    Inventors: Yuzhuo Ren, Niranjan Avadhanam
  • Outlet quality factor stabilization for datacenter cooling systems
    Patent number: 12127381
    Abstract: Systems and methods for cooling a datacenter are disclosed. In at least one embodiment, one or more outlet reservoirs are associated with a stabilizing subsystem and a rack so that one or more outlet reservoirs can receive two-phase fluid that is outlet from a plurality of cold plates of a rack and so that a stabilizing subsystem can stabilize a quality factor of a two-phase fluid to a predetermined quality factor before heat is removed from a two-phase fluid and it is cycled to such cold plates.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: October 22, 2024
    Assignee: Nvidia Corporation
    Inventor: Ali Heydari
  • Staged commissioning for datacenter cooling systems
    Patent number: 12127374
    Abstract: Systems and methods for a datacenter cooling system are disclosed. In at least one embodiment, reconfigurable terminations are provided for fluid loops in a datacenter cooling system with individual ones of such reconfigurable terminations are to be configured in a first state to enable non-cooling fluid runs through individual ones of such fluid loops, taken individually and in combination, during commissioning of a datacenter cooling system, and are to be configured in a second state to enable cooling fluid runs to cool at least one cold plate after commissioning of a datacenter cooling system.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: October 22, 2024
    Assignee: Nvidia Corporation
    Inventor: Ali Heydari
  • Generating computer simulations of manipulations of materials based on machine learning from measured statistics of observed manipulations
    Patent number: 12122053
    Abstract: Apparatuses, systems, and techniques to identify at least one physical characteristic of materials from computer simulations of manipulations of materials. In at least one embodiment, physical characteristics are determined by comparing measured statistics of observed manipulations to simulations of manipulations using a simulator trained with a likelihood-free inference engine.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: October 22, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Carolyn Linjon Chen, Yashraj Shyam Narang, Fabio Tozeto Ramos, Dieter Fox
  • Method for efficient grouping of cache requests for datapath scheduling
    Patent number: 12124378
    Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: October 22, 2024
    Assignee: NVIDIA Corporation
    Inventors: Gregory A. Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
  • Conversational AI-encoded language for data compression
    Patent number: 12126791
    Abstract: Systems and methods of compressing video data are disclosed. The proposed systems provide a computer-implemented process configured to classify a person's behavior(s) during a video and encode the behaviors as a representation of the video. When playback of the video is requested, a reconstruction of the video is generated by a video synthesizer based on a reference image of the person and the sequence of codes corresponding to their behavior during the video. Storage and transmission of the video can then be limited to the reference image and the behavioral codes rather than the video file itself, significantly reducing memory and bandwidth requirements.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: October 22, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Pratyush Mahapatra, Somayyeh Rahimi, Ruthie Lyle