Abstract: A method, user equipment, network equipment and a system for initiating a wireless connection and subsequent communication over a shared physical resource in a wireless communication system between user equipment and network equipment comprising: processing a UE-derived temporary identifier; determining a set of channels that the user equipment will monitor; implicitly or explicitly communicating this channel set; communicating the temporary identifier as an identifier to the network equipment; communicating a downlink message on a channel belonging to the determined channel set conveying the temporary identifier and a description of a scheduled resource on a shared channel, the scheduled resource comprising a resource allocated to the user equipment by the network equipment; and communicating data on the scheduled resource in response to the downlink message.

Abstract: A three dimensional (3D) graphics application programming interface (API) extension provides support for specifying images in a shared exponent format. The shared exponent format is used to represent high dynamic range textures in a compact encoding to reduce the memory footprint needed to store the image data compared with other high dynamic range formats. Image data is encoded to and decoded from the shared exponent format using a pixel processing pipeline. Image data encoded into the shared exponent format can be decoded and used as texture data during rendering.

Abstract: An exemplary system of the present disclosure comprises a memory controller, a command bus, a data bus, a memory device and a memory. The memory device is coupled to the memory controller by the command bus and the data bus. The memory stores instructions that when executed by the computer system perform a method of requesting data from the memory device. This method comprises receiving a plurality of commands for the memory device from the command bus, the memory device clocked by a clock. At least one command of the plurality of commands includes a first command and a second command within a single clock cycle of said clock. At least one of the first command and second command is a data access command. The first command is executed during a first clock cycle and the second command is executed during a second subsequent clock cycle.

Abstract: A system and method are provided for determining a time for safely sampling a signal of a clock domain. In one embodiment, a frequency estimate of a first clock domain is calculated utilizing a frequency estimator. Additionally, a time during which a signal from the first clock domain is unchanging is determined such that the signal is capable of being safely sampled by a second clock domain, using the frequency estimate. In another embodiment, a frequency estimate of a first clock domain is calculated utilizing a frequency estimator. Further, a phase estimate of the first clock domain is calculated based on the frequency estimate, utilizing a phase estimator. Moreover, a time during which a signal from the first clock domain is unchanging is determined such that the signal is capable of being safely sampled by a second clock domain, using the phase estimate.

Abstract: A VLC data transfer interface is presented that allows digital data to be packed and assembled according to a format selectable from a number of formats while the data is being transferred to a desired destination.

Abstract: One embodiment of the present invention sets forth a technique for reducing the overhead for transmitting explicit begin and explicit end commands that are needed in primitive draw command sequences. A draw method includes a header to specify an implicit begin command, an implicit end command, and instancing information for a primitive draw command sequence. The header is followed by a packet including one or more data words (dwords) that each specify a primitive topology, starting offset into a vertex or index buffer, and vertex or index count. Only a single clock cycle is consumed to transmit and process the header. The performance of graphics application programs that have many small batches of geometry (as is typical of many workstation applications) may be improved since the overhead of transmitting and processing the explicit begin and explicit end draw commands is reduced.

Abstract: A cellular communication system (100) is arranged to support a single cell identifier reuse pattern using a first communication. Management logic (146) comprises broadcast mode logic (150) arranged to support a common cell identifier reuse pattern for broadcast transmissions amongst a cluster of communication cells using a second communication. A plurality of wireless serving communication units are operably coupled to the management logic. At least one wireless communication unit comprises logic arranged to support a unicast communication using a first communication cell identifier and logic arranged to support broadcast communication using a common cell identifier (215) to be used by the wireless communication unit in receiving broadcast communication across the cluster of communication cells.

Abstract: A time division duplex (TDD) cellular communication system (100) is arranged to support both uplink and downlink communication allocated for unicast time division duplex (TDD) communication that uses a single cell identifier reuse pattern. The TDD cellular communication system (100) comprises a plurality of wireless serving communication units operably coupled to management logic. The TDD cellular communication system (100) further comprises management logic (146) arranged to partition time domain physical resources such that unicast communication using the single cell identifier reuse pattern is supported in a first portion of the time domain physical resource and a broadcast communication using a common cell identifier (215) reuse pattern for broadcast communications is supported in a second portion of the time domain physical resource.

Abstract: Determining a schedule of instructions for an integrated circuit graphics pipeline. The method includes accessing a state of a host system. The state comprises operations to be performed on fragments to be processed by the graphics pipeline. The method further includes determining a vector based on the state and indexing a table based on the vector to obtain a predetermined listing and ordering of macro-operations to be executed. The method still further includes determining instructions for programming the graphics pipeline based the executing of the macro-operations in the scheduled order.

Abstract: Write operations to a unit of compressible memory, known as a compression tile, are examined to see if data blocks to be written completely cover a single compression tile. If the data blocks completely cover a single compression tile, the write operations are coalesced into a single write operation and the single compression tile is overwritten with the data blocks. Coalescing multiple write operations into a single write operation improves performance, because it avoids the read-modify-write operations that would otherwise be needed.

Abstract: An apparatus for calibrating gain of an radio frequency receiver (“Rx”) is disclosed to provide, among other things, a structure for performing in-situ gain calibration of an RF integrated circuit over time and/or over temperature without removing the RF integrated circuit from its operational configuration, especially when the gain of the RF integrated circuit is susceptible to variations in process, such as inherent with the CMOS process. In one embodiment, an exemplary apparatus includes a thermal noise generator configured to generate thermal noise as a calibrating signal into an input of an Rx path of an RF integrated circuit. The apparatus also includes a calibrator configured to first measure an output signal from an output of the Rx path, and then adjust a gain of the Rx path based on the thermal noise. In one embodiment, the thermal noise generator further includes a termination resistance and/or impedance.

Abstract: A system for compressed data transfer across a graphics bus in a computer system. The system includes a bridge, a system memory coupled to the bridge, and a graphics bus coupled to the bridge. A graphics processor is coupled to the graphics bus. The graphics processor is configured to compress graphics data and transfer compressed graphics data across the graphics bus to the bridge for subsequent storage in the system memory.

Abstract: A method and system for interface compression in a raster stage of a graphics processor. The method includes receiving a graphics primitive for rasterization in a raster stage of a graphics processor and rasterizing the graphics primitive at a first level in a coarse raster component to generate a plurality of tiles related to the graphics primitive. The method determines whether a window ID operation is required for the plurality of tiles. If the operation is required, a respective plurality of uncompressed coverage masks for the tiles are output from the coarse raster component to a fine raster component on a one coverage mask per clock cycle basis. If the operation is not required, a compressed coverage mask for the tiles is output in a single clock cycle. The tiles are subsequently rasterized at a second-level in the fine raster component to generate pixels related to the graphics primitive.

Abstract: A cellular communication system (100) comprises management logic (146) having broadcast mode logic (150) arranged to support a common cell identifier reuse pattern for broadcast transmissions amongst a cluster of communication cells. A plurality of wireless serving communication units is operably coupled to the management logic. At least one wireless communication unit comprises a receiver for receiving a broadcast signal from both a first serving wireless communication unit and a second serving wireless communication unit wherein both the first serving wireless communication unit and second serving wireless communication unit use a common cell identifier (215) reuse pattern for broadcast transmissions to be used by the at least one wireless communication unit in receiving broadcast communication across the cluster of communication cells.

Abstract: One embodiment of the present invention sets forth a method for dynamically load balancing rendering operations across an IGPU and a DGPU. For each frame, the graphics driver configures the IGPU to pre-compute Z-values for a portion of the display surface and to write feedback data to the system memory indicating the time that the IGPU used to process the frame. The graphics driver then configures the DGPU to use the pre-computed Z-values while rendering to the complete display surface and to write feedback data to the system memory indicating the time that the DGPU used to process the frame. The graphics driver uses the feedback data from the IGPU and DGPU in conjunction with the percentage of the display surface that the IGPU Z-rendered for the frame to scale the portion of the display surface that the IGPU Z-renders for one or more subsequent frames. In this fashion, overall processing within the graphics pipeline is optimized across the IGPU and DGPU.

Abstract: Methods and apparatuses are presented for graphics operations with thread count throttling, involving operating a processor to carry out multiple threads of execution of, wherein the processor comprises at least one execution unit capable of supporting up to a maximum number of threads, obtaining a defined memory allocation size for allocating, in at least one memory device, a thread-specific memory space for the multiple threads, obtaining a per thread memory requirement corresponding to the thread-specific memory space, determining a thread count limit based on the defined memory allocation size and the per thread memory requirement, and sending a command to the processor to cause the processor to limit the number of threads carried out by the at least one execution unit to a reduced number of threads, the reduced number of threads being less than the maximum number of threads.

Abstract: Systems and methods storing data for multi-threaded processing permit multiple execution threads to store data in a single first-in first-out (FIFO) memory. Threads are assigned to classes, with each class including one or more threads. Each class may be allocated dedicated entries in the FIFO memory. A class may also be allocated shared entries in the FIFO memory. The shared entries may be used by any thread. Data for a first thread may be stored in the FIFO memory while data for a second thread is read from the FIFO memory, even when the first thread and the second thread are not in the same class. The FIFO memory is shared between the threads to conserve die area, however each thread may be executed independently, as if each thread has a dedicated FIFO memory.

Abstract: A cellular communication system comprises a first communication network arranged to use a single cell identifier reuse pattern; a second communication network comprising a cluster of communication cells and arranged to use a common cell identifier reuse pattern for broadcast transmissions. The cellular communication system further comprises management logic (146) having broadcast mode logic (150) operably coupled to at least the second communication network; and a plurality of wireless serving communication units operably coupled to the management logic. The broadcast mode logic (150) applies the same common cell identifier to be used by the plurality of wireless serving communication units in transmitting broadcast communications across the cluster of communication cells in the second network.

Abstract: Vertex data can be accessed for a graphics primitive. The vertex data includes homogeneous coordinates for each vertex of the primitive. The homogeneous coordinates can be used to determine perspective-correct barycentric coordinates that are normalized by the area of the primitive. The normalized perspective-correct barycentric coordinates can be used to determine an interpolated value of an attribute for the pixel. These operations can be performed using adders and multipliers implemented in hardware.

Abstract: A method and system for adaptive matrix trimming in an inverse discrete cosine transform (IDCT) operation. At least one row of an input matrix is accessed. At least one matrix element of the row having a value of zero is detected. During execution of an IDCT multiplication operation on the row for generating an output row, IDCT multiplication operation for a matrix element having a value of zero is skipped.