Abstract: In one embodiment, a computer system comprises two or more graphics cards, each graphics card comprising: a graphics processing unit and an interface. An interface of the first graphics card is coupled to an interface of the second graphics card for enabling communication between the first and second graphics cards. A cable couples the interface of the first graphics card with the interface of the second graphics card. The transmitting speed of data exchanging between graphics cards of the computer system is increased, and the arrangement of the PCB (printed circuit board) of the graphics card is simple and the cost thereof is low.

Abstract: An embodiment in accordance with the invention relates to a set of stereoscopic glasses comprising no-diopter stereoscopic lenses and at least one diopter lens component. An embodiment in accordance with the invention also relates to a lens component used in the stereoscopic glasses. The stereoscopic glasses of an embodiment in accordance with the invention are convenient for customers who are myopic or need to wear glasses.

Abstract: In one embodiment, a method of prioritized compression for 3D video wireless display, the method comprising: inputting video data; abstracting scene depth of the video data; estimating foreground and background for each image of the video data; performing different kinds of compressions to the foreground and background in each image; and outputting the processed video data. Thus, the image quality is not affected by the data loss during the wireless transmission.

Abstract: In one embodiment, a portable 3D media playing device comprises: a telescope-shaped housing; at least one display for displaying video data; and a circuit board coupled to the display for processing video data and transmitting the video data to the display.

Abstract: An embodiment of the present invention includes a device for real-time graphics processing. The device includes an interface coupled to exterior for receiving external data. The device includes a data converter coupled to the interface for converting the external data received from the interface. The device includes a graphics processing unit coupled to the data converter to process the external data that has been converted.

Abstract: A general-purpose graphics processing unit (GPU) module, a system containing the general-purpose GPU module, and a method for driving the system are provided in accordance with various embodiments of the invention. In an embodiment, a general-purpose GPU module comprises a GPU, a data transfer input/output (I/O) port, a power supply I/O port, a control/SYNC module, and a power supply module. When a new general-purpose GPU module is detected being coupled to the transfer link bus, the graphics processing tasks are allocated to all the coupled general-purpose GPU modules. In accordance with various embodiments of the invention, the costs of designing and using GPUs will be decreased.

Abstract: In various embodiments, a circuit and method for monitoring graphics processing unit (GPU) socket degradation is provided. One embodiment comprises: monitoring a voltage delta between a NVVDD voltage conduction point and a NVVDD voltage direct-detection point in a GPU socket; and determining whether the voltage delta is more than a predetermined value. With the present embodiment, the surveillance of the GPU socket degradation can be realized, avoiding continuing to use the GPU socket when it is overly degraded.

Abstract: In one embodiment, a car navigation device is provided. The device comprises: at least one wide-angle camera; a video correction unit for acquiring video data from the wide-angle lens and correcting the video data; a video merging unit for acquiring corrected video data from video correction unit and merging the corrected video data; an image recognition unit for acquiring video from the video merging unit and performing image recognition to the video; and a driving assistant unit for acquiring data from the image recognition unit and assisting driving in accordance with the recognized content. The navigation device provided by various embodiments in accordance with the present invention can correct and recognize the images taken by fisheye lens in real-time so as to assist the driver for driving or drive the car automatically without a human being.

Abstract: In one embodiment, a power adapter comprising: an input for coupling to an external power supply; a transformer module for converting the external power supply voltage to a voltage for an electronic device; a relay coupled between the input and the transformer module; a reset switch coupled to the relay for resetting the relay; a detection input for receiving a control signal from the electronic device to control operation of the relay; and an output for outputting the voltage for charging or supplying power to the electronic device, the output coupled to the transformer module and the relay.

Abstract: An embodiment of the invention includes a device for controlling data reading mode of a hard disk host apparatus. The device comprises a power converter circuit, a power supply toggle-switching circuit, a hard disk access port selection module, a hard disk host converter module, and a power control module. The power control module judges whether the motherboard supplies power for the apparatus in order to select the power supply mode and data transmission channel for the hard disk. If the motherboard supplies power, then power is supplied to the hard disk via the motherboard and the hard disk host controller is selected to provide the data transmission channel for the hard disk. If the motherboard supplies no power, then power is supplied to the hard disk via the external device receptacle and the hard disk host converter module is selected to provide the data transmission channel for the hard disk.

Abstract: Systems and methods for determining a compression tag state prior to memory client arbitration may reduce the latency for memory accesses. A compression tag is associated with each portion of a surface stored in memory and indicates whether or not the data stored in each portion is compressed or not. A client uses the compression tags to construct memory access requests and the size of each request is based on whether or not the portion of the surface to be accessed is compressed or not. When multiple clients access the same surface the compression tag reads are interlocked with the pending memory access requests to ensure that the compression tags provided to each client are accurate. This mechanism allows for memory bandwidth optimizations including reordering memory access requests for efficient access.

Abstract: Vertex data can be accessed for a graphics primitive. The vertex data includes homogeneous coordinates for each vertex of the primitive. The homogeneous coordinates can be used to determine perspective-correct barycentric coordinates that are normalized by the area of the primitive. The normalized perspective-correct barycentric coordinates can be used to determine an interpolated value of an attribute for the pixel. These operations can be performed using adders and multipliers implemented in hardware.

Abstract: A method for more efficiently detecting faces in images is disclosed. The integral image of an image may be calculated. The integral image may be sub-sampled to generate one or more sub-sampled integral images. A plurality of classifiers may be applied in one or more stages to regions of each sub-sampled integral image, where the application of the classifiers may produce classification data. The classification data may be used to determine if a face is associated with any of the regions of each sub-sampled integral image. The face determination results may be used to modify the original image such that, when rendered, the image is displayed with a graphical object identifying the face in the image. Accordingly, face detection processing efficiency may be increased by reducing the number of integral image calculations and processing localized data through application of classifiers to sub-sampled integral images.

Abstract: Embodiments of the present invention set forth systems and methods for compressing thread group data written to frame buffer memory to increase overall memory performance. A compression/decompression engine within the frame buffer memory interface includes logic configured to identify situations where the threads of a thread group are writing similar scalar values to memory. Upon recognizing such a situation, the engine is configured to compress the scalar data into a form that allows all of the scalar data to be written to or read from the frame buffer memory in fewer clock cycles than would be required to transmit the data in uncompressed form to or from memory. Consequently, the disclosed systems and methods are able to effectively increase memory performance when executing thread group STORE and LOAD operations.

Abstract: An encoder provided according to an aspect of the present invention uses different encoding techniques depending on an amount of power available in the corresponding durations. Due to the ability to use such different encoding techniques, power may be optimally utilized. The optimization is further enhanced by dynamically switching between encoding techniques according to power amount availability in corresponding durations. In an embodiment, each encoding technique estimates motion vectors at corresponding level of precision (thereby consuming a corresponding level of power) and the precision level is chosen to correspond to available power budget. The circuitry not required for a desired precision level may be switched off.

Abstract: A device compiler and linker is configured to optimize program code of a co-processor enabled application by resolving generic memory access operations within that program code to target specific memory spaces. In situations where a generic memory access operation cannot be resolved and may target constant memory, constant variables associated with those generic memory access operations are transferred to reside in global memory.

Abstract: One embodiment of the invention sets forth a mechanism for interleaving consecutive display frames rendered at complementary reduced resolutions. The GPU driver configures a command stream associated with a frame received from a graphics application for reduced frame rendering. The command stream specifies a nominal resolution at which the frame should be rendered. The reduced resolution associated with the frame is determined based on the reduced resolution of an immediately preceding frame (i.e., the complementary reduced resolution), if one exists, or on GPU configuration information. The GPU driver then modifies the command stream to specify the reduced resolution. The GPU driver also inserts an upscale command sequence specifying the nominal resolution into the command stream. Once the command stream is configured in such a manner, the GPU driver transmits the command stream to the GPU for reduced rendering.

Abstract: One embodiment of the present invention sets forth a technique for extracting a memory address offset from a 64-bit type-conversion expression included in high-level source code of a computer program. The technique involves receiving the 64-bit type-conversion expression, where the 64-bit type-conversion expression includes one or more 32-bit expressions, determining a range for each of the one or more 32-bit expressions, calculating a total range by summing the ranges of the 32-bit expressions, determining that the total range is a subset of a range for a 32-bit unsigned integer, calculating the memory address offset based on the ranges for the one or more 32-bit expressions, and generating at least one assembly-level instruction that references the memory address offset.

Abstract: A device compiler and linker within a parallel processing unit (PPU) is configured to optimize program code of a co-processor enabled application by rematerializing a subset of live-in variables for a particular block in a control flow graph generated for that program code. The device compiler and linker identifies the block of the control flow graph that has the greatest number of live-in variables, then selects a subset of the live-in variables associated with the identified block for which rematerializing confers the greatest estimated profitability. The profitability of rematerializing a given subset of live-in variables is determined based on the number of live-in variables reduced, the cost of rematerialization, and the potential risk of rematerialization.

Abstract: In one embodiment, a microprocessor includes one or more processing cores. At least one processing core includes a clock shaping circuit that is configured to receive a clock input signal. The clock shaping circuit includes rising edge skew logic that is configured to selectively delay a rising edge of the clock input signal and falling edge skew logic that is configured to selectively delay a falling edge of the clock input signal independent of adjustment of the rising edge.