Patents Assigned to NVidia
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Patent number: 10902556Abstract: The disclosure is directed to a method to compensate for visual distortion when viewing video image streams from a multiple camera capture of a scene where the method determines the disparity difference utilizing the user view orientation and then compresses and/or stretches the left and/or right eye video image streams to compensate for the visual distortion. In another aspect, the method describes additional adjustments and corrections to the video image streams including rotating, tilting, shifting, and scaling the video image streams, and correcting for gapping and clipping visual image artifacts. In another aspect, a visual compensation system is described to implement the method. Additionally, a visual compensation apparatus is disclosed to perform the method operations.Type: GrantFiled: July 16, 2018Date of Patent: January 26, 2021Assignee: Nvidia CorporationInventor: David Cook
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Patent number: 10896021Abstract: The disclosure is directed to a process that can predict an audio glitch, and then attempt to preempt the audio glitch. The process can monitor the systems, processes, and execution threads on a larger system or device, such as a mobile device or an in-vehicle device. Using a learning algorithm, such as deep neural network (DNN), the information collected can generate a prediction of whether an audio glitch is likely to occur. An audio glitch can be an audio underrun condition. The process can use a second learning algorithm, which also can be a DNN, to generate recommended system adjustments that can attempt to prevent the audio glitch from occurring. The recommendations can be for various systems and components on the device, such as changing the processing system frequency, the memory frequency, and the audio buffer size. After the audio underrun condition has abated, the system adjustments can be reversed fully or in steps to return the system to its state prior to the system adjustments.Type: GrantFiled: February 26, 2019Date of Patent: January 19, 2021Assignee: Nvidia CorporationInventors: Utkarsh Vaidya, Sumit Bhattacharya
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Patent number: 10891538Abstract: A method, computer program product, and system perform computations using a processor. A first instruction including a first index vector operand and a second index vector operand is received and the first index vector operand is decoded to produce first coordinate sets for a first array, each first coordinate set including at least a first coordinate and a second coordinate of a position of a non-zero element in the first array. The second index vector operand is decoded to produce second coordinate sets for a second array, each second coordinate set including at least a third coordinate and a fourth coordinate of a position of a non-zero element in the second array. The first coordinate sets are summed with the second coordinate sets to produce output coordinate sets and the output coordinate sets are converted into a set of linear indices.Type: GrantFiled: July 25, 2017Date of Patent: January 12, 2021Assignee: NVIDIA CorporationInventors: William J. Dally, Angshuman Parashar, Joel Springer Emer, Stephen William Keckler, Larry Robert Dennison
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Patent number: 10890620Abstract: Systems and methods enable the updating of tests, test sequences, fault models, and test conditions such as voltage and clock frequencies, over the life cycle of a safety critical application for complex integrated circuits and systems.Type: GrantFiled: May 17, 2019Date of Patent: January 12, 2021Assignee: NVIDIA Corp.Inventors: Milind Bhaiyyasaheb Sonawane, Shantanu K. Sarangi, Sailendra Chadalavada, Sumit Raj, Rangavajjula Kameswara Naga Mahesh, Jayesh Kumar Pandey, Venkat Abilash Reddy Nerallapally
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Patent number: 10891783Abstract: Determining the occlusions or shadows for an area light within a scene is difficult, especially realistic shadowing in large and dynamic scenes. The disclosure provides an adaptive occlusion sampling process that uses voxel cone tracing to distribute the voxel tracing cones on the surface of area lights to obtain samples for shadowing in computer generated images or scenes. A method of adaptive occlusion sampling from a rectangular area light is disclosed that can be used to provide realistic shadowing in a computer generated scene. A process to compute a shadow of an area light within a scene is also disclosed herein that includes obtaining samples, employing voxel cone tracing, from a light surface of the area light based on sample points of a sampling grid created from sample patterns that are based on a determined number of cones.Type: GrantFiled: March 19, 2019Date of Patent: January 12, 2021Assignee: Nvidia CorporationInventor: Alexey Panteleev
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Patent number: 10891775Abstract: A method, computer readable medium, and system are disclosed for implementing automatic level-of-detail for physically-based materials. The method includes the steps of identifying a declarative representation of a material to be rendered, creating a reduced complexity declarative representation of the material by applying one or more term rewriting rules to the declarative representation of the material, and returning the reduced complexity declarative representation of the material.Type: GrantFiled: October 24, 2019Date of Patent: January 12, 2021Assignee: NVIDIA CORPORATIONInventors: Lutz Kettner, Jan Jordan
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Publication number: 20210004235Abstract: A thread execution method in a processor includes executing original instructions of a first thread in a first execution lane of the processor, and interleaving execution of duplicated instructions of the first thread with execution of original instructions of a second thread in a second execution lane of the processor.Type: ApplicationFiled: September 17, 2020Publication date: January 7, 2021Applicant: NVIDIA Corp.Inventors: Siva Kumar Sastry Hari, Michael Sullivan, Timothy Tsai, Stephen W. Keckler
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Patent number: 10885698Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.Type: GrantFiled: August 10, 2018Date of Patent: January 5, 2021Assignee: NVIDIA CorporationInventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
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Patent number: 10884734Abstract: A method, computer readable medium, and processor are disclosed for performing matrix multiply and accumulate (MMA) operations. The processor includes a datapath configured to execute the MMA operation to generate a plurality of elements of a result matrix at an output of the datapath. Each element of the result matrix is generated by calculating at least one dot product of corresponding pairs of vectors associated with matrix operands specified in an instruction for the MMA operation. A dot product operation includes the steps of: generating a plurality of partial products by multiplying each element of a first vector with a corresponding element of a second vector; aligning the plurality of partial products based on the exponents associated with each element of the first vector and each element of the second vector; and accumulating the plurality of aligned partial products into a result queue utilizing at least one adder.Type: GrantFiled: July 1, 2019Date of Patent: January 5, 2021Assignee: NVIDIA CorporationInventors: Brent Ralph Boswell, Ming Y. Siu, Jack H. Choquette, Jonah M. Alben, Stuart Oberman
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Patent number: 10880531Abstract: The disclosure is directed to transforming signals from one signal format to another signal format. For example, the format of a digital signal can change from storing video information in 12 bits of data to storing the video information in 32 bits of data. Other storage values and combinations can also be used. Since the number of bits available to store a portion of the video information can change when changing formats, a process is needed to translate or transform the video information appropriately. A transfer function utilizing a lookup table is used for the transforming. The lookup table utilizes a variable step size segmentation scheme that decreases the amount of lookup table storage space required and also decreases the number of estimation errors, i.e., interpolation errors. Estimation errors can occur when looking up a value not stored in the lookup table, and using neighboring values that are stored to estimate the value requested.Type: GrantFiled: August 17, 2018Date of Patent: December 29, 2020Assignee: Nvidia CorporationInventors: Yanbo Sun, Tyvis Cheung, Gennady Petrov
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Patent number: 10877757Abstract: A just-in-time (JIT) compiler binds constants to specific memory locations at runtime. The JIT compiler parses program code derived from a multithreaded application and identifies an instruction that references a uniform constant. The JIT compiler then determines a chain of pointers that originates within a root table specified in the multithreaded application and terminates at the uniform constant. The JIT compiler generates additional instructions for traversing the chain of pointers and inserts these instructions into the program code. A parallel processor executes this compiled code and, in doing so, causes a thread to traverse the chain of pointers and bind the uniform constant to a uniform register at runtime. Each thread in a group of threads executing on the parallel processor may then access the uniform constant.Type: GrantFiled: February 14, 2018Date of Patent: December 29, 2020Assignee: NVIDIA CorporationInventors: Ajay Tirumala, Jack Choquette, Manan Patel, Shirish Gadre, Praveen Kaushik, Amanpreet Grewal, Shekhar Divekar, Andrei Khodakovsky
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Patent number: 10878611Abstract: In various embodiments, a deduplication application pre-processes index buffers for a graphics processing pipeline that generates rendered images via a shading program. In operation, the deduplication application causes execution threads to identify a set of unique vertices specified in an index buffer based on an instruction. The deduplication application then generates a vertex buffer and an indirect index buffer based on the set of unique vertices. The vertex buffer and the indirect index buffer are associated with a portion of an input mesh. The graphics processing pipeline then renders a first frame and a second frame based on the vertex buffer, the indirect index buffer, and the shading program. Advantageously, the graphics processing pipeline may re-use the vertex buffer and indirect index buffer until the topology of the input mesh changes.Type: GrantFiled: January 26, 2018Date of Patent: December 29, 2020Assignee: NVIDIA CorporationInventors: Ziyad Hakura, Yury Uralsky, Christoph Kubisch, Pierre Boudier, Henry Moreton
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Patent number: 10878770Abstract: Embodiments of the present invention provide a novel solution that uses subjective end-user input to generate optimal image quality settings for an application. Embodiments of the present invention enable end-users to rank and/or select various adjustable application parameter settings in a manner that allows them to specify which application parameters and/or settings are most desirable to them for a given application. Based on the feedback received from end-users, embodiments of the present invention may generate optimal settings for whatever performance level the end-user desires. Furthermore, embodiments of the present invention may generate optimal settings that may be benchmarked either on a server farm or on an end-user's client device.Type: GrantFiled: December 2, 2013Date of Patent: December 29, 2020Assignee: Nvidia CorporationInventors: John Spitzer, Rev Lebaredian, Tony Tamasi
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Patent number: 10871939Abstract: A virtual reality (VR) audio rendering system and method of using HRTF functions to quickly capture new positional cues to pre-computed audio frames responsive to changes in user position relative to sound systems. In a client-server VR system, when a user position change is detected, the client determines an appropriate HRTF based on the new position and convolves them with a set of audio frames that have been generated by the server based on a prior position, resulting in modified frames for rendering. Meanwhile, the client propagates the new position to the server to generate subsequent audio frames for the corrected position. As HRTF convolution is computationally inexpensive, the latency between user position change and the resultant sound change as perceived by the user can be significantly reduced. As a result, an immersive VR experience of the user can be preserved.Type: GrantFiled: November 7, 2018Date of Patent: December 22, 2020Assignee: NVIDIA CorporationInventors: Ambrish Dantrey, Abhijit Patait, Utkarsh Patankar
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Patent number: 10872399Abstract: Photorealistic image stylization concerns transferring style of a reference photo to a content photo with the constraint that the stylized photo should remain photorealistic. Examples of styles include seasons (summer, winter, etc.), weather (sunny, rainy, foggy, etc.), lighting (daytime, nighttime, etc.). A photorealistic image stylization process includes a stylization step and a smoothing step. The stylization step transfers the style of the reference photo to the content photo. A photo style transfer neural network model receives a photorealistic content image and a photorealistic style image and generates an intermediate stylized photorealistic image that includes the content of the content image modified according to the style image. A smoothing function receives the intermediate stylized photorealistic image and pixel similarity data and generates the stylized photorealistic image, ensuring spatially consistent stylizations.Type: GrantFiled: January 11, 2019Date of Patent: December 22, 2020Assignee: NVIDIA CorporationInventors: Yijun Li, Ming-Yu Liu, Ming-Hsuan Yang, Jan Kautz
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Patent number: 10866806Abstract: A compiler parses a multithreaded application into cohesive blocks of instructions. Cohesive blocks include instructions that do not diverge or converge. Each cohesive block is associated with one or more uniform registers. When a set of threads executes the instructions in a given cohesive block, each thread in the set may access the uniform register independently of the other threads in the set. Accordingly, the uniform register may store a single copy of data on behalf of all threads in the set of threads, thereby conserving resources.Type: GrantFiled: February 14, 2018Date of Patent: December 15, 2020Assignee: NVIDIA CorporationInventors: Ajay Tirumala, Jack Choquette, Manan Patel, Shirish Gadre, Praveen Kaushik
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Patent number: 10867214Abstract: Training deep neural networks requires a large amount of labeled training data. Conventionally, labeled training data is generated by gathering real images that are manually labelled which is very time-consuming. Instead of manually labelling a training dataset, domain randomization technique is used generate training data that is automatically labeled. The generated training data may be used to train neural networks for object detection and segmentation (labelling) tasks. In an embodiment, the generated training data includes synthetic input images generated by rendering three-dimensional (3D) objects of interest in a 3D scene. In an embodiment, the generated training data includes synthetic input images generated by rendering 3D objects of interest on a 2D background image. The 3D objects of interest are objects that a neural network is trained to detect and/or label.Type: GrantFiled: January 24, 2019Date of Patent: December 15, 2020Assignee: NVIDIA CorporationInventors: Jonathan Tremblay, Aayush Prakash, Mark A. Brophy, Varun Jampani, Cem Anil, Stanley Thomas Birchfield, Thang Hong To, David Jesus Acuna Marrero
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Patent number: 10867008Abstract: Embodiments of the present invention provide a hierarchical, multi-layer Jacobi method for implementing a dense symmetric eigenvalue solver using multiple processors. Each layer of the hierarchical method is configured to process problems of different sizes, and the division between the layers is defined according to the configuration of the underlying computer system, such as memory capacity and processing power, as well as the communication overhead between device and host. In general, the higher-level Jacobi kernel methods call the lower level Jacobi kernel methods, and the results are passed up the hierarchy. This process is iteratively performed until a convergence condition is reached. Embodiments of the hierarchical Jacobi method disclosed herein offers controllability of Schur decomposition, robust tolerance for passing data throughout the hierarchy, and significant cost reduction on row update compared to existing methods.Type: GrantFiled: September 7, 2018Date of Patent: December 15, 2020Assignee: NVIDIA CorporationInventor: Lung-Sheng Chien
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Patent number: 10866990Abstract: An apparatus, computer readable medium, and method are disclosed for decompressing compressed geometric data stored in a lossless compression format. The compressed geometric data resides within a compression block sized according to a system cache line. An indirection technique maps a global identifier value in a linear identifier space to corresponding variable rate compressed data. The apparatus may include decompression circuitry within a graphics processing unit configured to perform ray-tracing.Type: GrantFiled: July 3, 2019Date of Patent: December 15, 2020Assignee: NVIDIA CorporationInventors: Jaakko Lehtinen, Timo Oskari Aila, Tero Tapani Karras, Alexander Keller, Nikolaus Binder, Carsten Alexander Waechter, Samuli Matias Laine
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Patent number: 10867429Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.Type: GrantFiled: August 10, 2018Date of Patent: December 15, 2020Assignee: NVIDIA CorporationInventors: Samuli Laine, Timo Aila, Tero Karras, Gregory Muthler, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., Craig Kolb, Ignacio Llamas, John Burgess