Abstract: Motion adaptive shading increases rendering performance for real-time animation in graphics systems while maintaining dynamic image quality. Each frame of an animation is statically displayed within a refresh interval, while a viewer's eyes move continuously relative to the image when actively tracking a moving object being displayed. As a result, a statically displayed frame is essentially smeared across the viewer's continuously moving retina over the lifetime of the frame, causing a perception of blur referred to as an eye-tracking motion blur effect. A region of an image depicting a moving object may be rendered at a lower shading rate because eye-tracking motion blur will substantially mask any blur introduced by reducing the shading rate. Reducing an average shading rate for rendering frames reduces computational effort per frame and may advantageously allow a rendering system to operate at a higher frame rate to provide a smoother, clearer visual experience.

Abstract: Various embodiments of the disclosure disclosed herein provide techniques for pre-silicon testing of a design for an integrated circuit. A pre-silicon testing system identifies one or more critical paths included in the integrated circuit. The pre-silicon testing system performs a based noise simulation to generate one or more voltage waveforms at each gate associated with the one or more critical paths. The pre-silicon testing system applies the one or more voltage waveforms to one or more netlists corresponding to the one or more critical paths to generate one or more modified netlists. The pre-silicon testing system performs a timing analysis on the one or more modified netlists to determine a set of slack times that correspond to a set of voltages applied to the integrated circuit. The pre-silicon testing system determines a first critical path that has a lowest slack time relative to all other critical paths.

Abstract: Missing image content is generated using a neural network. In an embodiment, a high resolution image and associated high resolution semantic label map are generated from a low resolution image and associated low resolution semantic label map. The input image/map pair (low resolution image and associated low resolution semantic label map) lacks detail and is therefore missing content. Rather than simply enhancing the input image/map pair, data missing in the input image/map pair is improvised or hallucinated by a neural network, creating plausible content while maintaining spatio-temporal consistency. Missing content is hallucinated to generate a detailed zoomed in portion of an image. Missing content is hallucinated to generate different variations of an image, such as different seasons or weather conditions for a driving video.

Abstract: A method, computer readable medium, and system are disclosed for redirecting a user's movement through a physical space while the user views a virtual environment. A temporary visual suppression event is detected when a user's eyes move relative to the user's head while viewing a virtual scene displayed on a display device, an orientation of the virtual scene relative to the user is modified to direct the user to physically move along a planned path through a virtual environment corresponding to the virtual scene, and the virtual scene is displayed on the display device according to the modified orientation.

Abstract: Unavoidable physical phenomena, such as an alpha particle strikes, can cause soft errors in integrated circuits. Materials that emit alpha particles are ubiquitous, and higher energy cosmic particles penetrate the atmosphere and also cause soft errors. Some soft errors have no consequence, but others can cause an integrated circuit to malfunction. In some applications (e.g. driverless cars), proper operation of integrated circuits is critical to human life and safety. To minimize or eliminate the likelihood of a soft error becoming a serious malfunction, detailed assessment of individual potential soft errors and subsequent processor behavior is necessary. Embodiments of the present disclosure facilitate emulating a plurality of different, specific soft errors. Resilience may be assessed over the plurality of soft errors and application code may be advantageously engineered to improve resilience.

Abstract: A die package is disclosed through which power domains within the chip may be isolated by removing vias within the package substrate, rather than power gating. Multiple substrate options may be configured without specific vias. This eliminates the need to design power gating circuitry into the die, freeing up that die area for more functional logic. The solution allows the die package to retain the same pinout for use by PCB designers, regardless of which power domains are gated.

Abstract: Systems and methods relying on recognition of a pattern in a data stream, such as detecting a hotword in an audio data stream are sensitive to latency (e.g., response time). To reduce power consumption, a low power processor may be used in combination with a higher power speech recognition device. When the hotword is detected by the low power signal processor, the primary speech recognition device is signaled to wake up and begin emptying a buffer storing the hotword and subsequent audio data. Latency is the delay incurred to recognize the hotword and begin emptying the buffer. To catch-up and reduce the latency, the buffer is drained at a faster rate than the buffer is filled until a latency reduction trigger is received. The latency reduction trigger is generated when the latency has been reduced to a predetermined level.

Abstract: Apparatuses, systems, and techniques for performing nested kernel execution within a parallel processing subsystem. In at least one embodiment, a parent thread launches a nested child grid on the parallel processing subsystem, and enables the parent thread to perform a thread synchronization barrier on the child grid for proper execution semantics between the parent thread and the child grid.

Abstract: Techniques for providing multi-antenna devices with increased antenna-to-antenna isolation as well as methods of operating and manufacturing the same are disclosed. A multi-antenna device may include a support structure, one or more radio devices coupled to a first antenna that is coupled to the support structure at a first location, a second antenna coupled to the support structure at a second location and communicatively coupled to the one or more radio devices, and a conductive structure coupled to the support structure so that it shifts an electric field null of the first antenna from an original location toward the second location during communications using the first antenna, thereby increasing isolation between the first antenna and the second antenna. The conductive structure may have a length of approximately one half of the wavelength (e.g., of 2.4 gigahertz or 5 gigahertz) of a frequency band used for the communications.

Abstract: A semi-public blockchain maintained on one or more nodes in a map cloud platform comprises data for maintaining a global map of a predetermined geographic area. The blockchain also comprises a plurality of data records, where each data record is associated with an update to a global map. When a message associated with a map update to the global map is received, the nodes of the blockchain determine a consensus by evaluating the map update, where the evaluating comprises performing a plurality of proofs including a proof of location, a proof of iterations, a proof of physical delivery and a proof of safety. When consensus is attained and the map update is validated, a data record associated with the map update is generated and added to the blockchain with a timestamp and a link to prior data records in the blockchain.

Abstract: A method, computer readable medium, and system are disclosed for a distributed cache that provides multiple processing units with fast access to a portion of data, which is stored in local memory. The distributed cache is composed of multiple smaller caches, and each of the smaller caches is associated with at least one processing unit. In addition to a shared crossbar network through which data is transferred between processing units and the smaller caches, a dedicated connection is provided between two or more smaller caches that form a partner cache set. Transferring data through the dedicated connections reduces congestion on the shared crossbar network. Reducing congestion on the shared crossbar network increases the available bandwidth and allows the number of processing units to increase. A coherence protocol is defined for accessing data stored in the distributed cache and for transferring data between the smaller caches of a partner cache set.

Abstract: In various embodiments, a parallel processor implements a graphics processing pipeline that generates rendered images. In operation, the parallel processor causes execution threads to execute a task shading program on an input mesh to generate a task shader output specifying a mesh shader count. The parallel processor then generates mesh shader identifiers, where the total number of the mesh shader identifiers equals the mesh shader count. For each mesh shader identifier, the parallel processor invokes a mesh shader based on the mesh shader identifier and the task shader output to generate geometry associated with the mesh shader identifier. Subsequently, the parallel processor performs operations on the geometries associated with the mesh shader identifiers to generate a rendered image. Advantageously, unlike conventional graphics processing pipelines, the performance of the graphics processing pipeline is not limited by a primitive distributor.

Abstract: Graphics processing unit (GPU) performance and power efficiency is improved using machine learning to tune operating parameters based on performance monitor values and application information. Performance monitor values are processed using machine learning techniques to generate model parameters, which are used by a control unit within the GPU to provide real-time updates to the operating parameters. In one embodiment, a neural network processes the performance monitor values to generate operating parameters in real-time.

Abstract: A display device includes a display controller that performs a high-throughput dithering operation. The display controller performs a quantization operation with pixel values generated by a graphics processor to generate quantized pixel values and residual error values. The display controller distributes the residual error values associated with a first group of quantized pixel values to a second group of quantized pixel values based on a set of distribution weights. A given distribution weight defines what fraction of a given residual error value is distributed to a given quantized pixel value included in the second group of quantized pixel values. The distribution weights are calibrated to permit the display controller to compute different fractions of residual error values using bit shifting logic instead of complex combinatorial logic.

Abstract: In general, data is susceptible to errors caused by faults in hardware (i.e. permanent faults), such as faults in the functioning of memory and/or communication channels. To detect errors in data caused by hardware faults, the error correcting code (ECC) was introduced, which essentially provides a sort of redundancy to the data that can be used to validate that the data is free from errors caused by hardware faults. In some cases, the ECC can also be used to correct errors in the data caused by hardware faults. However, the ECC itself is also susceptible to errors, including specifically errors caused by faults in the ECC logic. A method, computer readable medium, and system are thus provided for securing against errors in an ECC.

Abstract: A method, computer readable medium, and system are disclosed for rounding floating point values. Dynamic directional rounding is a rounding technique for floating point operations. A floating point operation (addition, subtraction, multiplication, etc.) is performed on an operand to compute a floating point result. A sign (positive or negative) of the operand is identified. In one embodiment, the sign determines a direction in which the floating point result is rounded (towards negative or positive infinity). When used for updating parameters of a neural network during backpropagation, dynamic directional rounding ensures that rounding is performed in the direction of the gradient.

Abstract: Techniques are disclosed for allocating a global memory space defined within physical memory devices into strided memory space(s) (SMS) and partition memory space(s) (PMS). In an embodiment, a SMS is mapped across all of the devices, and a PMS is mapped to a subset of the devices to ensure resource isolation between separate PMSs. Typically, a memory space is allocated in unit sizes. When the locations mapped to most of the SMS align to an integer number of the unit size, a common boundary can be formed between the SMS and the one or more PMSs in each of the devices. Such a boundary can advantageously minimize a region of locations that are not available for allocation in the global memory spaces. In an embodiment, when a strided allocation is not an integer number of the unit size, a remainder is mapped to locations for one or more PMSs.

Abstract: In various examples, a test system is provided for executing built-in-self-test (BIST) according to JTAG and IEEE 1500 on chips deployed in-field. Hardware and software selectively connect onto the IEEE 1500 serial interface for running BIST while the chip is being used in deployment—such as in an autonomous vehicle. In addition to providing a mechanism to connect onto the serial interface, the hardware and software may reduce memory requirements and runtime associated with running the test sequences, thereby making BIST possible in deployment. Furthermore, some embodiments include components configured to store functional states of clocks, power, and input/output prior to running BIST, which permits restoration of the functional states after the BIST.

Abstract: Navigation instructions are determined using visual data or other sensory information. Individual frames can be extracted from video data, captured from passes through an environment, to generate a sequence of image frames. The frames are processed using a feature extractor to generate frame-specific feature vectors. Image triplets are generated, including a representative image frame (or corresponding feature vector), a similar image frame adjacent in the sequence, and a disparate image frame that is separated by a number of frames in the sequence. The embedding network is trained using the triplets. Image data for a current position and a target destination can then be provided as input to the trained embedding model, which outputs a navigation vector indicating a direction and distance over which the vehicle is to be navigated in the physical environment.

Abstract: Embodiments of the present invention reconstruct a waveform at a receiver-end of a channel from an observed waveform physically measured at a probe point near the middle of the channel, where the channel is corrupted by reflections. The channel may be a memory channel of a high-speed I/O interface, for example. Equations to derive the waveform may be created using linear network analysis and/or signal processing, for example. S-parameters may be derived from simulated models representing components from the probe point to the load. The s-parameters together with the load impedance are used to recreate the desired waveform free from corruption due to reflections.