Abstract: A capacitance sensing circuit and method uses a current pulse to charge an external capacitor. A first voltage associated with the external capacitor is converted to current to charge an internal capacitor. A second voltage, which is associated with the internal capacitor that corresponds to the first voltage, is compared with an adjustable threshold voltage to generate a toggle signal. The adjustable threshold voltage is changed in response to the toggle signal, which is associated with a capacitance of the external capacitor.

Abstract: A system and method for processing received radar signals is presented. A steering matrix for the radar system is determined. A measurement vector is determined using signals received by a plurality of receiver modules. An output amplitude vector is initialized using the steering matrix and the measurement vector. An optimized output amplitude vector is determined by determining a diagonal loading vector using the output amplitude vector, calculating a weighting matrix using a first fast Fourier transform of the diagonal loading vector, determining an inverse matrix using the weighting matrix and an identity matrix, and executing a second fast Fourier transform using the inverse matrix to determine the optimized output amplitude vector, wherein the optimized output amplitude vector is determined by a relationship between the steering matrix and the measurement vector. An objects direction of arrival is determined by correlating the optimized output amplitude vector to the measurement vector.

Abstract: A Radio-Frequency (RF) circuit for an RF front-end includes a balanced amplifier with first and second amplifiers and an output directional coupler. First and second ports of the output directional coupler are coupled to outputs of the first and second amplifiers, a third port of the output directional coupler is coupled to an input-output terminal that is configured to be coupled to an antenna, and a fourth port of the output directional coupler is coupled to an input of a receiver amplifier. In a transmit mode, the output directional coupler may couple an RF signal to the input-output terminal. In a receive mode, the output directional coupler may couple a signal received from an antenna to the input of the receiver amplifier.

Abstract: A radar system includes a radar front end with multiple transmit antennas and multiple phase rotators. Each one of the multiple phase rotators is configured to output multiple phase modulated signals to a corresponding set of power amplifiers of a plurality of power amplifiers, where each power amplifier is coupled to one transmit antenna of the multiple transmit antennas.

Abstract: The received RF signal includes a first RF signal encoding a first orthogonal frequency-division multiplexing (OFDM) symbol of a first long-term evolution (LTE) V2X data packet. A legacy long training field (L-LTF) symbol is determined using the received RF signal (608), a channel estimation is calculated (612) using the L-LTF symbol, and legacy signal (L-SIG) field control bits are determined (614) from the received RF signal, the L-SIG field control bits including a plurality of IQ samples. A plurality of candidate L-SIG decodings are generated (618) using the IQ samples and the channel estimation, wherein each candidate L-SIG decoding of the plurality of L-SIG decodings is generated by setting a different number of IQ samples in the L-SIG field control bits to zero values (616), and a first L-SIG decoding of the plurality of candidate L-SIG decodings is identified (624). A data field from the received RF signal is decoded using the first L-SIG decoding (626).

Abstract: A method for updating a device, including: receiving, by the device, a public one-time signature key; receiving, by the device, a secret encryption key; receiving an encrypted update package and signature from an update provider; verifying the signature using the public one-time signature key; decrypting the encrypted update package using the secret encryption key; and updating the device using the decrypted update package.

Abstract: An RF amplifier can be provided with bias control circuitry that includes memory storing stores nominal gate bias voltages for one or more transistors of the amplifier as well as gate bias offset values. The offset values can be used to adjust the gate bias voltage by increasing or reducing the gate bias voltage of the transistor(s) based on a temperature signal received from a temperature sensor. The nominal gate bias voltages and gate bias offset values are determined based upon characterization of the individual transistors of the amplifier and how adjusting the gate bias voltages of these transistors effects the overall performance of the amplifier. The memory is programmed to adjust the gate bias of the transistors to achieved selected performance characteristics such as output linearity, dynamic range, power efficiency, or a selected trade-off between such characteristics over a selected range of operating temperatures.

Abstract: A device may include at least one transmitter unit and at least one receiver unit, wherein the at least one transmitter unit and the at least one receiver unit are configured to transmit and receive radar signals, wherein the at least one transmitter unit and the at least one receiver unit are co-located with a vehicle. A device may include a radar processor, configured to: determine an occupancy map, wherein the occupancy map identifies a location of an object with respect to the automotive radar system, determine, using the occupancy map, a beamforming weight vector w, and transmit, using the at least one transmitter unit, the radar signal using the beamforming weight vector w.

Abstract: A receiver includes an ultra-wideband, UWB, communication unit configured to operate in a radar mode and to receive a synchronization signal transmitted by a transmitter, and a synchronization unit operatively coupled to the UWB communication unit. The synchronization unit is configured to estimate a carrier frequency offset from the synchronization signal, derive a reference time from the synchronization signal, and derive a time window for the reception of a radar packet by the UWB communication unit. The time window is derived from the estimated carrier frequency offset and the reference time. A corresponding method of operating a receiver also is disclosed.

Abstract: A reader of a communication system and method uses a synthesized control signal to cancel a beat frequency signal of an incoming signal, where the beat frequency signal is due to a magnetic coupling of the reader with another reader. The control signal is synthesized using at least one parameter of the beat frequency signal, which is estimated based on the incoming signal.

Abstract: A method of scheduling sessions in an Ultra-wideband, UWB, communications system, and a corresponding computer program, scheduler and UWB communications system. The method includes using a predictive scheduling algorithm to produce a predicted order of appearance of a plurality of UWB sessions in a UWB session sequence. The method also includes storing the predicted order in a buffer. The method further includes performing a plurality of iterations of: on completion of a preceding UWB session in the UWB session sequence, inspecting the buffer to determine a next UWB session in the UWB session sequence; and initiating that next UWB session.

Abstract: An RF package assembly includes a stacked package-on-package arrangement of a first substrate and a second substrate. Each of the first and second substrates include RF signal pads and ground pads. An interface region between the stacked substrates couples the RF signal pads and ground pads of the first substrate to corresponding pads of the second substrate. The interface region includes galvanic connection regions providing a galvanic connection between the each of the first substrate ground pads and each of the corresponding second substrate ground pads. The interface region includes dielectric regions between each of the first substrate RF signal pads and the corresponding second substrate RF signal pads so that RF signals transmitted between the two substrates are capacitively coupled.

Abstract: A clock circuit comprising a voltage-controlled oscillator having an input coupled to an output of an amplifier, and an output, outputting an output clock signal. The clock circuit further comprises, a reference branch and a feedback branch, both comprising, a first switch coupled to an input via an inverter and a second switch coupled to the input. The branches also both comprise, a variable capacitor coupled to a reference potential and coupled to the first switch, and a variable resistor coupled to the first switch. Both branches comprise a supply voltage coupled to the variable resistor and an output node, wherein the second switch is coupled to the variable capacitor and coupled to a node. The reference branch input is an input clock signal and the output is a reference voltage, and the feedback branch input is an output clock signal and the output is a feedback voltage.

Abstract: An electrochemical sensor measurement unit is described including a sensor degradation signature unit and a processing unit coupled to the sensor degradation signature unit. The processing unit includes a processor first input configured to be coupled to a sensor output of an electrochemical sensor and a processor first output configured to be coupled to a sensor input of an electrochemical sensor. The processing unit is configured to apply a stimulus signal to the sensor input; receive an electrochemical sensor signal via the sensor output. The processing unit may then determine at least one sensor parameter at one or more time values from the received sensor signal. The processing unit determines a predicted lifetime value corresponding to an expected remaining lifetime of the electrochemical sensor dependent on the sensor degradation signature and the at least one sensor parameter.

Abstract: A method is provided for detecting non-problem domain (NPD) data in a machine learning (ML) model. The method includes training the ML model using problem domain (PD) training data. A second fully connected layer is added to the trained ML model in parallel with a first fully connected layer in the trained ML model. The trained ML model is retrained with NPD training data while preventing weights in the ML model from changing except for weights of the second fully connected layer. An inference operation is performed with the retrained ML model. Output vectors are received from the first and second fully connected layers via a Softmax layer. A metric is computed using the output vectors. The metric is compared to a threshold metric to determine if input samples are PD or NPD. An indication is provided when NPD data is detected. In another embodiment, a ML model is provided.

Abstract: In one example, the present disclosure includes a circuit-based apparatus including a resonance tank circuit, a signal source, and a single-ended circuit. The signal source provides a plurality of complementary signals (e.g., differential signals) for processing by the resonance tank circuit where the complementary signals are combined to a signal at a node for presentation to the single-ended circuit (e.g., antenna or receiver). For example, the resonance tank circuit, which has a resonance frequency set for a transfer of power to the load and which may be impedance matched to the single-ended circuit, converts the complementary signals to the node for carrying the signal to the single-ended circuit.

Abstract: A circuit includes a secure chip storing one of an enclave of key values linked to an update code; a memory to store an updatable data set including an update value, which corresponds to and is revised with the update code; and a logic circuit. The logic circuit is configured to provide a key value based on a revision to the update code from the enclave of key values, generate an authentication tag as a function of the key value, use the authentication tag to verify that the updatable data set is valid and current before using the updatable data set in an application, and update the data set by storing a replacement updatable data set including a revised update value in the memory circuit. The revised update value corresponds to a revised update code to provide another key value from the enclave of key values.

Abstract: In accordance with a first aspect of the present disclosure, a tunable attenuator is provided, comprising: one or more transformer windings configured to facilitate attenuating a signal; one or more conductive loops provided underneath the transforming windings; a controller configured to control an amount of current flowing through the conductive loops, thereby providing a tunable attenuation of said signal. In accordance with a second aspect of the present disclosure, a corresponding method of producing a tunable attenuator is conceived.

Abstract: In accordance with a first aspect of the present disclosure, a networkable lighting device is provided, comprising: an ultra-wideband (UWB) communication unit; a mode controller operatively coupled to the UWB communication unit; wherein the mode controller is configured to cause the UWB communication unit to operate in a radar mode; and wherein the UWB communication unit is configured to, when operating in said radar mode, detect at least one living object present within a predefined area around or near the lighting device. In accordance with a second aspect of the present disclosure, a corresponding method of operating a networkable lighting device is conceived. In accordance with a third aspect of the present disclosure, a computer program is provided for carrying out said method.

Abstract: A data processing system is provided that includes a memory, a processor, and a memory integrity circuit. The memory includes a plurality of memory regions configured to store information. The processor is configured to execute instructions to access an address in the memory. The memory integrity circuit is coupled to the processor and to the memory, and configured to validate read and write accesses to the memory by the processor. The memory integrity circuit validates a write access to an address of a memory region of the plurality of memory regions in response to n number of the read accesses being validated prior to the write access, where n is an integer, and in response to correctly calculating a message authentication code (MAC) of a combination of encrypted data stored at the address and a tweak value. In another embodiment, a method is provided for isolation security for the memory.