Abstract: A method includes generating a plurality of chirps to be transmitted in a radar frame of a radar signal. Each chirp of the plurality of chirps has a corresponding chirp slope, and chirp slopes of a first subset of the plurality of chirps monotonically vary from a first chirp of the first subset to a last chirp of the first subset. The method also includes transmitting the plurality of chirps during a radar frame in a radar signal. After receiving the reflection of the radar signal, the method includes processing the received radar signal based on parameters associated with the generated plurality of chirps with the different chirp slopes.

Abstract: A power-on reset (POR) circuit includes a first transistor and a stack of transistors. The first transistor generates an enable voltage based on a first supply voltage. The enable voltage is a reduced version of the first supply voltage and ramps up based on a ramp-up of the first supply voltage. The stack of transistors generates a control voltage. The control voltage is a reduced version of the enable voltage and ramps up based on the ramp-up of the enable voltage. The control voltage delays ramping of the enable voltage such that the enable voltage ramps up to a first threshold voltage associated with the stack of transistors in a first time period. Further, a reset signal generated by the POR circuit is asserted when the enable voltage exceeds the first threshold voltage at the end of the first time period.

Abstract: Embodiments of a multiphase clock generation device may include an input for feeding a reference clock, a clock generation unit adapted to generate phase-shifted clock signals from the reference clock, and a phase comparator unit functionally coupled with the clock generation unit. The phase comparator unit is adapted to measure a phase shift of the phase-shifted clock signals. The multiphase clock generation device includes a self-calibration unit that is functionally coupled with the clock generation unit. The calibration unit outputs a delay-calibration parameter to the clock generation unit. The clock generation unit is adapted to generate a multiphase clock signal out of the reference clock and the delay-calibration parameter.

Abstract: Systems and methods for delta-sigma modulators with downsampled digital integrators. In various embodiments, a delta-sigma modulator may include: a comparator configured to receive an analog input and to provide a digital output at a sampling frequency, where the digital output is applied to an integrator path and to a feed-forward path; a digital integrator in the integrator path, where the digital integrator is configured to operate with a clock frequency that is less the sampling frequency; and a summer configured to add an output of the integrator path to an output of the feed-forward path to produce a bitstream.

Abstract: A data processing system and a method are provided for executing an obfuscated computer program. A function that computes an obfuscated address for each instruction of a plurality of instructions is provided. The function is factored into a first part and a second part. The first part is stored in a memory of the data processing system. The second part and a secret are stored in a secure element of the data processing system, where the secure element is relatively more secure than the memory. An instruction of the plurality of instructions is received in the data processing system. A processor of the data processing system computes an intermediate obfuscated address using the first part. The intermediate obfuscated address is provided to the secure element. An unobfuscated address is computed in the secure element using the intermediate obfuscated address, the second part, and the secret.

Abstract: A method is provided for cooperative malfunction detection between an observer vehicle and an observed vehicle. The method includes requesting, by the observed vehicle, a report of observed malfunctions of the observed vehicle from the observer vehicle via a vehicle-to-vehicle (V2V) communication system. The observer vehicle detects and captures sensor data of the observed vehicle by the observer vehicle. Then, in one embodiment, the observer vehicle transmits the captured sensor data to the observed vehicle using the V2V communication system. The observed vehicle runs a malfunction detection function on the captured sensor data and generates a report summarizing the malfunction. Alternatively, the observer vehicle generates the report and transmits it to the observed vehicle. The driver of the observed vehicle is notified of the report. In another embodiment, a data processing system is provided for performing the method in the observer vehicle or the observed vehicle.

Abstract: A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for generating keys in a hash based signature system in a processor, the instructions, including: generating, by a random number generator, a seed; repeatedly hashing the seed with a first hash function to produce n/k chained seeds, wherein n is a total number secret keys generated and k is a number of secret keys generated from each chained seed; and generating k secret keys from each of the n/k chained seeds using a second hash function, wherein at least one of the k secret keys is generated from another of the k secret keys in a sequential chain.

Abstract: A system and method are presented. A plurality of target objects are determined by a radar system. Each target object in the plurality of target objects is associated with a distance value and a velocity value. A power reduction factor is determined using the distance value and the velocity value associated with each target object of the plurality of target objects. A second radar signal is transmitted at a second power level determined by the power reduction factor.

Abstract: An integrated circuit (IC), including a clocking system, a plurality of clock gate controllers, and a plurality of clock gates, is provided. During a capture phase of an at-speed testing of the IC, the clocking system generates an at-speed clock signal including launch and capture pulses that are extracted from a reference clock signal based on a capture phase frequency. The plurality of clock gate controllers generates a plurality of enable signals such that for the launch pulse, one enable signal is asserted, and for the capture pulse, the same or different enable signal is asserted. Each of the plurality of clock gates is activated based on an assertion of a corresponding enable signal. Further, during the capture phase, one or more activated clock gates enable the at-speed testing of the IC based on the at-speed clock signal.

Abstract: Interferer cancellation device, including a device with an antenna input to receive a signal, wherein the signal comprises a wanted signal together with an unwanted interferer; and a feedback device, built to reconstruct the unwanted interferer interfering with the wanted signal into digital and to convert a reconstructed interferer into analog, wherein the reconstructed interferer is subtractable from the received signal at the antenna input.

Abstract: In accordance with a first aspect of the present disclosure, a localization system is provided, comprising: a plurality of ultra-wideband (UWB) communication nodes; a plurality of antennas, each one of said antennas being included in one of said UWB communication nodes; an antenna selection unit configured to select a subset of said antennas for use in ranging operations that output a position estimate of an external device; wherein the antenna selection unit is configured to select said subset in dependence on at least one previous ranging operation. In accordance with a second aspect of the present disclosure, a corresponding method of operating a localization system is conceived. In accordance with a third aspect of the present disclosure, a computer program is provided, comprising computer-executable instructions that, when executed by a localization system, cause said localization system to carry out a method of the kind set forth.

Abstract: Systems and methods for protecting a Machine Learning (ML) model from extraction have been described. In an illustrative, non-limiting embodiment, a method may include: obtaining a plurality of input samples usable as part of an inference operation, wherein the inference operation is performed through execution of a machine learning (ML) model. The method may further include obtaining a plurality of outputs from the inference operation. The method may further include detecting a temporal inconsistency among at least one of: (a) the plurality of input samples, or (b) the plurality of outputs. Finally, the method may further include identifying an attempt to extract the ML model, based at least in part upon the determination.

Abstract: A radar device includes a radar front end and a radar processor. The radar front end includes transmit signal generation circuitry to generate a radar transmit signal sequence including a plurality of radar transmit signals and a power shaping component configured to receive the plurality of radar transmit signals and output the plurality of radar transmit signals with a plurality of different power levels. The radar front end includes a transmitter to transmit the plurality of radar transmit signals based on the plurality of different power levels, where the plurality of different power levels is based on a power profile associated with a window applied to digitized samples of reflections of the transmitted plurality of radar transmit signals. The radar processor is configured to apply the window across a slow-time of the digitized samples of the reflections prior to velocity processing.

Abstract: A hardware reconfiguration system for first and second devices is in a lock-step configuration using a comparator that provides a lock-step error indication. The system includes at least one register that stores a lock-step threshold. The system also includes a lock-step monitor configured to compare a count of occurrences of the lock-step error indication from the comparator with the lock-step threshold. When the lock-step threshold is reached, the lock-step monitor is configured to enter a repair state to determine which one of the first and second devices is operating correctly and reconfigure operation into a split-lock mode to resume operation using the one of the first and second devices that is operating correctly.

Abstract: One example discloses a heatsink device, including: a lead-frame having a die-pad, a first edge, a second edge, a third edge, and a fourth edge; wherein the lead-frame also includes a set of heatsinks, including, a first heatsink located where the first edge and the fourth edge of the lead-frame intersect; a second heatsink located where the first edge and the second edge of the lead-frame intersect; and a third heatsink located where the second edge and the third edge of the lead-frame intersect.

Abstract: Provided is a phase-lock loop gear shifter that includes: an input for receiving a loop gain that is dynamically controllable; an input for receiving a phase-error signal; a subtractor configured to provide a gain difference between the loop gain input at a second time and the loop gain input at a first time, the first time being earlier than the second time; a module that determines a characteristic phase-error value based on the phase-error signal; and a multiplier that multiplies the gain difference by the characteristic phase-error value to provide a control-signal correction value.

Abstract: A method for jitter applied detection for a semiconductor secure element including generating a test waveform comprising a test pulse. The test waveform is modulated with an inductive loop coupled to a secure element and to an Electromagnetic (EM) signal to generate an observed waveform comprising an observed pulse, wherein the secure element comprises a flip-flop. A temporal change is measured between the test pulse and the observed pulse and the temporal change is compared to a reference to determine an Electromagnetic-Fault-Injection (EMFI) event.

Abstract: A system includes first and second radar transceivers, a processor, and a non-transitory computer-readable medium storing machine instructions. The machine instructions cause the processor to determine a first frequency offset a1 and a first initial time offset ?initial;1 between a first clock signal for the first radar transceiver and a reference clock for the processor, and the processor determines a first clock drift for the first clock signal relative to the reference clock based on the frequency offset a1 and the time offset ?initial;1. The processor determines a second frequency offset a2 and a second initial time offset ?initial;2 between a second clock signal for the second radar transceiver and the reference clock, and a second clock drift for the second clock signal relative to the reference clock based on the frequency offset a2 and the time offset ?initial;2. The processor then compensates for the first and second clock drift.

Abstract: A radar device including a radar function, a driver configured to control a pass device, and a radar controller. The radar function is configured for generating radar frames in a first mode for generating high isolation frames and in a second mode for generating low isolation frames. The radar function has a supply voltage input and is configured to operate with the supply voltage input at a radar supply voltage level. The radar controller configures the driver for controlling the pass device to regulate voltage provided to the supply voltage input of the radar function at the radar supply voltage level with high power supply rejection ratio to minimize ripple voltage when the radar function is in the first mode, and configures the driver to force the pass device into a bypass mode to reduce power dissipation when the radar function is in the second mode.

Abstract: An apparatus configured to control a transmitter to provide for generation of a data frame, the data frame having a fixed length and fixed predetermined number of sub-frames, and each sub-frame comprises a predetermined number of slots based on a carrier frequencies, and each slot includes a fixed number of symbol time periods; receive a data stream for transmission; define at least one communication-slot for transmitting of data-symbols that represent said data stream and at least one sense-slot for transmitting a predetermined sense-symbol for use in sensing an environment; wherein the generation of the data frame further comprises: the generation of the data-symbols, in the respective symbol time periods of the at least one communication-slot, according to a predetermined encoding protocol, and the generation of the predetermined sense-symbol in at least one symbol time period of the respective at least one sense-slot.