Patents Assigned to NXP B.V.
  • Patent number: 11153418
    Abstract: Aspects of the disclosure are directed to methods and apparatuses for wireless vehicular communications involving the transmission of messages using two or more protocols. As may be implemented in accordance with one or more embodiments characterized herein, wireless station-to-station communications are carried out in which a plurality of stations share a wireless communications channel. Information is wirelessly collected respectively from transmissions associated with a legacy communication protocol and another type of communication protocol. A current communication environment of the station is dynamically discerned and characterizes a dynamic relationship of the collected information using the legacy communication protocol relative to the collected information using the other communication protocol.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: October 19, 2021
    Assignee: NXP B.V.
    Inventors: Vincent Pierre Martinez, Alessio Filippi, Michael Andrew Fischer
  • Patent number: 11145340
    Abstract: A data transmission interface for use in a first integrated circuit, for encoding and sending a data packet from the first IC to a second IC via a data bus having three data wires, the data transmission interface being arranged to generate three time-dependent binary signals which jointly encode the data packet, each of the signals being associated with a unique data wire of the data bus and spanning a temporal cycle T within which are defined six consecutive time stamps T1 . . . T6 at which the signals are allowed to change logical state, the data transmission interface further arranged to transmit the signals to the second IC substantially in parallel on their respective data wires, wherein, irrespective of the data packet content: at each time stamp T1 . . .
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: October 12, 2021
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11146433
    Abstract: A method for high data rate transmission using minimum energy coding with Ultra Wide Band modulation includes encoding each of a plurality of sourcewords into a respective codeword. Each respective codeword includes a single logic-high bit. A codeword duty cycle is less than a low duty cycle threshold, wherein the codeword duty cycle is based on a bit length of the codeword. Each respective codeword is modulated with an On-Off-Keying (OOK) modulation to form a respective modulated codeword, wherein a transmission of each modulated codeword occurs only for the single logic-high bit in each respective codeword.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: October 12, 2021
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11146252
    Abstract: One specific example involves an integrated circuit that has application logic circuitry which includes flip-flop circuits susceptible to degradations of setup and hold times relative to specified minimum setup and hold times for signals to be processed by the respective flip-flop circuits. In a method carried out by the integrated circuit, timing-based logic states of the flip-flop circuits are controlled, based on at least one transition-scan pattern processed by the flip-flop circuits as part of the application logic circuitry; and respective logic states are set for those flip-flops, which due to degradations of the actual setup and hold times do not satisfy anymore the originally specified minimum setup and hold times.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: October 12, 2021
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11142212
    Abstract: A method, system and device are disclosed for determining safety conflicts in redundant subsystems of autonomous vehicles. Each redundant subsystem calculates a world model or path plan, including locations, dimensions, and orientations of moving and stationary objects, as well as projected travel paths for moving objects in the future. The travel paths and projected future world models are subsequently compared using a geometric overlay operation. If at future time moments the projected world models match within predefined margins, the comparison results in a match. In case of a mismatch at a given future moment between projected world models, a determination is made as to whether the autonomous vehicle and all road users in this future moment are safe from collision or driving off the drivable space or road based on a geometric overlay operation.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: October 12, 2021
    Assignee: NXP B.V.
    Inventors: Andrei Sergeevich Terechko, Ali Osman Örs
  • Patent number: 11133299
    Abstract: An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: September 28, 2021
    Assignee: NXP B.V.
    Inventors: Da-Wei Lai, Stephen John Sque, Wilhelmus Cornelis Maria Peters
  • Patent number: 11133578
    Abstract: A mechanism is provided to reduce a distance of a waveguide antenna from transmit and receive circuitry in an integrated circuit device die. This distance reduction is performed by providing vertical access to radio frequency connections on a top surface of the IC device die. A cavity in the encapsulant of the package can be formed to provide access to the connections and plated to perform a shielding function. A continuous connection from the RF pads is used as a vertical interconnect. The region around the vertical interconnect can be filled with encapsulant potting material and back grinded to form a surface of the semiconductor device package. A waveguide antenna feed can be plated or printed on the vertical interconnect on the surface of the package.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: September 28, 2021
    Assignee: NXP B.V.
    Inventors: Antonius Hendrikus Jozef Kamphuis, Antonius Johannes Matheus de Graauw, Adrianus Buijsman, Michael B. Vincent
  • Patent number: 11133518
    Abstract: One example discloses an organic matter powered device, comprising: a set of electrodes configured to be coupled to a set of biologically active organic matter; a power generation circuit coupled to the electrodes; wherein the power generation circuit is configured to receive a first voltage and current from the organic matter, and output a second voltage and current generated by the first voltage and current; a monitoring circuit coupled to the electrodes and coupled to monitor the first voltage and current, and to be powered by the second voltage and current; wherein the monitoring circuit is configured to translate variations in the first voltage and current into an environmental attribute.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: September 28, 2021
    Assignee: NXP B.V.
    Inventors: Henri Verhoeven, Oswald Moonen, Stephen Owen
  • Patent number: 11126404
    Abstract: A device for providing a random number generator is provided. The device may include a true random number generator, at least one deterministic random number generator, and an exclusive OR logic function. The TRNG has an output and the at least one DRNG has an output. The exclusive OR logic function has a first input coupled to the output of the TRNG and a second input coupled to the output of the at least one DRNG, and an output for providing a random number. The TRNG and the at least one DRNG may include separate and independent entropy sources. A method for generating a random number is also provided.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventors: Bruce Murray, Mario Lamberger
  • Patent number: 11126906
    Abstract: In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) transponder is provided, comprising a modulator and a controller, wherein: the modulator is configured to generate a modulated signal to be transmitted to an external RFID reader; the controller is configured to increase a transmitter impedance during a first period of time; the controller is configured to decrease the transmitter impedance by enabling the modulator during a second period of time. In accordance with a second aspect of the present disclosure, a corresponding method of operating a radio frequency identification (RFID) transponder is conceived.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventor: Thomas Pichler
  • Patent number: 11128266
    Abstract: Various embodiments relate to an amplifier circuit including: a first transistor having a first and second current conducting terminals and a control terminal; a second transistor having a first and second current conducting terminals and a control terminal, in which the second current-conducting terminal of the first transistor is connected to the first current-conducting terminal of the second transistor; a first inductor with a first terminal coupled to a first current-conducting terminal of the first transistor and a second terminal coupled to an output of the amplifier circuit; a feedback circuit connected between the output and the control terminal of the second transistor, wherein the feedback circuit includes a first resistor, a second inductor, and a first capacitor; and an input of the amplifier circuit connected between the first resistor and the second inductor, wherein a second current-conducting terminal of the second transistor is connected to a first ground terminal, and wherein a control term
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventors: Michael Lee Fraser, Venkata Naga Koushik Malladi
  • Patent number: 11126432
    Abstract: A computer processor is provided which hides jump instructions, in particular condition jump instructions, from side-channels. The processor comprises a forward jump detector for detecting a forward jump instruction having a jump target location which lies ahead and a jump inhibitor for inhibiting an execution of the forward jump instruction. The computer processor is configured for executing at least one intermediate computer instruction located between the inhibited forward jump instruction and the jump target location. The processor further comprises a storage destination modifier for modifying the storage destination determined by the at least one intermediate computer instruction to suppress the effects of execution of intermediate instructions. Since the intermediate instruction is executed regardless of the forward jump instruction, the jump is hidden in a side-channel. Secret information, such as cryptographic keys, on which the forward jump may depend, is also hidden.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventor: Jan Hoogerbrugge
  • Patent number: 11126992
    Abstract: There is disclosed a method for facilitating transactions carried out by a mobile device, wherein: the mobile device executes a smart card application; the smart card application receives a cryptographic algorithm from a transaction server external to the mobile device; the smart card application further receives transaction data from said transaction server; the cryptographic algorithm encrypts said transaction data and stores the encrypted transaction data in a storage unit of the mobile device. Furthermore, a corresponding computer program product and a corresponding mobile device for carrying out transactions are disclosed.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventors: Jan Brands, Friso Jedema, Piotr Polak, Timotheus van Roermund
  • Patent number: 11112458
    Abstract: During a test for integrated circuit aging effects, contents of a first set of flip flop circuits are transferred to a second set of flip flop circuits. A first test value is applied to inputs of a combinatorial logic circuit and outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The combinatorial logic circuitry is reversible and conservative. The outputs from the first flip flop circuits are compared to the first test value to determine if there is a match. A second test value is applied to the inputs of the combinatorial logic circuitry and the outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The outputs from the first flip flop circuits are compared to the second test value to determine if there is a match, and when the test mode finishes, contents of the second set of flip flop circuits are transferred to the first set of flip flop circuits.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11115069
    Abstract: One example discloses a wireless device, including: a first near-field device, including a near-field transmitter or receiver and a controller, configured to be coupled to a near-field antenna having a first conductive surface and a set of feed-points; wherein the controller is configured to receive a transmitter output voltage from the set of feed-points; wherein the controller is configured to generate a correction signal based on a difference between the transmitter output voltage and a target transmitter output voltage; wherein the correction signal varies in response to a change in a distance between the first surface and a second conductive surface; and wherein the controller is configured to calculate the distance, between the first conductive surface and the second conductive surface, based on the correction signal.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventors: Liesbeth Gommé, Anthony Kerselaers
  • Patent number: 11114978
    Abstract: A variable reactance apparatus, tunable oscillator and method for changing a gain associated with an input signal of a tunable oscillator are disclosed. An embodiment of the variable reactance apparatus includes a plurality of unit variable reactance structures including respective control input nodes, and a control circuit configured to connect each of the control input nodes to a respective signal from among a plurality of signals including a first tuning signal and a second tuning signal. An embodiment of a tunable oscillator includes a resonance circuit, a negative impedance structure and a variable reactance apparatus configured for tuning of the oscillator. An embodiment of a method includes altering connections of first and second tuning signals to control input nodes of respective first and second sets of unit variable reactance structures while holding constant a sum of the number of unit variable reactance structures in the first and second sets.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventors: Mathieu Perin, Stefano Dal Toso
  • Patent number: 11115264
    Abstract: An example apparatus for a local area network. The apparatus includes, at one of a plurality of logic nodes, a plurality of ports and a plurality of shared registers. The plurality of shared registers have a port address table to provide configurable port-address assignments that identify respective ones of the plurality of ports. The apparatus further includes a management interface controller that communicates with the plurality of ports and accesses at least one register via a selected one of the ports, and in response configures or manages the port-address assignments within the port address table.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventor: Gerrit Willem den Besten
  • Patent number: 11113484
    Abstract: In accordance with a first aspect of the present disclosure, a consumable product is provided, comprising: one or more consumable components; a radio frequency communication tag; wherein said radio frequency communication tag comprises data indicative of a type of consumable component to which said consumable components belong. In accordance with a second aspect of the present disclosure, a machine is provided, being configured to operate using a consumable product of the kind set forth; wherein said machine comprises a reader configured to read data from the radio frequency communication tag of the consumable product.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventors: Franciscus Maria Vermunt, Nguyen Trieu Luan Le, Arnaud Pignorel
  • Patent number: 11115141
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventor: Sujan Pandey
  • Patent number: 11114239
    Abstract: A device includes a leadframe and an electronic component. The leadframe includes a first leadframe element having a first surface and a second leadframe element adjacent to the first leadframe element, the first and second leadframe elements being separate from one another, the second leadframe element having a second surface. A first flange extends from a first outer edge of the first leadframe element and extends away from the first surface of the first leadframe element. A second flange extends from a second outer edge of the second leadframe element and extends away from the second surface of the second leadframe element. The electronic component is coupled to the first and second surfaces of the first and second leadframe elements such that the first and second flanges are located at opposing first and second sidewalls of the electronic component.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: September 7, 2021
    Assignee: NXP B.V.
    Inventors: Chayathorn Saklang, Wiwat Tanwongwan, Amornthep Saiyajitara, Chanon Suwankasab