Patents Assigned to NXP B.V.
  • Patent number: 12775319
    Abstract: Aspects of the disclosure are directed to apparatuses and methods involving a plurality of circuit domains and power management circuitry. Each domain includes logic circuitry to perform one or more tasks in response to command inputs and to operate under power conditions that are different than power conditions under which another one of the domains operates. The power management circuitry outputs respective commands for operating the circuit domains, including controlling the sequence of respective operations carried out by each of the plurality of circuit domains by issuing each of the commands in a sequence corresponding to both a programmed counter value assigned to each command and a counter circuit output value.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: October 27, 2026
    Assignee: NXP B.V.
    Inventors: Jiajian Tang, Ken Yeung, Jing Zhao, Yuesheng Liu
  • Patent number: 12775043
    Abstract: An apparatus configured to perform a network diagnosis procedure within a message-based protocol network comprising a plurality of nodes. The apparatus comprises: a diagnosis test device configured to perform diagnosis tests; and a diagnosis control device.
    Type: Grant
    Filed: November 27, 2024
    Date of Patent: October 27, 2026
    Assignee: NXP B.V.
    Inventor: Martin Wagner
  • Patent number: 12772840
    Abstract: A transistor includes a semiconductor substrate, a channel region on a top surface of the semiconductor substrate, first and second current terminals with first and second contacts at a top surface of the channel region, a gate electrode between the first and second contacts, and a cooling trench. The cooling trench is coupled to the first current terminal, and the cooling trench extends laterally from a first end of the cooling trench to a second end of the cooling trench along a first direction that is parallel to the top surface of the substrate. The cooling trench also extends vertically from the first current terminal through the channel region, through the top surface of the semiconductor substrate and toward, but not to, the backside of the semiconductor substrate. The cooling trench is filled throughout with a thermally-conductive material configured to dissipate heat from the channel region into the semiconductor substrate.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Ljubo Radic, Richard Emil Sweeney, Vikas Shilimkar, Bernhard Grote, Darrell Glenn Hill, Ibrahim Khalil
  • Patent number: 12772509
    Abstract: A semiconductor device comprising a substrate having a first conductivity type, the substrate having a top surface and a bottom surface, a first buried layer disposed in the substrate at a first depth from the top surface, wherein the first buried layer has a second conductivity type and a first doping concentration, a second buried layer adjacent and surrounding the first buried layer at the first depth, wherein the second buried layer has the second conductivity type and a second doping concentration, wherein the second doping concentration is less than the first doping concentration, and an isolation trench disposed in the substrate and surrounding the second buried layer, wherein the isolation trench extends from the top surface of the substrate to a second depth, the second depth exceeding the first depth.
    Type: Grant
    Filed: September 25, 2023
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Saumitra Raj Mehrotra, Ronghua Zhu, Todd Roggenbauer
  • Patent number: 12771175
    Abstract: A magnetic cover is disclosed which is configured to be positioned on a wireless charging transmitter. The magnetic cover comprises: a magnetic ring positioned on the magnetic cover, wherein when the magnetic cover is positioned on a wireless charging transmitter, the magnetic ring encompasses a center planar charging coil of the wireless charging transmitter; and a plurality of passive identification circuits, each identification circuit having a respective resonance frequency. When the magnetic cover is positioned over a wireless charging transmitter, the plurality of passive identification circuits overlaps with a side planar charging coil of the wireless charging transmitter and the side planar charging coil overlaps with center planar charging coil. The disclosed magnetic cover is facilitates detection by the wireless charging transmitter and wireless charging in accordance with magnetic power profile (MPP) charging.
    Type: Grant
    Filed: September 12, 2023
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Ivan Sieklik, Radek Holis, Petr Smejkal
  • Patent number: 12772868
    Abstract: A semiconductor device is provided. The semiconductor device includes a leadframe having a plurality of leads. A first lead of the plurality of leads has a lead pad formed between a distal portion and a proximal portion of the first lead. A semiconductor die includes a plurality of bond pads located at an active side. Each bond pad of the plurality is connected to a respective lead of the plurality of leads. An encapsulant encapsulates the semiconductor die and at least a portion of the leadframe. A distal portion of each lead is exposed through the encapsulant at a first major side. The lead pad is exposed through the encapsulant at a second major side opposite of the first major side.
    Type: Grant
    Filed: January 29, 2024
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventor: Chang Hao Liu
  • Patent number: 12771366
    Abstract: A continuous-time analog-to-digital converter circuit includes an input configured to receive an analog input signal; a delay element with a specified time delay, the delay element functionally connected between the input and a first summation node; a ADC-DAC path with a sub ADC and a sub DAC connected between the input and the first summation node. The ADC-DAC path is configured to digitize the analog input signal and to reconvert the digitized signal to analog domain and to subtract it at the first summation node. An output of the first summation node is filtered by means of a continuous-time filter and an output of the continuous-time filter is clocked by a specified sampling rate. A backend ADC is configured to digitize the clocked output of the analog filter and to connect the clocked output to a second summation node. An output is obtained by a summation of the output of the backend ADC and an output of a digital filter is connected to the sub ADC.
    Type: Grant
    Filed: December 5, 2024
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Kamlesh Singh, Sushil Kumar Gupta, Ashish Ashok Panpalia, Pankaj Agrawal
  • Patent number: 12771575
    Abstract: RF signal is received (1006). The received RF signal includes a first RF signal encoding a first orthogonal frequency-division multiplexing (OFDM) symbol of a first long-term evolution (LTE) V2X data packet. A channel estimation in the time domain is determined (1012) using the received signal and an as-transmitted time domain version of an L-LTF symbol is determined (1014). The channel estimation in the time domain is applied to the as-transmitted time domain version of the L-LTF symbol to determine an as-transmitted version of the L-LTF symbol that exhibits channel fading (1018). A first portion of the as-transmitted version of the L-LTF symbol that exhibits channel fading is subtracted from a second portion of the received RF signal (1022) to remove inter-symbol interference from the received signal to generate a second received RF signal.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventor: Vincent Pierre Martinez
  • Patent number: 12768975
    Abstract: Systems and methods of operating an RF access system includes an anchor at a predetermined location and configured to communicate with one or more key devices. The system may perform a method that includes operating the anchor in a first mode. The first mode includes first RF ranging operations for determining a first ranging result for the anchor relative to a key device and includes determining whether the first ranging result fulfils a predetermined condition. When the first ranging result fulfils the condition, the method includes operating the anchor in a second mode including second RF ranging operations for determining a second ranging result between the anchor and the key device and including radar operations for determining a radar result for the anchor relative to a holder of the key device. The method includes determining position information associated with the key device based on the second ranging and radar results.
    Type: Grant
    Filed: October 20, 2023
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Wolfgang Eber, Dorian Haslinger
  • Patent number: 12771357
    Abstract: A divider circuit is disclosed. The divider circuit includes a pair of differential latch circuits. The divider circuit receives complementary clock signals as a pair of differential signals. The divider circuit generates frequency divided signals based on the complementary clock signals, inverted versions of the complementary clock signals, and input signals. The frequency divided signals may be substantially ripple-free. Further, the frequency divided signals remain substantially ripple-free in a presence of the skew between the complementary clock signals.
    Type: Grant
    Filed: January 29, 2025
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Sanjay Kumar Wadhwa, Alok Kumar
  • Patent number: 12769815
    Abstract: A method of accessing secure data on a user device, wherein authentication access of the user device is not available, including: receiving a request from a requester to access secure data in the user device; receiving authentication input from a user; authenticating a data input from the user using a control token; and providing access to secure data to the requester.
    Type: Grant
    Filed: November 19, 2024
    Date of Patent: October 20, 2026
    Assignee: NXP B.V.
    Inventors: Fabien Jacques Deboyser, Jonathan Azoulai, Nori Hamza Zerigat, Marc Vauclair
  • Patent number: 12763978
    Abstract: The disclosure relates to decomposition of masked values in a cryptographically secure digital signing system.
    Type: Grant
    Filed: February 17, 2025
    Date of Patent: October 13, 2026
    Assignee: NXP B.V.
    Inventors: Björn Fay, Joost Roland Renes, Tobias Schneider, Olivier Bronchain
  • Patent number: 12763243
    Abstract: A transformer (100, 100?) is disclosed, comprising a first conducting element (110) having a first lobed portion (114) arranged to form a first plurality of lobes (116); and a second conducting element (120) having a second lobed portion (124) arranged to form a second plurality of lobes (126); wherein said first lobed portion (114) overlaps said second lobed portion (124) to define a plurality of enclosed areas (130). The transformer is adapted for applications requiring an autotransformer having a weak, negative magnetic coupling coefficient.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: October 13, 2026
    Assignee: NXP B.V.
    Inventors: Olivier Tesson, Konstantinos Giannakidis
  • Patent number: 12761997
    Abstract: A fault reaction handling time interval (FRTI) for a reaction to the fault is determined based on a domain identifier (DID) indicative of an application associated with a fault. A first reaction to recover from the fault is signaled and then a determination is made whether a safe state is reached after the FRTI. Based on the safe state not being reached, a second FRTI is determined for a second escalated reaction, the second FRTI also being based on the DID. Typically, the second reaction results in less system availability so by defining the FRTI based on the DID sufficient time is allowed for reaching a safe state before the reaction is escalated.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: October 13, 2026
    Assignee: NXP B.V.
    Inventors: Hemant Nautiyal, Marcus Mueller, Sandeep Kumar Arya, David Baca
  • Patent number: 12757245
    Abstract: One example discloses a peripheral device, including: a radio receiver configured to, receive a first set of audio packets transmitted over a first wireless link from a first central device, and receive a second set of audio packets transmitted over a second wireless link by the second central device; and a processor configured to predict a collision between the first set of audio packets and the second set of audio packets based on a set of transmission scheduling parameters.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: October 6, 2026
    Assignee: NXP B.V.
    Inventors: Pieter Verschueren, Steven Mark Thoen
  • Patent number: 12754844
    Abstract: A multiple core processing system as described herein for optimizing broadcast operations includes multiple first-level (L1) caches, a distributed second-level (L2) cache system including multiple L2 cache partitions each having a unique identifier, and a routing network that enable communications between the L1 and L2 caches. Each L1 cache sends a request message with a memory address to a targeted L2 cache partition. When rejected, the L1 cache resends the request only in response to a retry message that incorporates an identifier that matches a locally stored identifier. Each L2 cache partition sends a reject message to a requesting Li cache when busy and later broadcasts a retry message that incorporates its identifier when not busy. The L1 cache predetermines the identifier of the target L2 cache partition when sending the request, or each L2 cache partition incorporates its identifier in the reject message.
    Type: Grant
    Filed: April 28, 2025
    Date of Patent: October 6, 2026
    Assignee: NXP B.V.
    Inventors: Ayush Mishra, Abhishek Jain, Arvind Kaushik, Ayush Garg, Sumit Gangwar, Eshant Verma
  • Patent number: 12756361
    Abstract: A compensation system for a crystal oscillator including a DC level comparator, current compensation circuitry, and a compensation controller. The crystal oscillator includes an amplifier with a feedback resistance coupled between first and second terminals of a crystal resonator. The DC level comparator may be a hysteretic comparator that compares a DC level of the first node with a DC level of the second node and to provide a corresponding compensation signal. The compensation controller controls a magnitude and direction of the compensation current applied to the first node by the current compensation circuitry based on the compensation signal. The current compensation circuitry sources current to or sinks current from the first node until the leakage current is minimized. The compensation controller may include a digital counter the generates a digital control value used to activate selected current sources or sinks for developing the compensation current.
    Type: Grant
    Filed: September 20, 2024
    Date of Patent: October 6, 2026
    Assignee: NXP B.V.
    Inventors: Harish Eleendram, Anand Kumar Sinha, Ateet Omer, Siyaram Sahu, Vishwajit Babasaheb Bugade
  • Patent number: 12754236
    Abstract: A system and method for detecting a loss of clock signal condition is presented. In various embodiments, a reference clock signal by a clock monitoring system. A toggle signal is generated using the reference clock signal and a clock detector output signal is generated. The clock detector output signal is equal to the toggle signal when a monitored clock signal is received. The clock detector output signal to the toggle signal and, when the clock detector output signal is not equal to toggle signal, an output signal indicative of a loss of clock signal condition is generated. In various embodiments, the clock monitoring system is utilized in conjunction with various systems, including automotive controllers, and the like.
    Type: Grant
    Filed: August 20, 2024
    Date of Patent: October 6, 2026
    Assignee: NXP B.V.
    Inventors: Juxiang Ren, Thomas Henry Luedeke, Loic Leconte, Parul Bansal, Marcus Mueller
  • Patent number: 12755553
    Abstract: Techniques for using machine learning to produce vehicle location sensor data from vision sensor data are disclosed. By using a limited amount of vehicle location sensor data together with vision sensor data, a deep learning network can be trained to produce estimated vehicle location sensor point cloud distributions from, e.g., vision sensor data alone. Using a deep learning network trained in this way, vehicles with limited or no sensor functionality can be equipped with a camera to produce estimated vehicle location sensor point cloud distributions. These estimated vehicle location sensor point cloud distributions can then be compared with general sensor point cloud distributions to improve detection of vehicles, environmental objects, and ghost objects, and subsequently used to improve vehicle safety through vehicle controls or driver notifications and/or to produce enhanced sensor data.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: October 6, 2026
    Assignee: NXP B.V.
    Inventors: Tunc Alkanat, Ashish Pandharipande
  • Patent number: 12751286
    Abstract: One example discloses a finFet semiconductor device and corresponding manufacturing method is disclosed, the device comprising: a substrate having therein a body-region, a plurality of elongate fins at a first major surface and within the body-region; an oxide layer on the first major surface and partially surrounding a lower portion of the elongate fins; a gate contact extending across and partially surrounding an upper portion of the plurality of elongate fins; a dielectric material, between the fins and the gate region; a plurality of elongate partial fins, parallel thereto and having a height which is less than a height thereof; an elongate metal contact, extending into the substrate and in electrical contact with the partial fins, and forming a body-contact; wherein the elongate metal contact extends between the two of the elongate partial fins and below an upper surface thereof and fills a space therebetween.
    Type: Grant
    Filed: November 10, 2023
    Date of Patent: September 29, 2026
    Assignee: NXP B.V.
    Inventors: Viet Thanh Dinh, Asanga H Perera, Sai-Wang Tam