Patents Assigned to NXP B.V.
  • Patent number: 10819394
    Abstract: Embodiments detect the presence of proximity integrated circuit cards (PICCs) during wireless charging by analyzing the signal strength of a subcarrier within a near field communication (NFC) field. An NFC reader sends requests or other commands to stimulate a response from a PICC that may be in the operating area, and the presence of a PICC is determined based upon the signal strength for the subcarrier. For one embodiment, the subcarrier signal strength is compared to background values measured without stimulus to determine if a PICC is present in the operating area. As such, the presence of a PICC is detectable even where NFC communication with a PICC is unsuccessful because the PICC response is corrupted or not detectable due to interference. Once the presence of a PICC is determined, one or more actions can be taken to protect the PICC from damage due to wireless charging.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Leonhard Petzel, Dariusz Adam Mastela, Harald Karl Krepelka, Rainer Lutz
  • Patent number: 10819358
    Abstract: Aspects are directed to an arrangement of circuits configured to generate and correct an output signal relative to a reference signal in response to a direction indication signal. Included in the arrangement of circuits is a phase-frequency detection circuit having logic circuitry configured to respond to the reference signal and a feedback signal by generating and updating the direction indication signal as a function of the logic states of an internal clock signal having risen and fallen. In this context, the feedback signal is generated by a feedback circuit in response to the output signal.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventor: Sebastien Darfeuille
  • Patent number: 10819302
    Abstract: A communication system including an analog front end and an automatic gain controller. The analog front end includes at least one amplifier for amplifying a received analog signal and an analog to digital converter that converts the analog signal to digital samples. The automatic gain controller includes comparator circuitry, counter circuitry, and a gain controller. The comparator circuitry compares each of the digital samples with an upper threshold and a lower threshold. The counter circuitry counts a high count number of the digital samples having magnitudes that are greater than the upper threshold during each count window and counts a low count number of the digital samples having magnitudes that are less than the lower threshold during the count window. The gain controller adjusts a gain of the at least one amplifier by an amount based on the high count number and the low count number.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Radha Srinivasan, Brima Babatunde Ibrahim, Edward Youssoufian
  • Patent number: 10816363
    Abstract: A system for determining angular position includes a magnet having at least four poles and an axis of rotation, wherein the magnet produces a magnetic field. A first magnetic field sensor produces a first output signal and a second magnetic field sensor produces a second output signal in response to the magnetic field. The magnetic field sensors are operated in a saturation mode in which the magnetic field sensors are largely insensitive to the field strength of the magnetic field. Thus, the first output signal is indicative of a first direction of the magnetic field and the second output signal is indicative of a second direction of the magnetic field. Methodology performed by a processing circuit entails combining the first and second output signals to obtain a rotation angle value of the magnet in which angular error from a stray magnetic field is at least partially canceled.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Jaap Ruigrok, Edwin Schapendonk, Stephan Marauska, Dennis Helmboldt, Marijn Nicolaas van Dongen
  • Patent number: 10819378
    Abstract: A transmitter circuit includes first and second carrier signal generators for generating corresponding first and second digital carrier signals, each having the same frequency. Modulation circuitry determines a phase shift value based on a received modulation signal. Outphasing circuitry generates a first digital output signal by adding the phase shift value to the phase of the first digital carrier signal and generates a second digital output signal by subtracting the phase shift value from the phase of the second digital carrier signal. A first switched-capacitor digital-to-analog converter (DAC) receives the first digital output signal and generates a first analog antenna output signal. A second switched-capacitor DAC receives the second digital output signal and generates a second analog antenna output signal. The sampling phases of the first and second DACs are opposite one another, whereby the first and second analog antenna output signals form a time-interleaved antenna output signal.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Olivier Jerome Celestin Jamin, Ludovic Oddoart
  • Patent number: 10819331
    Abstract: Self-regulating body-biasing techniques for Process, Voltage, and Temperature (PVT) fluctuation compensation in Fully-Depleted Silicon-on-Insulator (FDSOI) semiconductors are disclosed. In an illustrative, non-limiting embodiment, an electronic device may include a logic cell having a plurality of FDSOI transistors manufactured thereon; and at least one current source coupled to a body terminal of each transistor in a subset of the FDSOI transistors, wherein the current source is configured to output a high-impedance current.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Sebastien Antonius Josephus Fabrie, Maarten Vertregt, Ajay Kapoor
  • Patent number: 10819297
    Abstract: A gain stage includes an offset cancellation loop coupled to a first amplifier. The first amplifier has a first transfer function and a first gain, and the offset cancellation loop includes a second amplifier having a second transfer function and a second gain. The second transfer function is based on an inverse of the first transfer function and the second gain based on an inverse of the first gain. When the offset cancellation loop feeds back an output signal of the first amplifier to an input of the first amplifier, a high-pass pole (or high-pass corner frequency) of the first amplifier is maintained at a constant level in spite of variations in the gain of the first amplifier. In one case, the second amplifier in the offset cancellation loop may be a simpler and lower power version of the first amplifier.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventor: Siamak Delshadpour
  • Patent number: 10819240
    Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; a dual output controller including a first error signal input, a second error signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the second error signal is a function of
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventor: Hans Halberstadt
  • Patent number: 10816643
    Abstract: A radar device (100) is described that includes at least one transceiver (205) configured to support frequency modulated continuous wave (FMCW); a digital controller (262); and a temperature sensor system comprising a plurality of temperature sensors (222, 232, 242) coupled to various circuits (220, 230, 240) in the at least one transceiver (205). The digital controller (262) of the radar device (100) is configured to monitor a temperature of the various circuits (220, 230, 240) by polling temperature values of the plurality of temperature sensors (222, 232, 242).
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventors: Matthis Bouchayer, Cristian Pavao Moreira, Dominique Delbecq, Pierre Savary
  • Patent number: 10819024
    Abstract: One example discloses a combination near-field and far-field antenna configured to be coupled to a conductive host surface, including: a first feed point configured to be coupled to a far-field transceiver; a second feed point configured to be coupled to a near-field transceiver; a first conductive antenna surface; a first filter having a first interface coupled to both the first feed point and the first conductive antenna surface, and having a second interface coupled to the second feed point; wherein the first filter is configured to attenuate far-field signals passing between the first conductive antenna surface and the far-field transceiver from being received by the near-field transceiver; and wherein the first filter is configured to pass near-field signals between the near-field transceiver and the first conductive antenna surface.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventor: Anthony Kerselaers
  • Patent number: 10812067
    Abstract: Embodiments of redrivers and resistive units for redrivers are disclosed. In an embodiment, a resistive unit for a redriver includes at least one resistor connected to an input/output terminal of the redriver, at least one switch serially connected to the at least one resistor, and a voltage regulator connected to the at least one switch and configured to generate a termination voltage for the at least one switch. Instead of grounding the at least one resistor, using the voltage regulator can avoid large voltage jump at input/output terminals to keep connected devices safe.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Siamak Delshadpour, Xu Zhang
  • Patent number: 10811981
    Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; and a dual output controller including a first error signal input, a second error signal input, a delta power signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the seco
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventor: Hans Halberstadt
  • Patent number: 10811963
    Abstract: A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula
  • Patent number: 10812119
    Abstract: Interference cancellation is provided, according to certain aspects, by a filter, a signal detection circuit, synthesis circuitry and signal-generation circuitry. The filter is used to filter an incoming signal having an associated signal-to-noise metric and to output therefrom a filtered signal having an interference attribute of the incoming signal by amplification and/or isolation. The signal detection circuit is used to detect the interference attribute in the filtered signal. The synthesis circuitry is used to synthesize interference in the incoming signal based on the interference attribute. The signal-generation circuitry is used to generate, in response to the synthesized interference in the incoming signal, a filtered version of the incoming signal which provides an improved signal-to-noise metric.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Massimo Ciacci, Arie Geert Cornelis Koppelaar, Alessio Filippi, Lucien Johannes Breems
  • Patent number: 10812149
    Abstract: One example discloses a multi-mode near-field device configured to be coupled to a conductive host surface, including: a conductive antenna surface configured as a near-field electrically inductive (NFEI) antenna; wherein the conductive antenna surface includes a first region and a second region; wherein the first region is configured to be capacitively coupled to the conductive host surface; wherein the second region is configured to be galvanically or capacitively coupled to the conductive host surface; wherein the multi-mode device is configured to operate in, a first mode when the second region is galvanically coupled to the conductive host surface; and a second mode when the second region is capacitively coupled to the conductive host surface.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Anthony Kerselaers, Liesbeth Gommé
  • Patent number: 10812199
    Abstract: One example discloses a near-field wireless device, including: a near-field antenna; a variable current source; a controller coupled to the near-field antenna and the variable current source; wherein the controller is configured to measure a transmit quality-factor (Qtx) of the near-field antenna; and wherein the controller is configured to increase current sent by the variable current source to the near-field antenna if the measured Qtx is lower than a minimum Qtx.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Anthony Kerselaers, Liesbeth Gommé
  • Patent number: 10812126
    Abstract: One example discloses a near-field device, including: an electric (E-Field) antenna including a first conductive plate and a second conductive plate responsive to non-propagating quasi-static electric near-field signals; wherein the electric antenna is configured to be coupled to a transceiver circuit; a substrate configured to be worn by a user; wherein the first conductive plate is located on a first side of the substrate configured to face away from the user; and wherein the second conductive plate is located on a second side of the substrate configured to face toward the user.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Anthony Kerselaers, Liesbeth Gommé
  • Patent number: 10811959
    Abstract: Embodiments of switched capacitor voltage converters and methods for operating a switched capacitor voltage converter are disclosed. In an embodiment, a switched capacitor voltage converter includes serially connected switching devices, a voltage generator connected to the serially connected switching devices and configured to generate driver voltages in response to a first voltage at a first terminal that is connected to the serially connected switching devices, and voltage drivers configured to drive the serially connected switching devices based on the driver voltages.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventor: Bin Shao
  • Patent number: 10805092
    Abstract: A processing module for a first lock device of a range determination system, the range determination system comprising a lock group comprising a plurality of lock devices of which the first lock device forms part, the plurality of lock devices physically spaced over a lockable element and configured to communicate with a key group comprising a plurality of key devices, a shortest distance between any one of the key devices of the key group and any one of the lock devices of the lock group providing for access to the lockable element relative to a threshold distance.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: October 13, 2020
    Assignee: NXP B.V.
    Inventors: Jan Dutz, Wolfgang Küchler, Frank Leong, Thomas Baier, Arie Geert Cornelis Koppelaar
  • Patent number: 10797891
    Abstract: A physically unclonable function (PUF) system is provided. The PUF system includes an entropy source, a plurality of selectable paths, a random selection block, and error correction logic. The plurality of selectable paths are formed between the entropy source and an output for providing a PUF response. The random selection block is for randomly selecting one of the plurality of selectable paths in response to receiving a challenge. The error correction logic is coupled to the output for receiving the PUF response and for correcting any errors in the PUF response for the plurality of selectable paths. By using a different path through the entropy source each time a challenge is received, protection is provided against side-channel attacks.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: October 6, 2020
    Assignee: NXP B.V.
    Inventor: Xiaoxu Yao