Patents Assigned to NXP B.V.
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Patent number: 12656482Abstract: In various examples, a radar system includes a logic circuit with a memory array for processing radar reflection signals. In a specific example, a method includes generating output data indicative of the reflection signals' amplitudes, and discerning angle-of-arrival information for the output data for the output data by correlating the output data with an iteratively-refined estimate of a sparse spectrum support vector (“support vector”). The estimate includes: iteratively updating a set of parameters associated with previous values of the support vector including a covariance estimate, and a statistical expectation among a plurality of support vectors; and pruning, for each iterative update, certain of the plurality of support vectors having amplitudes which are insignificant relative to the statistical expectation of the support vector of in a preceding iteration.Type: GrantFiled: February 25, 2021Date of Patent: June 16, 2026Assignee: NXP B.V.Inventors: Ryan Haoyun Wu, Jun Li, Maik Brett, Michael Andreas Staudenmaier
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Patent number: 12656457Abstract: A radar system can improve performance by estimating a channel impulse response (CIR) in a way that accounts for noise arising from asymmetric interference. The system transmits a first channel-sounding sequence (CSS) that includes a first pulses and a second CSS that includes second pulses. The second pulses are complements of the first pulses. A first CIR corresponding to the first CSS and a second CIR corresponding to the second CSS are combined to produce an overall CIR that reduces or eliminates artefacts caused by asymmetric interference.Type: GrantFiled: May 2, 2024Date of Patent: June 16, 2026Assignee: NXP B.V.Inventors: Wolfgang Küchler, David Lugitsch
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Patent number: 12658974Abstract: In accordance with a first aspect of the present disclosure, a near field communication (NFC) device is provided, comprising: an NFC transceiver configured to communicate with an external NFC device and to apply at least one transceiver parameter when communicating with the external NFC device; a calibration unit operatively coupled to the NFC transceiver and configured to calibrate the NFC transceiver; wherein the calibration unit is configured to calibrate the NFC transceiver by causing the NFC transceiver to apply different values of the transceiver parameter, measuring a noise level in the NFC transceiver for each applied value of the transceiver parameter, and selecting an optimal value from the applied values of the transceiver parameter in dependence on the noise level measured for each applied value. In accordance with a second aspect of the present disclosure, a corresponding method of operating an NFC device is conceived.Type: GrantFiled: August 21, 2023Date of Patent: June 16, 2026Assignee: NXP B.V.Inventors: Manoj Kurvathodil, Julia Ziegerhofer
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Publication number: 20260164195Abstract: Improved hearing systems and methods are disclosed herein. In one example embodiment, a hearing system includes memory device(s), audio input device(s) configured to receive audio input signals including audio information arising from a plurality of sound sources, audio output device(s), and processing device(s). During an inference mode, the processing device(s) are configured to operate in accordance with the first neural network to generate intermediate output signals that, to a higher degree than in the audio information, reflect or emphasize at least one desired sound source component of the audio information arising from a desired one of the sound sources of the plurality of sound sources determined to be the desired one of the sound sources at least indirectly based upon a first undershot angle evident from the audio information. The audio output device(s) are configured to generate audio output signals based at least indirectly upon the intermediate output signals.Type: ApplicationFiled: December 10, 2024Publication date: June 11, 2026Applicant: NXP B.V.Inventors: Luan Vinícius Fiorio, Ronaldus M. Aarts, Boris Petrov Karanov
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Patent number: 12652179Abstract: In accordance with a first aspect of the present disclosure, a battery system is provided for use in a vehicle, comprising: a plurality of battery modules; a controller operatively coupled to the battery modules; a plurality of secure elements, wherein each of said battery modules contains at least one of said secure elements and wherein the controller contains at least one of said secure elements, and wherein said secure elements are configured to perform one or more authentication operations by executing a cryptographic algorithm. In accordance with a second aspect of the present disclosure, a corresponding method of configuring a battery system is conceived.Type: GrantFiled: January 5, 2024Date of Patent: June 9, 2026Assignee: NXP B.V.Inventors: Dorian Haslinger, Naman Khullar, Marc Manninger
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Patent number: 12650892Abstract: An error out (EOUT) controller of a system on a chip (SoC) for fault management generates a first EOUT signal which indicates a virtual electronic control unit (vECU) of the SoC comprising a plurality of vECU is in a first state. The first EOUT signal is output, where the first EOUT signal is toggled at a first toggle frequency. A fault signal which indicates the vECU having a fault is received. Based on receiving the fault signal, an EOUT circuit is selected from a plurality of EOUT circuits and the selected EOUT circuit generates a second EOUT signal which indicates the vECU is in a second state. The second EOUT signal is then output, where the second EOUT signal is a toggled at a second toggle frequency or is a static signal.Type: GrantFiled: September 16, 2024Date of Patent: June 9, 2026Assignee: NXP B.V.Inventors: Sandeep Kumar Arya, Hemant Nautiyal, Aastha Shukla, Geeta Ahuja
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Patent number: 12645250Abstract: Aspects of the subject disclosure address the traditional trade-off between performance and area, in relation to circuit and system design, together with power as an additional factor of consideration. Circuits and systems of this disclosure may realize a datapath of data in respect of memory state elements (e.g., registers, flops, etc.) that is dependent on multiple qualifiers. Aspects of this disclosure enhance (e.g., optimize) area and reduce leakage power associated with circuits and systems. Furthermore, aspects of this disclosure enable and enhance an insertion of clock-gating circuits or mechanisms to reduce dynamic-power consumption depending on states of the qualifiers.Type: GrantFiled: July 14, 2023Date of Patent: June 2, 2026Assignee: NXP B.V.Inventors: Sagarkumar Jagdishkumar Patel, Sakshi Sharma, Ashutosh Kumar, Nidhi Puri, Love Gupta
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Patent number: 12645233Abstract: Systems and methods for providing voltage regulators with sliced pole tracking are discussed. In some embodiments, a voltage regulator may include: an error amplifier, a voltage-to-current converter coupled to the error amplifier, and a current-to-current converter coupled to the voltage-to-current converter, where the current-to-current converter comprises a sliced pole tracking circuit coupled to a power device, and where the power device is configured to provide an output voltage to a load.Type: GrantFiled: October 11, 2023Date of Patent: June 2, 2026Assignee: NXP B.V.Inventor: Frederic Darthenay
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Patent number: 12647243Abstract: A wireless communication system includes: a transceiver configured to modulate desired transmission data onto a band of frequencies, thereby generating a transmission signal, and to demodulate a reception signal within the same frequencies in order to obtain received data; and an antenna module that includes a first radiative element, coupled to the transceiver and configured to receive and broadcast the transmission signal, and a second radiative element, also coupled to the transceiver and configured to receive the reception signal, simultaneous with the broadcast of the transmission signal. The first radiative element and the second radiative element have a common centroid. The transceiver and the antenna module are part of a single wireless device that is configured for full-duplex wireless communication, at a data rate of at least 100 megabits per second (Mb/s) over a distance that is not more than 100 millimeters from the antenna module.Type: GrantFiled: September 15, 2022Date of Patent: June 2, 2026Assignee: NXP B.V.Inventors: Floris Pepijn van der Wilt, Koen van Hartingsveldt, Johan Olink
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Patent number: 12638544Abstract: Techniques, methods, and systems are provided for interference sensing and adaptation in echolocation applications. An echolocation system transmits a series of chirp signals in a first portion of a transmission period based on a first set of chirp transmission parameters. Subsequently, the echolocation system identifies external sources of echolocation frequency transmissions during a non-transmitting portion of the transmission period. Based on characteristics of those identified external sources and echolocation frequency transmissions, a modified set of chirp transmission parameters is generated to mitigate the effects of the detected interference. A modified series of chirp signals is transmitted during a subsequent transmission period based on the modified set of chirp transmission parameters.Type: GrantFiled: December 19, 2023Date of Patent: May 26, 2026Assignee: NXP B.V.Inventors: Ashish Pandharipande, Alessio Filippi
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Patent number: 12641851Abstract: Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.Type: GrantFiled: December 20, 2021Date of Patent: May 26, 2026Assignee: NXP B.V.Inventors: Congyong Zhu, Bernhard Grote, Bruce McRae Green
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Patent number: 12638579Abstract: A first input signal that corresponds to an output transmitted signal of a power amplifier of a vehicle radar system is received and the output power level of the transmitted signal is calibrated to optimize quality of the transmitted signal at the antenna reference plane (ARP). The proposed calibration method and apparatus allows to improve the output power calibration accuracy at ARP by compensating for reflected power at power amplifier output. The proposed apparatus uses the coupled and the isolated outputs of a bi-directional coupler to compensate the mismatch between the output of the power amplifier and the ARP; detectors at both coupler outputs measure both powers (coupled, isolated output) and apply respective correction on the calibration target to compensate for reflected power.Type: GrantFiled: October 31, 2023Date of Patent: May 26, 2026Assignee: NXP B.V.Inventors: Mohamad El Ozeir, Cristian Pavao Moreira, Pierre Pascal Savary
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Patent number: 12640710Abstract: In accordance with a first aspect of the present disclosure, an active RC-type filter is provided, comprising: an input, an output and a signal path between said input and output; at least one capacitor bank and at least one resistor bank, wherein said capacitor bank and resistor bank are integrated into the signal path; wherein the resistor bank comprises a plurality of resistor ladders; wherein each one of said resistor ladders comprises a plurality of resistors connected in series; wherein each one of said resistors has an input node configured to be coupled selectively to the signal path through one of a plurality of controllable switches; and wherein said resistor ladders have output nodes directly coupled to each other and to the signal path. In accordance with a second aspect of the present disclosure, a corresponding method of implementing an active RC-type filter is conceived.Type: GrantFiled: October 30, 2023Date of Patent: May 26, 2026Assignee: NXP B.V.Inventors: Yuan Gao, Johannes Hubertus Antonius Brekelmans, Harish Kundur Subramaniyan
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Patent number: 12632715Abstract: Analog to digital conversion errors caused by non-linearities or other sources of distortion in an analog-to-digital converter are compensated for by use of a machine learning system, such as a neural network. The machine learning system is trained based on simulation or measurement data, which may utilize a reference ADC or a digital training signal representing a reference ADC that has less distortion errors than the analog-to-digital converter. The effect on the analog to digital conversion errors by Process-Voltage-Temperature parameters may be incorporated into the training of the machine learning system.Type: GrantFiled: July 20, 2020Date of Patent: May 19, 2026Assignee: NXP B.V.Inventor: Robert van Veldhoven
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Patent number: 12632679Abstract: The disclosure relates to performing a proximity check to determine whether a transponder device is in proximity of a reader device. In an example embodiment, a method of performing a proximity check to determine whether a transponder device is in proximity of a reader device comprises: transmitting a command from the reader device to the transponder device, the command including a request for a measured response time for a number n of previous command-response exchanges stored by the transponder device; in response to receiving the command at the transponder device, transmitting a response to the reader device, the response including a measured response time stored by the transponder device for the previous n command-response exchanges; and determining whether a predetermined criterion for the proximity check is fulfilled by comparing a measured response time stored by the reader device with the measured response time transmitted by the transponder device in the response.Type: GrantFiled: July 26, 2024Date of Patent: May 19, 2026Assignee: NXP B.V.Inventors: Reinhard Meindl, Peter Thüringer
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Patent number: 12634134Abstract: A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for a cryptographic operation using polynomials for lattice-based cryptography in a processor, the instructions, including: applying a share-wise Kronecker substitution to arithmetic shares of a first polynomial; applying a Kronecker substitution to a second polynomial; multiplying share-wise the Kronecker substitution of the second polynomial and the arithmetic shares of the Kronecker substitution of the shares of the first polynomial to produce arithmetic shares of a first output; converting the shares of the first output to arithmetic shares of a polynomial representation; converting the arithmetic shares of the polynomial representation to Boolean shares of the polynomial representation; adding the Boolean shares of the polynomial representation to Boolean shares of a third polynomial to produce Boolean shares of a second output; and carrying out a cryptographic operation using the BoolType: GrantFiled: June 30, 2023Date of Patent: May 19, 2026Assignee: NXP B.V.Inventors: Olivier Bronchain, Joost Roland Renes, Tobias Schneider
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Patent number: 12625230Abstract: In implementations of signal processing for OFDM radar systems, an OFDM transceiver of an ISAC system is operated in full-duplex mode in a downlink communication phase. The ISAC system generates sensing symbols for an OFDM radar system by combining OFDM communication symbols and repetitions of the OFDM communication symbols as the sensing symbols. The OFDM transceiver attenuates subcarriers of received sensing symbols for processing by the OFDM radar system to increase a signal-to-noise ratio of the received sensing symbols.Type: GrantFiled: September 15, 2023Date of Patent: May 12, 2026Assignee: NXP B.V.Inventors: Wilhelmus Johannes van Houtum, Vinicius Oliari Couto Dias
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Patent number: 12625227Abstract: A method of processing radar data comprising: receiving a mask that identifies a set of samples in received radar signalling that are detected as including interference, and comprises a matrix of data having a fast-time dimension and a slow-time dimension; receiving radar data comprising a matrix of samples of received radar signalling having a fast-time dimension and a slow-time dimension wherein the set of samples identified by the mask have been set to a predetermined value to remove said samples including interference; determining a reconstruction of the radar data in which at least the set of samples of the radar data are replaced with estimated samples, wherein said determining a reconstruction of the radar data comprises formulating an optimization problem based on the radar data and the mask, and applying an iterative method to solve the optimization problem at least in part in the range-Doppler domain.Type: GrantFiled: October 10, 2023Date of Patent: May 12, 2026Assignee: NXP B.V.Inventors: Jeroen Overdevest, Marco Jan Gerrit Bekooij, Arie Geert Cornelis Koppelaar
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Patent number: 12618895Abstract: Various embodiments relate to a method of testing a plurality of devices of the same type wherein each of the plurality of devices of the same type include a built-in self-test device, including: randomly generating, by a processor, stimulus parameters; applying, by the built-in self-test devices, the generated stimulus parameters N times to the plurality of devices of the same type; measuring, by the plurality of devices of the same type, a response of the plurality of devices of the same type to the generated stimulus parameters to produce M×N response outputs, where M is a number of the plurality of devices of the same type; calculating, by the processor, a defect likelihood for a test set of the plurality of identical devices based upon a mean of a reference set of the plurality of identical devices response outputs, a mean of the test set response outputs, a standard deviation of reference set response outputs, and a standard deviation of the test set response outputs; determining, by the processor, thatType: GrantFiled: January 3, 2023Date of Patent: May 5, 2026Assignee: NXP B.V.Inventors: Jan-Peter Schat, Paul Wielage
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Patent number: 12620724Abstract: A phased-array antenna system includes a substrate and a plurality of sub-arrays. Each sub-array comprises an array of patch antennas arranged on a first major surface of the substrate; a plurality of beamformer devices coupled to the array of patch antennas; a multi-channel up-down converter (UDC) and a combiner-splitter coupled to the multi-channel UDC. The combiner-splitter is configured to split a signal provided by the UDC and provide the signal to each of the plurality of beamformers and/or to combine signal provided by the plurality of beamformers and to provide the combined signal to the UDC. Each sub-array also includes an integrated device comprising the multi-channel UDC and the combiner-splitter. The integrated device and the plurality of beamformer devices is arranged on a second major surface of the substrate opposite the first major surface. The integrated device is arranged between at least two beamformer devices.Type: GrantFiled: January 30, 2023Date of Patent: May 5, 2026Assignee: NXP B.V.Inventors: Mustafa Acar, Lucas Maria Florentinus De Maaijer, Paul Mattheijssen