Abstract: A radar device including a radar function, a driver configured to control a pass device, and a radar controller. The radar function is configured for generating radar frames in a first mode for generating high isolation frames and in a second mode for generating low isolation frames. The radar function has a supply voltage input and is configured to operate with the supply voltage input at a radar supply voltage level. The radar controller configures the driver for controlling the pass device to regulate voltage provided to the supply voltage input of the radar function at the radar supply voltage level with high power supply rejection ratio to minimize ripple voltage when the radar function is in the first mode, and configures the driver to force the pass device into a bypass mode to reduce power dissipation when the radar function is in the second mode.

Abstract: A processing system including a peripheral configured to store security information and having a clock input receiving a gated clock, a watch clock generator configured to generate a watch clock that has a reduced duty cycle relative to a system clock, and clock control circuitry configured to select the system clock as the gated clock during normal operation of the peripheral and to select the watch clock as the gated clock during a low power mode of the peripheral. The watch clock generator may include a counter that counts system clock cycles and clock pulse selector, such as a modulo circuit, configured to select cycles of the system clock for generating the watch clock. For multiple peripherals, delay circuitry may skew a watch clock between two or more peripherals. Multiple watch clocks with different delayed duty cycles may be generated, each for a corresponding one of multiple groups of peripherals.

Abstract: Techniques, circuits, and systems related to a multicore rotary traveling wave oscillator (RTWO) are provided. The multicore RTWO includes at least two metal layers and multiple RTWO cores, such that each core comprises a set of differential signal conductors that are interleaved across the metal layers to optimize space and reduce parasitic effects. The relative positional configuration of these differential signal conductors varies across a range of directionalities and/or orientations. In embodiments, an oscillator output signal is generated by the multicore RTWO; the frequency of this oscillator output signal is adjusted based on a comparison of its phase with that of a reference signal, such as within a phase locked loop circuit.

Abstract: An apparatus configured to control a transmitter to provide for generation of a data frame, the data frame having a fixed length and fixed predetermined number of sub-frames, and each sub-frame comprises a predetermined number of slots based on a carrier frequencies, and each slot includes a fixed number of symbol time periods; receive a data stream for transmission; define at least one communication-slot for transmitting of data-symbols that represent said data stream and at least one sense-slot for transmitting a predetermined sense-symbol for use in sensing an environment; wherein the generation of the data frame further comprises: the generation of the data-symbols, in the respective symbol time periods of the at least one communication-slot, according to a predetermined encoding protocol, and the generation of the predetermined sense-symbol in at least one symbol time period of the respective at least one sense-slot.

Abstract: First information identifying a first one of a target circuit or a radio frequency (RF) tag is conveyed to a second one of the target circuit or the RF tag. Second information identifying the second one of the target circuit and the RF tag is then derived from the conveyed first information. The second information is then stored. In some cases, the first information is conveyed over a wired interface or a wireless interface between the target circuit and the RF tag. The first information identifying the RF tag can be conveyed to the target circuit, and second information identifying the target circuit can be derived based on the first information identifying the RF tag by equating the second information to the first information or applying a predetermined algorithm to the first information to generate the second information.

Abstract: In accordance with a first aspect of the present disclosure, a hardware accelerator is provided, comprising: an execution unit configured to execute at least one artificial intelligence (AI) model using one or more resources of the hardware accelerator; a watermark verification unit configured to verify whether a predefined watermark is present in the AI model and to output a verification result indicative of the presence or absence of said watermark; a resource management unit configured to enable said resources if the verification result indicates that the watermark is present. Further aspects of the present disclosure relate to a corresponding method of operating a hardware accelerator, and to a computer program for carrying out said method.

Abstract: A touch panel includes a first plurality of electrodes and a second plurality of electrodes. A plurality of transmitters generate a plurality of transmit signals by modulating a common sine wave signal with a set of orthogonal modulation signals, and drive each transmit signal onto a corresponding electrode of the first plurality of electrodes. Each transmit signal is generated by modulating the common sine wave signal with a unique orthogonal modulation signal of the set of orthogonal modulation signals. At least two of the plurality of transmit signals are not orthogonal. Each receiver of a plurality of receivers senses a receive signal on a corresponding electrode of the second plurality of electrodes and generates a set of correlation signals by correlating the receive signal with each transmit signal of the plurality of transmit signals. The sets of correlation signals are used to detect a touch event on the touch panel.

Abstract: Disclosed is a circuit including timer interleaved (TI) analog-to-digital converter (ADC) circuitry which generates digital output signals. Correction circuitry receives the digital output signals from the TI ADC circuitry and generates corrected output signals using weight values to correct time skew. The correction circuitry includes a derivative filter which removes frequency dependency between the weight values and input signals to the TI ADC circuitry. Weight updating circuitry receives the corrected output signals and generates updated weight values for the correction circuitry. The weight updating circuitry includes a notch filter which suppresses spectral content in the corrected output signals to cancel spurious correlations in the weight updating process.

Abstract: There is described a method of operating an NFC device, the method comprising: determining a resonance frequency of a matching network of the NFC device; modulating, by a modulator, a carrier signal received from an external reader, resulting in a modulated carrier signal; controlling, using a controller, a transmission of the modulated carrier signal to the external reader; and transmitting, by a transmitter driver, said modulated carrier signal, said transmitter driver having at least one configurable setting that influences a damping behavior of the transmitted modulated carrier signal, wherein, during a modulation phase of the NFC device, the controller selects and applies the at least one configurable setting based on the determined resonance frequency such that a clock synchronization window is widened. Furthermore, a corresponding NFC device is described.

Abstract: A device includes a first radio controller configured to communicate using a first protocol, and a pseudo random number generator configured to generate a pseudo random output value based on an input data value. The device includes a processor configured to determine a preamble code based on an output of the pseudo random number generator, and process a data packet received using the first radio controller using the preamble code to generate a processed data packet.

Abstract: A semiconductor device includes a semiconductor substrate, a collector region formed within the semiconductor substrate in a first semiconductor region having an upper surface and a collector sidewall, a base region disposed over the collector region, a seed region formed over the semiconductor substrate and coupled to the semiconductor substrate outside the base region, an extrinsic base region having an upper surface and formed over the seed region and electrically coupled to the base region, and an emitter region formed over the base region.

Abstract: In accordance with a first aspect of the present disclosure, an ultra-wideband (UWB) receiver is provided, comprising: an attack mitigation unit configured to mitigate one or more attacks on a correlation function; a correlation unit configured to perform the correlation function by correlating an input signal received by the UWB receiver with a predefined sequence and to generate a correlation output based on correlating said input signal with the predefined sequence; and a first path detection unit configured to receive the correlation output and to detect a first path by evaluating the correlator output during a correlation window, said correlation window being a predefined period of time. In accordance with a second aspect of the present disclosure, a corresponding method of operating a UWB receiver is conceived. In accordance with a third aspect of the present disclosure, a computer program is provided for carrying out said method.

Abstract: An adaptive noise classifier and a controller for controlling various noise cancellation systems of a vehicle are provided. The adaptive noise classifier determines a first acoustic state of the vehicle based on audio signals generated by various audio-capturing devices of the vehicle. The controller receives status data indicative of one or more functional attributes of the vehicle. Based on the status data and the first acoustic state, the controller determines a second acoustic state. The second acoustic state is an updated version of the first acoustic state. Based on the second acoustic state, the controller controls an operational state of each noise cancellation system of the vehicle.

Abstract: The present disclosure relates to an oscillator, such as a Digitally Controlled Oscillator (DCO), having first capacitor banks coupled to a first path and a second path, the first path connecting a first node to a first output node, and the second path connecting a second node to a second output node, and second capacitor banks coupled to a third path and a fourth path, the third path being connected to the first node, the fourth path being connected to the second node, the first and second paths being separate from the third and fourth paths, and the second capacitor banks including at least one modulation capacitor bank.

Abstract: A frequency beam-steered leaky wave antenna suitable for integration in a substrate such as a printed circuit board includes a waveguide formed from a first electrically-conductive surface and a second electrically conductive surfaces forming upper and lower surfaces of the waveguide and electrically-conductive vias form first and second sidewalls disposed between the upper and lower surfaces along a length of the waveguide. The waveguide has slotted openings distributed along the upper surface and a width of the waveguide is defined by a distance between the two sidewalls that varies along the length of the waveguide. A portion of radiofrequency energy travelling along a length of the waveguide is radiated away from the waveguide through the slotted openings. Performance characteristics of the antenna such as its directivity and operational bandwidth can be tuned by adjusting the geometry of the slotted openings and positioning of the vias.

Abstract: The disclosure relates to supporting multiple logical interfaces over a single physical interface, in particular relating to supporting multiple profiles on eSIMs/eUICCs.

Abstract: A chopper circuit (100) for a multipath chopper amplifier (201) is described. The chopper circuit (100) comprises a first chopper device (110) in a first circuit path (111), wherein the first chopper device (110) is configured to be controlled by a first clock signal (315), which has a first frequency; and a second chopper device (120) in a second circuit path (121), parallel to the first circuit path (111), wherein the second chopper device (120) is configured to be controlled by a second clock signal (325), which has a second frequency, wherein the first frequency is greater than the second frequency. Furthermore, a corresponding method of chopping an input signal (102) is described.

Abstract: Various aspects of the disclosure are directed to the communication and processing of radar signals. As may be implemented in accordance with one or more embodiments characterized herein, receiver-generated phase lag is compensated by phase smoothing and pre-distorting radar signals. The radar signals are transmitted and reflections of those signals from various objects are processed by aligning respective waveforms in the reflections using group delay filtering, and differentiating the aligned waveforms via decoding. The phase lag compensation carried applied to the signals prior to transmission facilitates the differentiation (e.g., by facilitating alignment prior to decoding).

Abstract: A modulator circuit may include an integrator circuit and a gain compensation circuit. The integrator circuit may include a first amplifier including an input to receive a signal and an output to provide an inverted signal and a capacitor including a first terminal coupled to the input and a second terminal coupled to the output. The gain compensation circuit may include a second inverter amplifier including a gain input coupled to the output of the first amplifier and including a gain output; a first resistor including a first terminal coupled to the gain output and including a second terminal; and a second capacitor including a first terminal coupled to the second terminal of the first resistor and including a second terminal coupled to the gain input. The integrator circuit has a finite DC gain and the gain compensation circuit is configured to compensate for the finite DC gain.

Abstract: In accordance with an aspect of the present disclosure, a communication system is provided, comprising: a first ultra-wideband (UWB) transmitter configured to be coupled to a first antenna; a second UWB transmitter configured to be coupled to a second antenna; a controller configured to cause the first UWB transmitter to transmit a first packet to an external communication device, wherein the first packet contains a predefined code; wherein the controller is further configured to cause the second UWB transmitter to transmit a second packet to the external communication device, wherein the second packet contains a cyclically shifted version of said predefined code.