Patents Assigned to NXP USA, INC.
  • Patent number: 10979543
    Abstract: Embodiments described herein provides a system for detecting data received in a low power low rate (LPMR) data frame format. The system includes a receiver and control circuitry. The receiver is configured to receive a data frame comprising an LPLR preamble portion and an LPLR data portion following the LPLR preamble portion. The LPLR preamble portion and the LPLR data portion occupy a bandwidth that is less than an allowed bandwidth. The control circuitry is configured to determine a mode of the data frame based on whether the data frame has an additional portion, and detect data field in the LPLR preamble portion from the data frame based on the mode of the data frame.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: April 13, 2021
    Assignee: NXP USA, INC.
    Inventors: Yakun Sun, Hongyuan Zhang, Lei Wang, Hui-Ling Lou
  • Patent number: 10979198
    Abstract: A communication device receives a first physical layer (PHY) data unit via a communication channel. The first PHY data unit corresponds to a trigger frame, and includes: a first PHY preamble having a legacy portion and a non-legacy portion, a first training field that includes a first training signal having a periodicity LP, and a second training field that includes a second training signal having the periodicity LP. The communication device generates a second PHY data unit. The second PHY data unit includes: a second PHY preamble that includes a third training field that includes a third training signal, and a fourth training field that includes a fourth training signal having a periodicity 2*LP. Generating the second PHY data unit comprises: modulating the third training field using a first tone spacing LTS between adjacent OFDM tones, and modulating the fourth training field using a second tone spacing equal to LTS/4 between adjacent OFDM tones.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: April 13, 2021
    Assignee: NXP USA, INC.
    Inventors: Yakun Sun, Hongyuan Zhang
  • Patent number: 10978123
    Abstract: A data system includes an information bus, a volatile memory located on the information bus, and an MRAM located on the information bus. The data system includes threat detection circuitry. In response to a threat condition to the MRAM, data is transferred via the information bus from the MRAM to the volatile memory for storage during a threat to the MRAM as indicated by the threat condition. In some examples, the threat condition is characterized as a magnetic field exposure.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventors: Geoffrey Mark Lees, Lawrence Loren Case, Nihaar N. Mahatme, Jeffrey C. Cunningham
  • Patent number: 10977195
    Abstract: A memory controller scrambles input data and stores the scrambled data in a memory, and then allows the stored data to be read from the memory only once. The memory controller includes a true random number generator (TRNG) for generating a true random number and a pseudo-random number generator (PRNG) that uses the true random number as a seed to generate a pseudo-random number. A linear feedback shift register (LFSR) receives and shifts the pseudo-random number and then scrambles the input data using the shifted number from the LFSR. The scrambled data then is stored in the memory and the seed is stored in one of the same or a separate memory. In response to a read request, the seed is read and used to regenerate the shifted number to descramble the stored data. The stored seed is invalidated to prevent additional attempts at reading the data.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventors: Shixiong Lu, Bin Sai
  • Patent number: 10979412
    Abstract: The present disclosure describes apparatuses and techniques for secure device authentication. In some aspects, a public ephemeral key of a device is exposed. A message received from a remote device to authenticate includes a hash of the public ephemeral key of the device, a public ephemeral key and an encrypted public key of the remote device, and an encrypted hash value useful to prove ownership of the public key received from the remote device. An encryption key is generated based on the public ephemeral key of the remote device and a private ephemeral key of the device. The device then decrypts, with the encryption key, the encrypted public key of the remote device and the encrypted hash value. The remote device is then authenticated by verifying, based on the decrypted hash value, that the remote device owns the decrypted public key.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventor: Paul A. Lambert
  • Patent number: 10979033
    Abstract: A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventors: Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Patent number: 10979095
    Abstract: A matching system of a communication device that incorporates teachings of the present disclosure may include, for example, a controller that executes instructions facilitating selection of a subset of usage scenarios according to a usage condition of a communication device. An impedance circuit is adjusted based on a subset of different tuning scenarios corresponding to the subset of usage scenarios to facilitate an impedance match to an antenna of the communication device. A group of operational parameters is obtained for each tuning scenario change between the subset of different tuning scenarios. Multiple operational parameters obtained at each of the subset of different tuning scenarios at different times are processed for each tuning scenario and a tuning scenario is selected based on a determination as to which of the processed operational parameters correlates with a predetermined performance goal. Additional embodiments are disclosed.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventors: Carsten Hoirup, Keith Manssen, Matthew Russell Greene
  • Patent number: 10972054
    Abstract: Embodiments of systems and method for automatically biasing power amplifiers using a controllable current source are disclosed. In an embodiment, a bias controller for a power amplifier includes a first reference device source/drain interface, a first controllable current source configured to generate a first reference current in response to a first current control signal and to provide the first reference current to the first reference device source/drain interface, a first reference device gate interface, a first current-to-voltage controller configured to generate a first stabilized voltage in response to the first reference current and to provide the first stabilized voltage to the first reference device gate interface, and a first power amplifier (PA) interface configured to output a first control voltage in response to the first stabilized voltage.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: April 6, 2021
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Xu Jason Ma
  • Patent number: 10972002
    Abstract: A regulator clamp circuit includes a comparison circuit having a sample and hold circuit. The comparison circuit compares a regulated voltage with a sampled voltage of the regulated voltage from a previous time. In some embodiments, the sampled voltage can be determined during a sampling phase that occurs prior to a clamp regulation phase. During the clamp regulation phase, the comparison circuit compares the regulated voltage with the sampled voltage and outputs a signal to activate an actuator circuit to clamp the regulated voltage when the regulated voltage terminal has a higher amount of charge than desired.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 6, 2021
    Assignee: NXP USA, INC.
    Inventors: Marcos Mauricio Pelicia, Luis Enrique Del Castillo, Eduardo Ribeiro da Silva, Ivan Carlos Ribeiro do Nascimento
  • Patent number: 10972142
    Abstract: Wireless networking transceiver circuitry for an integrated circuit device includes a plurality of wireless networking transceiver subsystems, each subsystem including respective processing circuitry configurable for coupling to radio circuitry to implement a respective set of protocol features selected from at least one overall set of protocol features. Memory circuitry is provided, sufficient to support a respective set of protocol features in each subsystem when at least one respective set of protocol features is smaller than the overall set of protocol features. Memory-sharing circuitry is provided, configurable to couple respective portions of the memory circuitry to the processing circuitry of respective subsystems. The memory circuitry and the memory-sharing circuitry may be outside the subsystems, or distributed within the subsystems. The memory may be 60% of an amount of memory sufficient to support the overall set of protocol features in all subsystems.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: April 6, 2021
    Assignee: NXP USA, Inc.
    Inventors: Timothy J. Donovan, Yui Lin, Lite Lo, Zhengqiang Huang
  • Patent number: 10971613
    Abstract: A semiconductor device includes a base substrate, a doped region at an upper surface of the base substrate, and a transistor over the upper surface of the base substrate and formed from a plurality of epitaxially-grown semiconductor layers. The doped region includes one or more ion species, and has a lower boundary above a lower surface of the base substrate. The base substrate may be a silicon substrate, and the transistor may be a GaN HEMT formed from a plurality of heteroepitaxial layers that include aluminum nitride and/or aluminum gallium nitride. The doped region may be a diffusion barrier region and/or an enhanced resistivity region. The ion species may be selected from phosphorus, arsenic, antimony, bismuth, argon, helium, nitrogen, and oxygen. When the ion species includes oxygen, the doped region may include a silicon dioxide layer formed from annealing the doped region after introduction of the oxygen.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: April 6, 2021
    Assignee: NXP USA, Inc.
    Inventors: Yuanzheng Yue, David Cobb Burdeaux, Jenn Hwa Huang, Bruce McRae Green, James Allen Teplik
  • Patent number: 10972091
    Abstract: Embodiments described herein include radio frequency (RF) switches that may provide increased power handling capability. In general, the embodiments described herein can provide this increased power handling by equalizing the voltages across transistors when the RF switch is open. Specifically, the embodiments described herein can be implemented to equalize the source-drain voltages across each field effect transistor (FET) in a FET stack that occurs when the RF switch is open and not conducting current. This equalization can be provided by using one or more compensation circuits to couple one or more gates and transistor bodies in the FET stack in a way that at least partially compensates for the effects of parasitic leakage currents in the FET stack.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: April 6, 2021
    Assignee: NXP USA, Inc.
    Inventor: Venkata Naga Koushik Malladi
  • Patent number: 10972096
    Abstract: An electronic switch that includes a signal path with a first terminal side of the signal path including cascoded transistors in the signal path. When the switch is in an off state, the gate of one of the cascoded transistors is biased at an intermediate voltage different from the voltage applied to the gate of the other of the cascoded transistors. In one embodiment, having the gate of one of the cascoded transistors biased at an intermediate voltage in an off state may reduce leakage current into a signal terminal of the switch. The electronic switch includes an injection shunting device (e.g. such as a transistor) connected to a node of the signal path. In one embodiment, the injection shunting device prevents the voltage of the node from reaching a specific voltage level due to leakage current when the switch is in an off state.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 6, 2021
    Assignee: NXP USA, INC.
    Inventors: Robert Matthew Mertens, James Robert Feddeler, Michael A. Stockinger
  • Patent number: 10972196
    Abstract: A first communication device generates and transmits a first trigger frame. One or more trigger type information fields of the first trigger frame are set to a first one or more respective values that indicates the first trigger frame is for: i) a multi-user (MU) ranging measurement procedure, and ii) causing multiple second communication devices to simultaneously transmit first null data packets (NDPs) as part of a first MU transmission associated with the MU ranging measurement procedure. The first communication device generates and transmits a second trigger frame. One or more trigger type information fields of the second trigger frame are set to a second one or more respective values that indicates the second trigger frame is for i) an MU ranging measurement procedure, and ii) causing the multiple second communication devices to simultaneously transmit feedback packets to the first communication device as part of a second MU transmission associated with the MU ranging measurement procedure.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 6, 2021
    Assignee: NXP USA, INC.
    Inventors: Liwen Chu, Christian R. Berger, Niranjan Grandhe, Hongyuan Zhang, Hui-Ling Lou
  • Patent number: 10966280
    Abstract: A first communication device generates a media access control (MAC) protocol data unit (MPDU) delimiter having i) a feedback indication field and ii) a feedback content field. The feedback indication field is generated to include a first value that indicates the MPDU delimiter includes the feedback content field rather than an MPDU length field corresponding to a second value of the feedback indication field. The feedback content field is generated to include feedback information such as acknowledgement information regarding a communication frame previously transmitted by a second communication device, or control, management, and/or status information regarding the first communication device that was previously requested by the second communication device. The first communication device then transmits a packet that includes the MPDU delimiter to the second communication device.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 30, 2021
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Hongyuan Zhang, Hui-Ling Lou
  • Patent number: 10963036
    Abstract: Systems and method for idle loop detection and control are disclosed. A processor operates in operating modes including an active mode and a disabled mode, and an interconnect bus is coupled between the processor and one or more additional electronic circuits. Logic within the processor is coupled to snoop the interconnect bus, and the logic is programmed to detect a new idle loop based upon repeated instructions on the interconnect bus and to place the processor in the disabled mode based upon execution of the new idle loop, which represents a previously unknown idle loop for the processor. Further, the logic can be programmed to store state data for the processor when the new idle loop is detected, and the logic can also be programmed to place the processor in the active mode based upon detection of a wakeup event for the new idle loop on the interconnect bus.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: March 30, 2021
    Assignee: NXP USA, Inc.
    Inventors: Ashish Mathur, Sandeep Jain
  • Patent number: 10955525
    Abstract: A method and apparatus for acquiring chirp data in a frequency modulated continuous wave (FMCW) radar system of a road vehicle. The method includes transmitting a FMCW signal comprising a plurality of ramping regions in which a frequency of the FMCW signal ramps up to a first frequency or ramps down to a second frequency. The method also includes receiving a reflected signal corresponding to the reflection of the FMCW signal from one or more physical objects. The reflected signal includes a plurality of ramping regions corresponding to the ramping regions of the transmitted FMCW signal. The method further includes sampling the reflected signal by: taking a plurality of samples in a ramping region in which the frequency of the reflected signal ramps up; and taking a plurality of samples in a ramping region in which the frequency of the reflected signal ramps down.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP USA, INC.
    Inventors: Muhammad Saad Nawaz, Ralf Reuter
  • Patent number: 10958492
    Abstract: A physical layer (PHY) preamble of a PHY data unit is generated, including generating one or more short orthogonal frequency division multiplexing (OFDM) symbols for one or more long training fields of the PHY preamble. Each of the one or more short OFDM symbols corresponds to a frequency domain sequence having a number of tones. Every N-th tone is modulated and tones between modulated tones are zero tones, where N is a positive integer greater than one. A time duration of each short OFDM symbol is 1/N of a time duration of a full inverse discrete Fourier transform (IDFT) of the frequency domain sequence. A data portion of the PHY data unit is generated, including generating one or more long OFDM symbols. A time duration of each long OFDM symbol is greater than a time duration of each of the one or more short OFDM symbols.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP USA, INC.
    Inventors: Hongyuan Zhang, Xiayu Zheng, Rui Cao, Mingguang Xu, Sudhir Srinivasa, Jie Huang
  • Patent number: 10957790
    Abstract: A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with a contact region formed within the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and second dielectric layers supported by the semiconductor substrate. At least one of the first and second ohmic contacts extends through respective openings in the first and second dielectric layers. The second dielectric layer is disposed between the first dielectric layer and a surface of the semiconductor substrate, and the second dielectric layer includes a wet etchable material having an etch selectivity to a dry etchant of the first dielectric layer.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP USA, Inc.
    Inventors: Bruce McRae Green, Darrell Glenn Hill, Karen Elizabeth Moore, Jenn-Hwa Huang, Yuanzheng Yue, James Allen Teplik, Lawrence Scott Klingbeil
  • Patent number: 10955467
    Abstract: An embedded continuity test circuit is provided. An integrated circuit includes a bond pad and an oscillator circuit. The oscillator circuit is configured to generate an oscillator signal having a first frequency when the bond pad is coupled to a bond region of a package and a second frequency when the bond pad is not coupled to the bond region of the package.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP USA, INC.
    Inventors: Kumar Abhishek, Srikanth Jagannathan, Hector Sanchez