Patents Assigned to NXP USA, INC.
  • Patent number: 11831423
    Abstract: Embodiments of a method and apparatus for communications are disclosed. In an embodiment, a method for wireless communications involves, in a punctured transmission, encoding, bits in a non-legacy preamble portion of a packet to include bandwidth information and resource allocation information, and signaling, in the packet, the bandwidth information and resource allocation information for at least one of a single-user-multiple-input multiple-output (SU-MIMO) technique, a multiple-user-multiple-input multiple-output (MU-MIMO) technique, and an orthogonal frequency-division multiple access (OFDMA) technique.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: November 28, 2023
    Assignee: NXP USA, Inc.
    Inventors: Rui Cao, Hongyuan Zhang, Liwen Chu
  • Patent number: 11832167
    Abstract: Embodiments of a method and an apparatus for wireless operations are disclosed. In an embodiment, a method for wireless operations involves a first wireless device transmitting to a second wireless device, a management frame having a multi-link device (MLD) level Quality of Service Management Frame (QMF) Policy field that identifies an MLD level QMF Policy and a link level QMF Policy field that identifies a link level QMF Policy for a corresponding link, where the MLD level QMF Policy indicates an Access Category (AC) for each MLD level QMF management frame and each link level QMF Policy field indicates the AC for each link level QMF management frame, receiving, at the second wireless device, the management frame with the MLD level QMF Policy field and link level QMF Policy field for each corresponding link, and operating the second wireless device according to the AC indicated by the first wireless device.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: November 28, 2023
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang
  • Patent number: 11830842
    Abstract: A device assembly includes a functional substrate having one or more electronic components formed there. The functional substrate has a cavity extending from a first surface toward a second surface of the functional substrate at a location that lacks the electronic components. The device assembly further includes a semiconductor die placed within the cavity with a pad surface of the semiconductor die being opposite to a bottom of the cavity. The functional substrate may be formed utilizing a first fabrication technology and the semiconductor die may be formed utilizing a second fabrication technology that differs from the first fabrication technology.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: November 28, 2023
    Assignee: NXP USA., Inc.
    Inventors: Li Li, Lakshminarayan Viswanathan, Jeffrey Kevin Jones
  • Patent number: 11821936
    Abstract: A method for in situ threshold voltage determination of a semiconductor device includes sourcing a current to a first terminal of the semiconductor device. A gate terminal of the semiconductor device is driven with a plurality of gate levels. Each gate level includes one of a plurality of different gate voltages. A transistor voltage is measured between the first terminal and a second terminal of the semiconductor device during each gate level. The respective gate voltage is stored in response to the semiconductor device voltage transitioning past a voltage limit. A temperature dependent threshold voltage of the semiconductor device is estimated for a first measured temperature measured during the storing of the stored gate voltage from a previously stored gate voltage and a second measure temperature.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: November 21, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jerry Rudiak, Ibrahim Shihadeh Kandah
  • Patent number: 11821946
    Abstract: Testing clock division circuitry includes generating pseudo random test pattern bits for scan chain logic in programmable clock division logic circuitry and divided clock counter circuitry. A shift clock is used to shift the test pattern bits into the scan chain logic. A capture clock signal is used in the programmable clock division logic during a non-test mode of operation. The shift clock is used to provide output shift bits from the scan chain logic to a multi-input shift register (MISR). Once all the output shift bits for the test pattern bits are provided to the MISR, a final test signature from the MISR is compared to an expected test signature to determine whether the programmable clock division logic circuitry and divided clock counter circuitry are free of faults.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: November 21, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jorge Arturo Corso Sarmiento, Anurag Jindal
  • Patent number: 11824376
    Abstract: A wireless power transmitter to wirelessly transmit power applies a current or voltage to a transmitter coil based on an indication of coupling being in a predetermined range. The current or voltage which is applied causes the transmitter coil to transmit a high power (HP) DPING. A response to the HP DPING indicates that a wireless power receiver is located on a charging surface and a power signal is then transmitted to the wireless power receiver to charge or power an electronic device coupled to the wireless power receiver. Use of HP DPING improves the wireless power transmission performance including transmission area and interoperability of wireless power transmitters with low coupling to wireless power receivers.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: November 21, 2023
    Assignee: NXP USA, Inc.
    Inventors: Radek Holis, Huan Mao, Dengyu Jiang
  • Patent number: 11824442
    Abstract: An error amplifier circuit for a DC-DC power converter controller is disclosed for providing an amplified error signal to a switch control circuit, the circuit comprising an error amplifier first stage. The first stage comprises: a first input terminal for receiving a voltage proportional to an output voltage of the converter; an output node; a first operational transconductance amplifier in a first path between the input terminal and the output node and having a first input connected to the input terminal, a second input connectable to a reference signal, and an output connected to the output node; and a second, parallel, path comprising a series combination of an amplifier, a second OTA and a capacitor. The second OTA has an output connected to the capacitor, a first input connected to an output of the amplifier, and a second input connected to the output. Associated control circuits, controllers and converters are also disclosed.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: November 21, 2023
    Assignee: NXP USA, Inc.
    Inventor: Denis Sergeevich Shuvalov
  • Patent number: 11823978
    Abstract: An integrated circuit comprises a substrate that includes a first surface and a second surface. A first through substrate via (TSV) is formed between the first surface and the second surface and a first conductive material is arranged within the first TSV to form a conductive path between the first surface and the second surface through the substrate. A second TSV is formed between the first surface and the second surface and a second conductive material arranged within the second TSV to form a conductive path between the first surface and the second surface through the substrate. In examples the first TSV has a larger cross-sectional area than the second TSV, the cross-section of the first TSV and second TSV being in a plane parallel to the first surface or the second surface.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: November 21, 2023
    Assignee: NXP USA, Inc.
    Inventor: Darrell Glenn Hill
  • Patent number: 11823968
    Abstract: A semiconductor device package having stress isolation is provided. The semiconductor device package includes a package substrate and a sensor attached to the package substrate. A first isolation material is formed around a perimeter of the sensor. An encapsulant encapsulates at least a portion of the first isolation material and the package substrate.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: November 21, 2023
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Stephen Ryan Hooper
  • Patent number: 11815620
    Abstract: A digitally modulated radar, DMR, transmitter module is disclosed comprising: a sequence generator, configured to generate a repeating digital sequence signal based on a relatively low-frequency clock signal; a mixer configured to combine the digital sequence signal with at least one phase-delayed copy of the digital sequence signal, to provide a combined signal; and a modulator configured to modulate a relatively high-frequency carrier signal, in dependence on the combined signal, to provide a modulated signal. Corresponding systems and methods are also disclosed.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: November 14, 2023
    Assignee: NXP USA, INC.
    Inventors: Gustavo Guarin Aristizabal, Ralf Reuter, Maik Brett
  • Patent number: 11817486
    Abstract: A semiconductor device and a method of making a semiconductor device are described. The device includes an emitter. The device also includes a collector. The device further includes a base stack. The base is located between the emitter and the collector. The base stack includes an intrinsic base region. The device further includes a base electrode. The base electrode comprises a silicide. The silicide of the base electrode may be in direct contact with the base stack. The device may be a heterojunction bipolar transistor.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: November 14, 2023
    Assignee: NXP USA, Inc.
    Inventors: James Albert Kirchgessner, Jay Paul John, Steven Kwan
  • Patent number: 11817366
    Abstract: A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A first conductive connector is affixed to a first connector pad of the package substrate. A conformal thermal conductive layer is applied on the semiconductor die and a portion of the first surface of the package substrate. The conformal thermal conductive layer is configured and arranged as a thermal conduction path between the semiconductor die and the first conductive connector.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 14, 2023
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Kabir Mirpuri, Rushik P. Tank, Betty Hill-Shan Yeung
  • Patent number: 11815553
    Abstract: The disclosure relates to apparatus and methods for self-testing of a duty cycle detector. Example embodiments include a circuit (201) comprising: a clock signal generator (205) configured to provide an output clock signal (203) having a duty cycle; a duty cycle detector (208) arranged to receive the output clock signal (203) and provide an output flag if the duty cycle of the clock signal (203) is outside a predetermined range; a controller (214) arranged to provide a duty cycle select signal (216) to the clock signal generator (205) to cause the clock signal (203) to have a duty cycle outside the predetermined range and to receive the output flag to confirm operation of the duty cycle detector (208).
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: November 14, 2023
    Assignee: NXP USA, INC.
    Inventors: Cristian Pavao Moreira, Andreas Johannes Köllmann, Ulrich Moehlmann
  • Patent number: 11815585
    Abstract: A method and system are provided to resolve Doppler ambiguity and multiple-input, multiple-output array phase compensation issues present in Time Division Multiplexing MIMO radars by estimating an unambiguous radial velocity measurement. Embodiments apply a disambiguation algorithm that dealiases the Doppler spectrum to resolve the Doppler ambiguity of a range-Doppler detection. Phase compensation is then applied for corrected reconstruction of the MIMO array measurements. The dealiasing processing first forms multiple hypotheses associated with the phase corrections for the radar transmitters based on a measured radial velocity of a range-Doppler cell being processed. A correct hypothesis, from the multiple hypotheses, is selected based on a least-spurious spectrum criterion. Using this approach, embodiments require only single-frame processing and can be applied to two or more transmitters in a TDM MIMO radar system.
    Type: Grant
    Filed: February 27, 2021
    Date of Patent: November 14, 2023
    Assignee: NXP USA, Inc.
    Inventors: Ryan Haoyun Wu, Dongyin Ren, Satish Ravindran
  • Patent number: 11808804
    Abstract: An integrated circuit (IC) includes subcircuits, power switches coupled to pass load current to a respective one of the subcircuits when activated by a respective switch control signal, and sensing circuits. Each of the sensing circuits is coupled to a respective one of the subcircuits, wherein the sensing circuits are configured to generate sense currents that are proportional to the respective load currents. The IC also includes a conversion circuit configured to receive at least one of the sense currents and to convert the at least one of the sense currents to an equivalent multi-bit digital signal, a timestamp circuit configured to generate a timestamp value that is correlated with the multi-bit digital signal, and a controller configured to provide signals to operate the power switches and the sensing circuits.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: November 7, 2023
    Assignee: NXP USA, Inc.
    Inventors: Antonio Mauricio Brochi, Felipe Ricardo Clayton
  • Patent number: 11811443
    Abstract: The disclosure relates to a communications system having a transmitter and receiver connected via a transmission line. An example communications receiver (202) comprises: a pair of input connections (211, 212) for connecting to a transmission line (203); a termination resistance (213) equal to a characteristic impedance (Zc) of the transmission line (203); an air core transformer (205) having an input coil (206) connected to the pair of input connections (211, 212) via the termination resistance (213); and a comparator circuit (208) connected to an output coil (207) of the air core transformer (205), the comparator circuit (208) configured to provide an output signal (504) responsive to detection of voltage pulses across the output coil (207).
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: November 7, 2023
    Assignee: NXP USA, INC.
    Inventors: Thierry Michel Alain Sicard, Guerric Panis
  • Patent number: 11811245
    Abstract: A method of compensating for temperature dependent Q factor variations in a wireless charger includes receiving, by the wireless charger, a reference Q factor value from a device to be charged. The method also includes the wireless charger determining a Q factor threshold value from the reference Q factor. The method further includes the wireless charger measuring a Q factor associated with a transmit coil of the wireless charger. The method also includes determining a temperature value. The method further includes applying a temperature compensation calculation to the measured Q factor using the temperature value to produce a temperature compensated Q factor. The method also includes comparing the temperature compensated Q factor with the Q factor threshold value. The method may also include compensation for temperature dependent internal power loss values.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: November 7, 2023
    Assignee: NXP USA, Inc.
    Inventors: Huan Mao, Dechang Wang, Dengyu Jiang
  • Patent number: 11805470
    Abstract: A reduced neighbor report (RNR) element is generated. The generated RNR element includes multi-link device operation (MLO) information of least one neighboring wireless device to a reporting wireless device. In examples, the MLO information defines information of a respective multi-link device (MLD) which each at least one neighboring wireless device to the reporting wireless device is affiliated. A multilink (ML) element is also generated. The generated ML element includes basic service set (BSS) information of each of at least one wireless device affiliated to an MLD where the reporting wireless device is affiliated to the same MLD. The reporting wireless device transmits a frame which comprises the generated RNR element and the generated ML element, where the generated ML element does not include any other RNR element.
    Type: Grant
    Filed: May 16, 2021
    Date of Patent: October 31, 2023
    Assignee: NXP USA, Inc.
    Inventors: Young Hoon Kwon, Liwen Chu, Hongyuan Zhang
  • Patent number: 11804527
    Abstract: A transistor includes a source contact connected to a Through-Silicon Via (TSV). A drain contact is connected to a first pad. A gate structure is interposed between the source contact and the drain contact. A second pad is connected to the gate structure, the second pad comprising a first side diametrically opposed to a second side, and a third side interposed therebetween, the source contact proximal to the third side, a first portion of the first side and a second portion of the second side.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: October 31, 2023
    Assignee: NXP USA, Inc.
    Inventors: Vikas Shilimkar, Kevin Kim, Daniel Joseph Lamey, Bruce McRae Green, Ibrahim Khalil, Humayun Kabir
  • Patent number: 11797041
    Abstract: One example discloses a power management circuit, including: a voltage reference circuit including a bandgap circuit coupled to and configured by a first trimming circuit; an undervoltage lockout (UVLO) circuit coupled to and configured by a second trimming circuit; wherein the first trimming circuit and the second trimming circuit are configured to receive a single trim control setting.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: October 24, 2023
    Assignee: NXP USA, Inc.
    Inventor: Trevor Mark Newlin