Abstract: Consistent with an example embodiment, a semiconductor device comprises a device die having bond pads providing connection to device die circuitry. The semiconductor device includes a QFN package (quad-flat-pack no-leads) built-up substrate lead frame having, a sub-structure of I/O terminals and a die attach area, the I/O terminals and die attach area enveloped in a molding compound; the die attach area has exposed areas to facilitate device die attachment thereon and the terminal I/O terminals provide connection to the device die bond pads. I/O terminals are electrically coupled with one another and to the die attach area with connection traces. The coupled I/O terminals and connection traces facilitate electroplating of exposed vertical surfaces of the I/O terminals during assembly, said connection traces being severed after assembly. Molding compound encapsulates the device die on the built-up substrate lead frame.

Abstract: In an example embodiment, a heterojunction device comprises a substrate, a multilayer structure disposed on the substrate. The multilayer structure has a first layer having a first semiconductor disposed on top of the substrate; a second layer has a second semiconductor is disposed on top of the first layer defining an interface between them. The second semiconductor differs from the first semiconductor such that a 2D Electron Gas forms adjacent to the interface. A first terminal couples to a first area of the interface between the first and second layers and a second terminal couples to a second area of the interface between the first and second layers; an electrically conducting channel comprises a metal or a region of the first layer with a higher defect density than another region of the first layer. The channel connects the second terminal and a region of the first layer such that electric charge can flow between them.

Abstract: Embodiments of a differential driver circuit and a method for controlling a differential driver circuit are described. Embodiments of a differential driver circuit may include a current steering circuit configured to determine a current direction through differential output terminals of the differential driver circuit, two resistors connected between the differential output terminals of the differential driver circuit and first and second semiconductor circuits connected to a point between the two resistors. The first and second semiconductor circuits are of different types. The source terminals of the first and second semiconductor circuits are connected to the point between the two resistors.

Abstract: The invention provides a semiconductor device comprising with a capacitive security shield structure which uses a set of randomly distributed dielectric or conducting particles formed within a dielectric layer. A set of electrodes can be configured as at least two sets, wherein a first set is used to measure a capacitance characteristic, and a second set is configured as non-measurement set. The electrode configuration can be altered so that multiple measurements can be obtained.

Abstract: A substrate arrangement comprising a substrate having a surface configured to receive, by epitaxy, an epitaxial layer of semiconducting material, the substrate comprising a laminate having a handle layer and a seed layer, the seed layer having a crystal orientation arranged to receive the epitaxial layer and the handle layer having a crystal orientation different to the seed layer.

Abstract: The present disclosure relates to an electrostatic discharge (ESD) protection device. The electrostatic discharge protection device, may comprise: a semiconductor controlled rectifier; and a p-n diode. The semiconductor controlled rectifier and the diode may be integrally disposed laterally at a major surface of a semiconductor substrate; and a current path for the semiconductor controlled rectifier may be separate from a current path for the diode.

Abstract: A heterojunction semiconductor device (200) comprising a substrate (202) and a multilayer structure disposed on the substrate. The multilayer structure comprising a first layer (204), which comprises a first semiconductor disposed on top of the substrate, and a second layer (206), which comprises a second semiconductor disposed on top of the first layer to define an interface between the first layer and the second layer. The second semiconductor is different from the first semiconductor such that a Two-Dimensional Electron Gas (220) forms adjacent to the interface. The multilayer structure also comprising a passivation layer, which comprises a semiconductor passivation layer (208) disposed on top of the second layer. The heterojunction semiconductor device also includes a first terminal (210) electrically coupled to a first area of the heterojunction semiconductor device; and a second terminal (212) electrically coupled to a second area of the heterojunction semiconductor device.

Abstract: An electrostatic discharge (ESD) protection device on a semiconductor substrate and a method for making the same. The device has an active region. The active region includes a gate. The active region also includes a source including a silicide portion having a source contact. The active region further includes a drain including a silicide portion having a drain contact. The source and drain each extend away from the gate along a device axis. The drain contact is laterally offset with respect to the source contact along a direction orthogonal to the device axis whereby current flow between the source contact and the drain contact has a lateral component. The device further comprises a non-silicide region located laterally between the drain contact and the source contact.

Abstract: A switching direct current (DC)-to-DC converter includes a charge pump circuit with a flying capacitor (104) and a switching circuit (106). The switching circuit (106) has an ON resistance (Ron) and is configured and arranged to boost an input voltage (Vin) by operating in each of a charging mode (loading) during which charge is provided from the flying capacitor (104) to an output voltage (Vout) and a discharging mode (storing) during which charge is not provided from the flying capacitor (104) to the output voltage (Vout). A determination circuit (102) is configured and arranged to determine a ratio between a discharge rate (308) and a charge rate (310). The discharge rate (308) and the charge rate (310) both correspond to a rate of change for the output voltage of the switching DC-to-DC converter. An ON resistance circuit (102) module is configured and arranged to adjust the ON resistance (Ron) of the charging mode (loading) and to change the determined ratio to a target ratio.

Abstract: A light sensor device comprises a substrate (10) having a well (12) defined in one surface. At least one light sensor (14) is formed at the base of the well (12), and an optical light guide (18) in the form of a transparent tunnel (18) within an opaque body (20) extends from a top surface of the device down a sloped side wall of the well (12) to the location of the light sensor (14).

Abstract: An amplifier has a dual bridge design with two bridge amplifiers. A mode switch enables them to be configured in a series amplification mode. The switching of the mode switch is dynamic and enables re-use of signal current thereby improving overall system efficiency. A delay to the mode switch closure is provided in the event of clipping of one of the amplifier outputs. This prevents large cross currents from flowing.

Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.

Abstract: Various example embodiments are directed to methods and circuits for mitigation of on-resistance variation and signal attenuation in transistors due to body effects. In some embodiments, an apparatus includes a transistor configured to provide a data signal from a first one of the source or the drain to the other one of the source or the drain in response to a control signal provided to the gate. A body bias circuit is configured to bias the body of the transistor based on a voltage of the data signal to reduce variation in the on-resistance exhibited by the first transistor. As a result of the reduced variation in the on resistance, attenuation of the data signal is reduced.

Abstract: A semiconductor device (300a) comprising: a substrate (302) having a first surface (303); an n-type well (304) extending from the first surface (303) into the substrate (302) and configured to form a depletion region (306) in the substrate (302) around the n-type well (304); an insulating layer (340) extending over the first surface (303) of the substrate (302) from the n-type well (304), the insulating layer (340) configured to form an inversion layer (342) in the substrate (302) extending from the n-type well (304) adjacent to the first surface (303); wherein a p-type floating channel stopper (370a) is provided, configured to extend through the inversion layer (342) to reduce electrical coupling between the n-type well (304) and at least part of the inversion layer (342), and is electrically disconnected from a remainder of the substrate (320) outside of the depletion region (306).

Abstract: A controller and method for operating a controller are disclosed. In an embodiment, a method involves in a mode-setting phase, polling connection pins to sense the presence and/or magnitude of a respective relatively high impedance connected between a respective connection pin and a predetermined electrical potential, and/or other connection pins to sense the presence and/or magnitude of a respective further impedance connected between the respective connection pin and a predetermined electrical potential. The method also involves selecting an operational mode from a plurality of possible operational modes. In an operational phase, the method involves operating in the selected operational mode, including providing a respective drive signal having a relatively low output impedance from each of the first group of connection pins, and measuring a sense voltage on each of the second group of connection pins.

Abstract: A device including a processor and a memory is disclosed. The memory includes programming instructions which when executed by the processor perform an operation. The operation includes detecting relative position of two earphones when connected to the device, determining if a binaural signal processing mode is appropriate based on the detected relative position and switching to the binaural signal processing mode. If it is determined that the binaural signal processing mode is not appropriate, switching to monaural processing mode.

Abstract: Embodiments of an article of manufacture, a system for processing audio signals and a computer-readable storage medium containing program instructions for processing audio signals are described. In one embodiment, an article of manufacture comprising at least one non-transitory, tangible machine readable storage medium containing executable machine instructions for processing audio signals, where execution of the executable machine instructions by a processing device causes the processing device to perform steps, which include estimating a spectral difference between a first audio signal and a second audio signal that carry the same audio content, transforming the second audio signal based on the spectral difference and generating an output audio signal based on the transformed second audio signal. Other embodiments are also described.

Abstract: Transponder (104), comprising a storage unit (106) having stored a number of different applications, a processing unit (108) which, on request of a reader (102), is adapted to generate a response interpretable using an encryption scheme known by both the transponder (104) and the reader (102) so that the reader (102) is capable of determining whether an application is supported by the transponder (104) by analyzing the response using the encryption scheme, and a transmission unit (110) adapted to send the response to said reader (102).

Abstract: “Click-assembly” methods of assembling a sensor for sensing biologically-active molecules by measuring impedance changes, are disclosed, comprising supporting a bio-sensor on a carrier, the bio-sensor comprising an electronic component having at least one micro-electrode and at least one electrical contact, functionalizing the bio-sensor by physically or chemically coupling a bio-receptor molecule to each of the at least one micro-electrode, and subsequently assembling the bio-sensor with a micro-fluidic unit by means of a clamp which clamps the bio-sensor with the micro-fluidic unit, such that in use a fluid introduced into the micro-fluidic unit is able to contact the bio-receptor and is isolated from the electrical contact. The clamp may be a spring, and the method may avoid a requirement for sealing by chemical or thermal means and thereby avoid damaging the bio-receptor. Sensors which can be assembled according to such methods are also disclosed.

Abstract: Embodiments of a packaged semiconductor device with no leads are disclosed. One embodiment includes a semiconductor chip and a no leads package structure defining a boundary and having a bottom surface and includes three or more pads exposed at the bottom surface of the package structure. Each of the pads is located in a single inline row.