Patents Assigned to NXP
  • Patent number: 9435842
    Abstract: The invention provides a testing circuit for testing a connection between a chip and external circuitry. A current source is used to inject a DC current towards the connection to be tested from the chip side. On-chip ESD protection is provided giving a path between the connection to be tested and a fixed voltage line. A shunt path is also coupled to the connection to be tested on the external circuitry side. It is determined if the current source current flows through the ESD protection circuit, and this can be used to determine whether or not the connection to be tested presents an open circuit for the DC test current.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: September 6, 2016
    Assignee: NXP B.V.
    Inventors: Cicero Silveira Vaucher, Mingda Huang, Antonius de Graauw
  • Patent number: 9435802
    Abstract: A sensor device has an arrangement of plural sensors for sensing an analyte which is in at least one of liquid phase or a suspension or a gel. Each sensor includes a nano-electrode and is configured to sense the presence of a particle localized to or bound to the nano-electrode. The sensor is configured to discriminate in real-time the binding of particles to respective nano-electrodes.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: September 6, 2016
    Assignee: NXP B.V.
    Inventor: Franciscus Petrus Widdershoven
  • Patent number: 9436899
    Abstract: An integrated circuit (1a) for a transponder (1), wherein said integrated circuit (1a) is switchable between a TTF (transponder talks first) and an RTF (reader talks first)-mode within a switching timeframe (TF2), wherein the position of the switching timeframe (TF2) is shif table in relation to a timeframe (TF1) allocated to the TTF-mode. In a preferred embodiment, the switching timeframe (TF2) is before a timeframe (TF1) allocated to the TTF-mode by default. After initialization of the transponder (1), the switching timeframe (TF2) is switched to a position after the timeframe.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: September 6, 2016
    Assignee: NXP B.V.
    Inventors: Helmut Haar, Kurt Bischof, Heiko Scharke
  • Patent number: 9438429
    Abstract: An authentication method (100) for a secure data transmission is provided, the method comprising performing a first authentication protocol (101) by using a first cipher and performing a second authentication protocol (102) by using a second cipher. Possible inputs for the first authentication protocol (101) may be one shared key or several keys, and one or two random numbers.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: September 6, 2016
    Assignee: NXP B.V.
    Inventors: Heike Neumann, Paul Hubmer, Peter Thueringer
  • Patent number: 9437182
    Abstract: A method of active noise reduction is described which comprises receiving an audio signal (132) to be played, receiving a noise signal (105, 107, 116, 118, 126), indicative of ambient noise (111), from at least one microphone (104, 106), and generating a noise cancellation signal (114) depending on both, said audio signal (132) and said noise signal (105, 107, 116, 118, 126).
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: September 6, 2016
    Assignee: NXP B.V.
    Inventor: Simon Doclo
  • Publication number: 20160253189
    Abstract: A method for protecting computer software code is disclosed. In the embodiment, the method involves receiving instructions corresponding to computer software code for an application, the instructions including a first section of instructions to protect that is indicated by a first indicator and a second section of the instructions to protect that is indicated by a second indicator, rewriting the first section of instructions into a first section of virtual instructions, and rewriting the second section of instructions into a second section of virtual instructions, wherein the first section of instructions includes a first virtual instruction that corresponds to a first handler and the second section of virtual instructions includes a second virtual instruction that corresponds to a second handler, the first handler having different properties than the second handler.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 1, 2016
    Applicant: NXP B.V.
    Inventor: Philippe Teuwen
  • Patent number: 9430729
    Abstract: In one embodiment, an RFID apparatus is provided, which includes an input circuit that has an input impedance used for receiving RF signals. An RF-signal converter provides an apparatus-operating power signal in response to receiving the RF signals. An impedance circuit provides and selects impedance values in response to at least one select signal provided by a state-machine logic circuit. The state-machine logic circuit provides the select signal(s) in response to the apparatus-operating power signal for selecting the impedance values and therein permit the input impedance to be changed for tuning the RFID apparatus.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Rachid El Waffaoui, Christian Weidinger
  • Patent number: 9429611
    Abstract: The present invention relates to a noise sensor for an alternating or direct current power supply. The sensor comprises a noise sensing unit and a noise separator. The noise separator is configured to receive first, second and third input signals and provide a first output signal representative of the common mode noise and a second output signal representative of the differential mode noise. The noise sensing unit comprises a first capacitive element, a second capacitive element, a first resistive element and a second resistive element.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Juergen Stahl, Alexander Pawellek, Markus Schmid, Thomas Duerbaum, Johann Kuebrich, Hans Halberstadt, Frans Pansier, Jens Goettle, Anton Blom
  • Patent number: 9430604
    Abstract: Various example embodiments are directed to methods and apparatuses for implementing a circuit design within an integrated circuit (IC) package. A respective capacitance is determined for each die contact of a circuit design. A respective target inductance range is selected for each of the plurality of die contacts based on the determined capacitance. A segmentation of the circuit design is determined as a function of the target inductance ranges. The segmentation defines an implementation of the circuit design on a plurality of IC dies. The IC dies are placed at respective locations on the substrate, based on the resulting inductances of connections (e.g., conductive traces) between the die contacts and terminals of the IC package.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Jong Kim, James Spehar, Xu Zhang
  • Patent number: 9432779
    Abstract: An antenna, in particular a dipole antenna, for radio communication in a hearing aid, is disclosed. The antenna includes a solid three-dimensional dielectric support body, an electrically conductive first plate on a first surface of the support body and an electrically conductive second plate on a second surface of the support body. The first surface and the second surface are arranged on opposing ends of the support body. An electrically conductive filament is arranged on and/or in the support body, electrically coupling the first plate with the second plate, and comprising first sections and second sections. The second sections extend perpendicular to the first sections.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventor: Anthony Kerselaers
  • Patent number: 9431909
    Abstract: Consistent with an example embodiment, a synchronous rectifier controller for a switched mode power supply comprises a transformer with a secondary side winding and a synchronous rectifier transistor with a gate, a source and a drain; the source and drain provide a conduction channel coupled to the secondary side winding. The controller comprises an input terminal for receiving an input signal related to a voltage at the drain, an output terminal configured to provide an output signal for setting a logic state of the gate, and circuitry having a first threshold and a second threshold. The circuitry is configured to generate the output signal and determine a time period in accordance in accordance with a comparison between the input signal and the first threshold; and in accordance with a comparison between the input signal and the second threshold, set the first threshold in accordance with the time period.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventor: Arjan Strijker
  • Patent number: 9433049
    Abstract: A controller for controlling a plurality of LED lighting strings is disclosed, the controller comprising, for each of the plurality of LED lighting strings: a frequency modulator configured to modulate a baseline frequency to generate a time-vary modulated frequency, wherein the frequency modulator is configured to modulate the baseline frequency by a jitter superposed on a regular repeating pattern which varies more slowly than the jitter, to result in the modulated frequency; and a modulated PWM signal generator configured to generate a modulated PWM signal having the modulated frequency and a predetermined duty cycle; wherein the regular repeating patterns for the PWM signals are spaced apart in phase. Associated drivers, LED lighting circuits and methods are also disclosed.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: August 30, 2016
    Assignee: NXP, B.V.
    Inventor: Michael Scott
  • Patent number: 9431894
    Abstract: Aspects of the present disclosure are directed to method, circuits, and apparatuses for power conversion. In an example embodiment, an apparatus includes a boost converter having a current loop affected by at least one compensation correction parameter and variation in an inductance of the current loop. The apparatus also includes a power factor correction means, including a circuit, configured and arranged to adaptively modify the compensation correction parameter based on variation in the inductance of the current loop.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Dong Li, Chan Yoke Cheong
  • Patent number: 9431524
    Abstract: Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate (10) comprising a pair of first isolation regions (12) separated from each other by an active region (11) comprising a collector impurity said bipolar transistor; forming a base layer stack (14, 14?) over said substrate; forming a further stack of a migration layer (15) having a first migration temperature and an etch stop layer (20) over said base layer stack (14); forming a base contact layer (16) having a second migration temperature over the further stack, the second migration temperature being higher than the first migration temperature; etching an emitter window (28) in the base contact layer over the active region, said etching step terminating at the etch stop layer; at least partially removing the etch stop layer, thereby forming cavities (29) extending from the emitter window in between the base contact layer and the redistribution layer; and exposing the resultan
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Johannes Josephus Theodorus Marinus Donkers, Petrus Hubertus Cornelis Magnee, Blandine Duriez, Evelyne Gridelet, Hans Mertens, Tony Vanhoucke
  • Patent number: 9432761
    Abstract: One example discloses a signal processor, including: a signal input having an input bandwidth; a first transducer output; a second transducer output; a filter network coupled to the signal input, the first transducer output and the second transducer output; wherein the filter network is configured to output a first portion of the input bandwidth on the first transducer output and a second portion of the input bandwidth on the second transducer output; and a control module coupled to the filter network and configured to adjust the first and second portions of the input bandwidth in response to signal degradation on the first transducer output.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventor: Temujin Gautama
  • Patent number: 9431177
    Abstract: In one or more embodiments, circuitry is provided for isolation and communication of signals between circuits operating in different voltage domains using capacitive coupling. The capacitive coupling is provided by one or more capacitive structures having a breakdown voltage that is defined by way of the various components and their spacing. The capacitive structures each include three capacitive plates arranged to have two plates located in an upper layer and one plate located in a lower layer. A communication signal can be transmitted via the capacitive coupling created between the lower plate and each of the upper plates, respectively.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventor: Peter Gerard Steeneken
  • Patent number: 9431962
    Abstract: An RF reception system and method uses IF quadrature mixing, in which there is further mixing and channel filtering in the digital domain, to isolate a frequency of interest. A coefficient estimator is used for generating a phase correction coefficient and an amplitude correction coefficient from filtered in-phase and quadrature desired signals and from filtered in-phase and quadrature image signals.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Robert Rutten, Lucien Johannes Breems, Jan van Sinderen
  • Patent number: 9425500
    Abstract: In a method of manufacturing an antenna (11) formed on a substrate (1) an antenna structure (2) is formed on the substrate (1). The antenna structure (2) comprises an area (3) which initially is electrically short-circuited and is designed to be turned into an antenna contact (4a,4b) to be contacted with contacts (12,13) of an integrated circuit (IC). The antenna contact (4a,4b) is formed by mechanically separating the electrically short-circuited 5 area (3) particularly utilizing cutting or stamping means (5).
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: August 23, 2016
    Assignee: NXP B.V.
    Inventors: Christian Zenz, Dietmar Nessmann
  • Patent number: 9425685
    Abstract: A DC-DC converter uses a switched capacitor arrangement. A filter capacitor is connected between one terminal of the capacitor arrangement and a fixed voltage line and a calibration arrangement is used for setting or enabling selection of the capacitance of the filter capacitor. In this way, a capacitance is added to a terminal of the switched capacitor arrangement. The capacitance value can be chosen or adjusted to keep the DC-DC converter current capability within specification limits.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: August 23, 2016
    Assignee: NXP B.V.
    Inventor: Melaine Philip
  • Patent number: 9425841
    Abstract: A system for rejecting a selected harmonic from an input signal is disclosed. The system includes a mixer for creating a signal of new frequency from two input signals of different frequencies. The mixer is coupled to the input signal a frequency generator coupled to the mixer. The frequency generator is configured to generate a signal having a selected duty cycle. The system also includes a controller coupled to a frequency generator.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: August 23, 2016
    Assignee: NXP B.V.
    Inventor: Anton Salfelner