Patents Assigned to NXP
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Dual interface IC card components and method for manufacturing the dual-interface IC card components
Patent number: 9424507Abstract: Dual-interface Integrated Circuit (IC) card components and methods for manufacturing the dual-interface IC card components are described. In an embodiment, a dual-interface IC card component includes a single-sided contact base structure, which includes a substrate with an electrical contact layer. On the single-sided contact base structure, one or more antenna contact leads are attached to the single-sided contact base structure to form a dual-interface contact structure, which is a component of a dual-interface IC card. Other embodiments are also described.Type: GrantFiled: April 1, 2014Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Christian Zenz, Tonny Kamphuis, Johannes Wilhelmus van Rijckevorsel, Bodin Kasemset, David Ceccarelli, Boudewijn van Blokland, Patrick Schoengrundner -
Patent number: 9424896Abstract: Embodiments of a method for operating a computer system are disclosed. In one embodiment, the memory unit has a non-volatile memory array and processing logic and the non-volatile memory array stores initialization data that is used by the processing logic to perform input/output operations of the memory unit. The method involves storing the initialization data in retention registers within the memory unit, wherein the retention registers are separate from the non-volatile memory array and retain data while the memory unit is power gated, using the stored initialization data in the retention registers to initialize the memory unit upon exiting the power gating.Type: GrantFiled: June 22, 2012Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Cas Groot, Maurits Storms
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Patent number: 9425130Abstract: Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.Type: GrantFiled: October 29, 2014Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Chi Ho Leung, Wai Hung William Hor, Soenke Habenicht, Pompeo Umali, WaiKeung Ho, Yee Wai Fung
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Patent number: 9425922Abstract: A receiver, including: a posteriori probability demodulator configured to receive an input digital signal and output demodulated data; a deinterleaver configured to deinterleave the demodulated data; a forward error correction (FEC) decoder configured to error correct the demodulated data; a FEC encoder configured to encode the error corrected demodulated data; an interleaver configured to interleave the FEC encoded data and output the interleaved FEC encoded data to the posteriori probability demodulator; and a symbol compressor/decompressor configured to compress symbol data from the a posteriori demodulator and store the compressed data in a symbol memory and configured to decompress compressed symbol data stored in the symbol memory.Type: GrantFiled: August 15, 2014Date of Patent: August 23, 2016Assignee: NXP B.V.Inventor: Nur Engin
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Patent number: 9426003Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.Type: GrantFiled: December 18, 2013Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci, Ghiath Al-kadi
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Patent number: 9426842Abstract: A distributed radio system comprising a plurality of receivers (1,2,15), each receiver being adapted to receive radio signals and to transmit respective digital signals. The system further comprises a digital communication channel (3) coupled to the plurality of receivers (1,2,15) and adapted to receive the digital signals and to transmit the digital signals. The system comprises a base-band unit (4) coupled to the communication channel (3) and adapted to combine and process the digital signals, the digital signals comprising information available in each receiver (1,2,15) of the plurality of receivers for exploiting a diversity gain.Type: GrantFiled: June 17, 2014Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Arie Geert Cornelis Koppelaar, Alessio Filippi, Artur Tadeusz Burchard, Hong Li
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Patent number: 9425258Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate having an AlGaN layer on a GaN layer. The device also includes first contact and a second contact. The average thickness of the AlGaN layer varies between the first contact and the second contact, for modulating the density of an electron gas in the GaN layer between the first contact and the second contact.Type: GrantFiled: May 4, 2015Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Markus Mueller, Anco Heringa
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Patent number: 9417657Abstract: Aspects of the present disclosure are directed to operating time-based circuitry. As may be implemented in connection with one or more embodiments, an apparatus and or method involved detecting timing characteristics of circuitry operating in respective clock domains, each having a semiconductor body region via which a clock signal path traverses. The respective semiconductor body regions are biased at respective bias levels that are based on the detected timing characteristics of the clock signal path that traverses the semiconductor body region being biased.Type: GrantFiled: October 2, 2014Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Vibhu Sharma, Ajay Kapoor, Ralf Malzahn
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Patent number: 9418249Abstract: Transponder (180) having stored a fixed identification number, which expands said identification number with a random number, encrypts said expanded number with a key, and sends it to a reader (160) on its request. Reader (160), which on request receives an encrypted number from a transponder (180), decrypts a received encrypted number with a key, which was also used by the transponder (180), and extracts a fixed identification number associated with the transponder (180).Type: GrantFiled: May 12, 2009Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Peter Thueringer, Hans De Jong, Bruce Murray, Heike B. Neumann, Paul Hubmer, Susanne Stern
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Patent number: 9419573Abstract: Embodiments of variable gain transimpedance amplifiers are described. In an embodiment, the variable gain transimpedance amplifier may include an amplifier coupled to an adjustable gain feedback network, the adjustable gain feedback network including a selectable set of Resistor-Capacitor (RC) branches, each RC branch having one or more unit RC elements, each unit RC element being comprised of a unit resistor and a unit capacitor arranged in parallel.Type: GrantFiled: June 27, 2014Date of Patent: August 16, 2016Assignee: NXP, B.V.Inventor: Johannes Hubertus Antonius Brekelmans
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Patent number: 9419563Abstract: A two-stage RF amplifier is provided. The first stage is a common-emitter transistor arrangement with a purely reactive degeneration impedance and an output impedance with a reactive component matched in frequency response to the degeneration impedance. The second stage is a buffer amplifier. The first amplifier can be designed for high gain which is flat over frequency by virtue of the reactive degeneration impedance. The first amplifier provides input matching, and the buffer provides output matching, with decoupling between the input and output.Type: GrantFiled: October 30, 2014Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Gian Hoogzaad, Alexander Simin, Hasan Gui
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Patent number: 9419803Abstract: Various exemplary embodiments relate to a method, device, and storage medium including: receiving an NDEF message by an NFC device including a payload and at least one of a digital signature and a reference to a digital signature; stripping data from the payload to produce a stripped payload; verifying the payload using the digital signature and the stripped payload; and conditionally interpreting the payload based on whether the payload is verified. Various embodiments are described wherein: the payload includes a URI including a fragment denoted by a pound character; and stripping data includes stripping the fragment from the URI. Various embodiments are described wherein the payload is verified, the fragment comprises fragment data, and interpreting the payload comprises: transmitting a message requesting a resource identified by the URI, wherein the request omits the fragment data; executing a received script to transmit the fragment data to a device.Type: GrantFiled: December 31, 2013Date of Patent: August 16, 2016Assignee: NXP B.V.Inventor: Philippe Teuwen
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Patent number: 9419592Abstract: A sequential circuit arrangement and method are provided in which a latch input signal and a latched version of the input signal are compared to derive a difference signal. This difference signal can detect when changes in the input are not propagated to the output. A second logic gate arrangement derives an error signal from the product of difference signal and a delayed version of the difference signal. This means that normal operation of the circuit is not detected as an error—only when the latched output fails to follow the input after the normally expected delay is the error signal created. The latch element output or an inverted version of the latch element output is selected in dependence on the error signal.Type: GrantFiled: September 5, 2014Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Vibhu Sharma, Jose de Jesus Pineda De Gyvez
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Patent number: 9419465Abstract: A wireless charger is disclosed. The charger contains a coil with a plurality of taps, thereby facilitating charging according to different frequencies and standards. Detection of the standard appropriate to a particular receiver may be accomplished by modulation of the power carrier or via low power modalities, including NFC or Bluetooth.Type: GrantFiled: January 7, 2013Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Johannes Petrus Maria van Lammeren, Klaas Brink, Aliaksei Vladimirovich Sedzin, Wihelmus H. C. Knubben
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Patent number: 9420409Abstract: A near field communication (NFC) device for providing a communication path between a processing unit of the device and an external device is disclosed. A mobile device is also disclosed. An NFC integrated circuit (IC) is also disclosed. In an embodiment, an NFC IC includes a mobile host processor interface for communicating with a mobile host processor, a wireless interface for communicating with at least one of a contactless card and an external radio frequency (RF) reader, and a single wire protocol (SWP) interface for communicating with a secure element. In an embodiment, the NFC IC is configured to enable communications between the secure element and the mobile host processor by providing a channel for exchange of ISO 7816 commands between the mobile host processor and the secure element, wherein the ISO 7816 commands are carried over the SWP interface and the mobile host processor interface.Type: GrantFiled: June 22, 2015Date of Patent: August 16, 2016Assignee: NXP B.V.Inventor: Giten Kulkarni
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Patent number: 9420170Abstract: A computer-implemented method for assisting in recording video content on a video recording device. The method involves displaying a cross which comprises two orthogonal intersecting lines, displaying an indicator token, and changing the state of at least one of the cross and the indicator token in response to a control signal from the video recording device to provide visual notification to a user of the video recording device.Type: GrantFiled: December 30, 2013Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Vlatko Milosevski, Nicolas Sauvage
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Patent number: 9419515Abstract: A charge pump circuit is disclosed. The charge pump circuit includes a first circuit powered by a first supply voltage and configured to adjust a voltage of an output in response to first and second sets of control signals. The first circuit includes a set of transistors having respective switching voltages. A control circuit powered by a second voltage, less than the first supply voltage, is configured to generate the first and second sets of control signals. A voltage shifting circuit is configured to bias voltages of the first and second sets of control signals relative to the switching voltages.Type: GrantFiled: March 7, 2014Date of Patent: August 16, 2016Assignee: NXP B.V.Inventor: Gerrit Willem den Besten
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Patent number: 9419043Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a directional light sensor. The directional light sensor includes a plurality of photodetectors located on the major surface. The directional light sensor also includes one or more barriers, wherein each barrier is positioned to shade one or more of the photodetectors from light incident upon the integrated circuit from a respective direction. The directional light sensor is operable to determine a direction of light incident upon the integrated circuit by comparing an output signal of at least two of the photodetectors.Type: GrantFiled: May 3, 2013Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Roel Daamen, Nebojsa Nenadovic, Erik Jan Lous
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Patent number: 9419640Abstract: A microphone circuit has a clip detection circuit (30) which detects when an analog to digital converter (ADC, 12) output has reached a threshold. A variable capacitance (34a, 34b, 34c, 34d), which functions as a variable input load associated with the microphone (11), is controlled based on the clip detection circuit output, the feedback is thus based on the ADC output level, and the processing of this signal can be implemented without requiring baseband processing of the signal—it can simply be based on a state of the ADC output.Type: GrantFiled: March 16, 2011Date of Patent: August 16, 2016Assignee: NXP B.V.Inventor: Han M. Schuurmans
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Patent number: 9418919Abstract: Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A second contact is relative to the first contact; the second contact has a split therein to provide first and second portions of the second contact arranged relative to one another to lessen tilting of a soldering condition involving attachment of the chip carrier to a printed circuit board.Type: GrantFiled: January 14, 2011Date of Patent: August 16, 2016Assignee: NXP B.V.Inventors: Roelf Anco Jacob Groenhuis, Markus Björn Erik Noren, Fei-ying Wong, Hei-ming Shiu