Abstract: Embodiments of a semiconductor device, a circuit including a semiconductor device and a driver circuit, and a method for operating a semiconductor device are described. In one embodiment, a semiconductor device includes a substrate, a source region, a drain region, and a drain extension region formed in the substrate, and an insulation layer adjacent to the drain extension region. A gate layer and a field plate are formed one of within and on the insulation layer. The field plate is located adjacent to the drain extension region and is electrically insulated from the gate layer and the source region such that a voltage can be applied to the field plate independent from voltages applied to the gate layer and the source region. Other embodiments are also described.

Abstract: Aspects of the preset disclosure are directed to processing an analog signal transmitted during active portions of a duty cycle. As may be implemented in accordance with one or more embodiments, an apparatus includes a high-speed sampling circuit that samples portions of such an analog signal at a first rate corresponding to the active portion of the duty cycle, and stores the sampled portions of the analog signal. A low-speed analog-to-digital converter accesses the stored sampled portions and converts the sampled portions to a digital form at a second rate that is slower than the first rate.

Abstract: A device and method for encoding bits to symbols for a communication system are described. In one embodiment, a method for encoding bits to symbols for a communication system includes receiving a set of N-bit data to be transmitted, where N is an integer, generating side scrambling values using a polynomial, scrambling the set of N-bit data using the side scrambling values to produce scrambled data, mapping the scrambled data to a particular set of M symbols from a plurality of sets of M symbols, where M is an integer and M is smaller than N, and outputting the particular set of M symbols for transmission over a transmission medium. Other embodiments are also described.

Abstract: A processor for a radio circuit is disclosed. The processor includes a full spectrum receiver and a white space classifier. The full spectrum receiver is configured to receive an analogue radio signal comprising multiple channels within a frequency band and transform the analogue radio signal to a digital radio signal. The full spectrum receiver is also configured to transform the digital radio signal from a time domain signal to a frequency domain signal. The white space classifier is configured to identify an unused channel within the frequency band using the frequency domain signal derived from the analogue radio signal.

Abstract: A portion of a reprogrammable storage device is used to implement permanent data storage. The storage device includes a plurality of electrically erasable memory elements and a controller. The plurality of electrically erasable memory elements are configured to store data. Each memory element is programmable a number of write cycles before reaching a write failure state. The controller is coupled to the plurality of memory elements. The controller includes a receiver and a write engine. The receiver receives an instruction to drive a selected memory element to the write failure state. The write engine repeatedly writes a data value, in a plurality of write operations, to the selected memory element until the write failure state of the selected memory element is established.

Abstract: A power management circuit and a method for operating a power management circuit are described. In one embodiment, a power management circuit includes power switching modules. Power is supplied to each of the power switching modules by at least one of multiple power sources. Each of the power switching modules includes a latch circuit configured to have a definite state at power-up of a corresponding power source and a logic circuit configured to control power supplied from the corresponding power source in response to the definite state of the latch circuit, where the logic circuit includes a cross-coupled circuit. Other embodiments are also described.

Abstract: One example discloses a transmission line interconnect, comprising: an antenna coupling surface; a transmission line coupling surface; and a dielectric molding compound electromagnetically coupling the antenna coupling surface to the transmission line coupling surface. Another example discloses a method of manufacture, for a transmission line interconnect, comprising: forming a dielectric molding compound; defining an antenna coupling surface on the dielectric molding compound; and defining a transmission line coupling surface on the dielectric molding compound whereby millimeter wave frequencies received at the antenna coupling surface are electromagnetically coupled to the transmission line coupling surface.

Abstract: A varactor comprises a substrate having sets of gate units each having parallel gate strips. The gate units are located such that the gate strips of neighboring gate units are oriented transverse to each other. An electrically conducting gate connection layer comprises gate connection units comprising parallel gate connection strips located over the gate strips, and a cathode connection frame around each of the gate connection units. A first electrically conductive anode layer comprises first layer anode strips located parallel to the gate connection strips and connected to alternate gate connection strips, and a first anode connection frame connected to the anode strips. A second electrically conductive anode layer comprises anode strips located parallel to the gate connection strips and connected to opposite alternate gate connection strips, and a second anode connection frame connected to the second layer anode strips.

Abstract: The invention relates to a cluster coupler in a time triggered network for connecting clusters operating on the same protocol. Further, it relates to a triggered network having a plurality of clusters, which are coupled via the cluster coupler. It also relates to a method for communicating between different clusters.

Abstract: A circuit for a dimmer system is disclosed, in which a phase-cut dimmer output signal is converted to a dimming control level signal. The phase-cut dimmer output signal is used to generated a pulse modulated signal indicative of the duty cycle of the phase cut dimmer output signal, and the pulse modulated signal is directly converted to a piece-wise linear dimming control level signal. By directly converting the pulse modulated signal to a piece-wise linear dimming control level signal, no further processing is necessary to produce a dimming signal which closely resembles the ideal logarithmic response of the human eye. A corresponding method for a dimmer system is also disclosed, as is a dimmer system.

Abstract: As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors.

Abstract: A wireless charging apparatus and method utilizing a secure element is disclosed. Illustratively, a receiver containing a secure element securely communicates with a charging pad also equipped with a secure element. The communication can be used to establish the identity of the receiver and facilitate billing for the wireless charging. The charging pad may further communicate in a secure manner with a server to authenticate the identity and other information about the receiver before providing wireless charging. Direct communication between the receiver and server is also contemplated.

Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.

Abstract: Various aspects are directed to the detection of tampering, as may be applicable to retail goods and a variety of implementations. As may be consistent with one or more embodiments, an apparatus includes a loop conductor having first and second ends and contiguous conductive material extending in a loop between the ends. A detection circuit detects continuity of the loop conductor and characteristics of power that is provided to the loop conductor and is indicative of validity of the continuity detection. A communication circuit communicates a wireless signal indicative of the detected electrical characteristics, and an energy circuit powers the loop conductor, detection circuit and communication circuit via received wireless power. Other aspects are further directed to an interrogator that provides the wireless power and evaluates the wireless signal to detect tampering with the conductive loop and validity thereof.

Abstract: A charge pump circuit is disclosed. The charge pump circuit includes a first circuit powered by a first supply voltage and configured to adjust a voltage of an output in response to first and second sets of control signals. The first circuit includes a set of transistors having respective switching voltages. A control circuit powered by a second voltage, less than the first supply voltage, is configured to generate the first and second sets of control signals. A voltage shifting circuit is configured to bias voltages of the first and second sets of control signals relative to the switching voltages.

Abstract: Circuits, apparatus, and methods are disclosed for decision feedback equalization. In one embodiment, an apparatus includes a plurality of time-interleaved slices for processing an input data stream. Each of the slices includes a sampler circuit, a multiplexer, and a latch. In each slice, the multiplexer and the sampler circuit provide sampled output data corresponding to one of a plurality of different versions of the input data stream at times designated uniquely for the slice, according to one or more selection signals. The selection signals are derived from a output of the multiplexer of at least one other of the time-interleaved slices. The latch provides a controlled output in response to the multiplexer and the sampler circuit, as a function of the designated unique times.

Abstract: One example embodiment discloses a GPS receiver having an antenna for receiving GPS signals and a cue generator generating a set of cues; a cue translator having: a cue extractor which selects a subset of the cues generated by the GPS receiver; a vehicle state input receiver receiving information from a vehicle controller indicating an operational state of a vehicle; and a vehicle action generator translating the cues and state into a set of vehicle action signals; and a vehicle controller coupled to the vehicle action generator and translating the vehicle action signals into vehicle commands which control the vehicle hardware or software systems.

Abstract: A switching circuit and a method of operating the same are disclosed. In an embodiment, the switching circuit includes a switching transistor adapted to control operation of the switching circuit according to a control signal applied to the control terminal of the switching transistor, a regulating circuit adapted to generate the control signal, and a detecting circuit adapted to sense a voltage at the control terminal when the switching transistor is in an OFF state and to generate a drive signal according to the sensed voltage. The regulating circuit is adapted to generate the control signal based on the generated drive signal.

Abstract: A method (100) is disclosed of generating an identifier from a semiconductor device (600) comprising a volatile memory (610) having a plurality of memory cells. The method comprises causing (110) the memory cells to assume a plurality of pseudo-random bit values inherent to variations in the microstructure of the memory cells; retrieving (120) the bit values from at least a subset of the plurality of memory cells; and generating the identifier from the retrieved bit values. The method (100) is based on the realization that a substantial amount of the cells of a volatile memory can assume a bit value that is governed by underlying variations in manufacturing process parameters; this for instance occurs at power-up for an SRAM or after a time period without refresh for a DRAM.

Abstract: The invention relates to a capacitive sensor device 100. The capacitive sensor device (100) comprises a substrate (401), a first electrode (101) coupled to the substrate (401, a second electrode (102) coupled to the substrate (401) and a movable element (103). The movable element (103) is capacitively coupled to the first electrode (101), the moveable element (103) and the first electrode (101) representing a first capacitor (104). The movable element (103) is capacitively coupled to the second electrode (102), the moveable element (103) and the second electrode (102) representing a second capacitor (105). The movable element (103) is movable between the first electrode (101) and the second electrode (102) in such a manner, that an electrical impedance between the first electrode (101) and the second electrode (102) is changeable due to a change of a position of the movable element (103). The movable element (103) is decoupled from the substrate (401), in particular to a signal line.