Abstract: Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.

Abstract: A capacitive sensor is configured for collapsed mode, e.g. for measuring sound or pressure, wherein the moveable element is partitioned into smaller sections. The capacitive sensor provides increased signal to noise ratio.

Abstract: An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.

Abstract: A compensation network for a radiofrequency transistor is disclosed. The compensation network comprises first and second bonding bars for coupling to a first terminal of the RF transistor and a compensation capacitor respectively; one or more bond wires coupling the first and second bonding bars together; and a compensation capacitor formed from a first set of conductive elements coupled to the second bonding bar, the first set of conductive elements interdigitating with a second set of conductive elements coupled to a second terminal of the RF transistor.

Abstract: It is described a transponder tagged object, comprising: a conductive structure (103, 105, 403, 405); an insulating region (109, 409) galvanically isolating a first portion (103, 403) of the conductive structure from a second portion (105, 405) of the conductive structure; and a transponder tag (111, 411, 611) comprising a first antenna pad (133, 333) and a second antenna pad (135, 335), wherein the transponder tag is fixed at the object such that the first portion of the conductive structure in particular capacitively couples to the first antenna pad and such that the second portion of the conductive structure in particular capacitively couples to the second antenna pad. Further, a method for manufacturing a transponder tagged object is described.

Abstract: The invention relates to a receiver for a differential data bus with two resistive branches (1, 2, 3; 4, 5, 6), with a differential amplifier with two transistors (9, 10), with a resistor (13), and with a control logic (16) that controls a switch (15) with which a current from a current source (14) is switchable to either side of the resistor (13), which resistor couples the two transistors (9, 10), and with two operational amplifiers (17, 18) which are coupled to the two transistors (9,10) of the differential amplifier with opposite poles, in which receiver the control logic detects from the output signals of the two operational amplifiers (17,18) whether a “0” or a “1” is expected on the bus and which receiver sets the switch (25) accordingly so that a comparison with the received bus signal is made.

Abstract: A network node (1) with a communication unit (2), which is provided for the implementation of a communication protocol for the purpose of communication with other network nodes via a communication medium (5), and with a bus monitor (3), which, mutually independently, each implement an access time schedule contained in a configuration data record, and which each make available, in accordance with the access time schedule, a release signal for a bus driver (4) provided in the network node (1), which evaluates these two signals and, in the event that the two release signals do not coincide, blocks the access of the network node (1) to the communication medium (5).

Abstract: A LED string is divided into segments that each have a bypass-switch and a driver for the bypass-switch. The driver is powered by a supply voltage locally generated from the forward-voltages of the LEDs of the segment.

Abstract: In a receiver, a synchronization circuit (MIX2, OSC, C1, R1) provides a set of oscillator signals (OSI, OSQ) that are synchronized with a carrier of an amplitude-modulated signal. The set of oscillator signals (OSI, OSQ) comprises a quadrature oscillator signal (OSQ), which is substantially 90° phase shifted with respect to the carrier of the amplitude-modulated signal. A quadrature mixer (MIX2) mixes the quadrature oscillator signal (OSQ) with the amplitude-modulated signal so as to obtain a quadrature mixer output signal (MO2a). A phase-error corrector (PEC) adjusts the phase of the oscillator signals in response to a variation in the magnitude of an alternating current component (AC) in the quadrature mixer output signal (MO2a).

Abstract: The invention discloses an integrated circuit (10) for securely storing a codeword. The value of the codeword is dependent on the mobility (?A, ?B, ?C) of at least one transistor (TRA, TRB, TRC) of the integrated circuit. The invention further discloses a reader means (15), a method for determining the value of the codeword from the integrated circuit (10), and a method for altering the value of the codeword.

Abstract: The present invention discloses an integrated circuit (IC) comprising a bond pad (160); a substrate stack carrying a first layer (130) comprising conductive regions (135); and an interconnect layer (140) over the first layer (130) comprising a dielectric material portion (400) between the bond pad (160) and the substrate stack, said portion comprising a plurality of air-filled trenches (345) defining at least one pillar (340) of the dielectric material (400), at least said air-filled trenches (345) being capped by a porous capping layer (440). The interconnect layer (140), which typically is one of the uppermost interconnect layers of the IC, has an improved resilience to pressure exerted on the bond pad (160). The present invention further teaches a method for manufacturing such an IC.

Abstract: The present invention discloses a method of testing a partially assembled multi-die device (1) by providing a carrier (300) comprising a device-level test data input (12) and a device-level test data output (18); placing a first die on the carrier, the first die having a test access port (100c) comprising a primary test data input (142), a secondary test data input (144) and a test data output (152), the test access port being controlled by a test access port controller (110); communicatively coupling the secondary test data input (144) of the first die to the device-level test data input (12), and the test data output (152) of the first die to the device-level test data output (18); providing the first die with configuration information to bring the first die in a state in which the first die accepts test instructions from its secondary test data input (144); testing the first die, said testing including providing the secondary test data input (144) of the first die with test instructions through the device-

Abstract: An automatic gain control circuit is provided for an input signal in the form of a dc reference level and a superposed amplitude modulated ac data signal. A feedforward AGC loop has a low pass filter for deriving the level of attenuation from the attenuated dc reference level. A multiplier value (G) is based on the reciprocal of the level of attenuation (?) and this multiplier enables an output signal to be generated comprising a constant multiple (DG) of the input signal.

Abstract: A circuit (1202) for a resonant converter (1204; 1326), the resonant converter configured to operate in a burst mode of operation, the circuit configured to: receive a signal (1206; 1308) representative of the output of the resonant converter; compare the received signal (1206; 1308) representative of the output of the resonant converter with a reference signal (1208; 1304) in order to provide an error signal (1310); and process the error signal (1310) in order to provide a control signal (1210; 1328), wherein the control signal (1210; 1328) is configured to set the switching frequency of the resonant converter in order to control the output power during the on-time of a burst of the resonant converter.

Abstract: The invention relates to improving the performance of load modulation power amplifiers through the use of coupled transmission line-based power combiners. Exemplary embodiments disclosed include a power amplifier comprising an input connected to first and second amplifier stages and an output stage configured to combine phase shifted amplified outputs from the first and second amplifier stages and to provide an amplified signal at an output of the power amplifier, wherein the output stage comprises coupled first and second transmission lines connected between the output of the first amplifier stage and an output load connection.

Abstract: A method of accessing electronic memory is provided in electronic circuits where it is desired to lower power consumption and hence there is no active oscillator at the time when access to data within the electronic memory is required. The invention provides a method therefore for accessing the electronic memory from a controller, which generates its own clock signals from a data, communications bus electrically coupled to the controller. Advantageously the method allows for memory access to be continued in integrated circuits where a subset of circuits are powered down to reduce power consumption, and one of the subset of circuits is an oscillator.

Abstract: The invention provides a method of processing signals from a satellite positioning system in which a user inputs an approximate indication of current position, and this is used when processing satellite samples to reduce the processing required or increase the reliability. This approach avoids the need for an automated approximate location system (for example using cellular telephony). This represents a change in the way GPS (or other satellite systems) is used. Instead of relying on a GPS system to provide a location in entirely automated manner, the approach is for the user to give an approximate location (which will generally be known), and for the GPS system then to correct this and provide an accurate location. This approach can enable the GPS system to function in areas where it would normally be unreliable.

Abstract: The invention relates to an ESD protection device comprising: a first contact (10) and a second contact (20), and an electrical node (12); a bipolar transistor (6) having a base, an emitter, and a collector, the base and emitter forming a base-emitter junction, the base and collector forming a base-collector junction, the emitter being connected to the first contact (10), the collector being connected to the second contact (20), the base being connect to the electrical node (12); a first diode (1) connected between the electrical node (12) and the first contact (10), the first diode (1) comprising a first junction arranged in the same direction as the base-emitter junction, and—a second diode (2) connected between the electrical node (12) and the second contact (20), in anti-series with the first diode (1) on a path from the first contact (10) to the second contact (20), the second diode (2) comprising a second junction arranged in the same direction as the base-collector junction, wherein the bipolar transis

Abstract: A hybrid device (100) includes both a IEEE-802.11e type WLAN client station (QAP) (102) and a BLUETOOTH piconet unit (104) interconnected such that the BLUETOOTH transmissions are scheduled to occur according to a transmission opportunity (TXOP) (126) that was granted by a quality of service (QoS) access point (QAP) (116) in a basic service set (BSS) (112). Requests for BLUETOOTH traffic are handled by the associated QSTA (102) which generates an add traffic service (ADDTS) (124) to the QAP.

Abstract: The present invention provides a system and a method for transferring data between a Bluetooth device (BTD) and a wireless local area network (WLAN) device which uses packet traffic arbitration (PTA). The method of the present invention includes encoding data using a plurality of control lines between the BTD and WLAN, transmitting the data and acknowledging the data reception using the existing control lines. The method according to the present invention allows BTD and WLAN device to transmit additional scheduling information, schedule the medium access, and reduce the number of collisions between the two devices.