Abstract: A multiple camera imaging system, comprising a first camera image sensor configured to obtain a first image of a scene from a first vantage perspective point; a second camera image sensor configured to obtain a second image of the scene from a second vantage perspective point; and an image signal processor (ISP), configured to process the first image and the second image by performing the following steps: producing a first monotone image from the first image, and a second monotone image from the second image; projecting the first monotone image to produce a first one-dimensional profile; and projecting the second monotone image to produce a second one-dimensional profile; extracting a matching information from the first and second one-dimensional profiles by matching the second one-dimensional profile to the first one dimensional profile; using the matching information produce a first processed two-dimensional image, and a second processed two-dimensional image that is aligned with the first processed two-dim

Abstract: Multiport memory architecture is disclosed herein. An example memory includes an input port, a memory array, and an output port. The input port is coupled to receive data blocks and includes first and second buffers coupled to temporarily store alternate data blocks, and the output port is coupled to provide data blocks from the memory array. The memory array is partitioned into first and second partitions, with the first partition coupled to receive data blocks from the first buffer and the second partition coupled to receive data blocks from the second buffer, and the input port and the memory array are coupled to receive control signals to simultaneously receive a first data block at the first buffer, transfer a second data block from the second buffer to a first address in the second partition, and provide a third data block stored at a third address of the first partition.

Abstract: A spacer wafer for a wafer-level camera, a wafer-level camera including the spacer wafer and a method of manufacturing a spacer wafer include a layer of photoresist being formed over a substrate, the layer of photoresist being exposed to radiation through a mask that defines a spacer geometry for at least one wafer-level camera element. The layer photoresist is developed, such that the layer of photoresist is the spacer wafer for the wafer-level camera.

Abstract: A method includes reading a first analog reference signal from a first storage node in a dual conversion gain pixel, and converting the first analog reference signal to a first digital reference signal using a comparator coupled to the dual conversion gain pixel. The method also includes reading a first analog image signal from the first storage node, and converting the first analog image signal to a first digital image signal using the comparator. A second analog image signal may be read from the first storage node and a second storage node in the dual conversion gain pixel, and the second analog image signal may be converted to a second digital image signal. A second analog reference signal may be read from the first storage node and the second storage node, and the second analog reference signal may be converted to a second digital reference signal using the comparator.

Abstract: Apparatuses and Methods of double talk detection for echo suppression in the power domain are disclosed herein. An example method includes comparing a power echo estimate signal to a microphone power signal, determining if the power echo estimate signal is greater than or less than the microphone power signal by a first threshold, based on the power echo estimate signal being greater than or less than the microphone power signal by the first threshold, disabling adaptation of filter coefficients of an adaptive filter of an echo suppressor, and based on the power echo estimate signal not being greater than or less than the microphone power signal by the first threshold, enabling adaptation of filter coefficients of an adaptive filter of an echo suppressor.

Abstract: A wide-angle lens system comprises a first lens having a concave aspheric surface and a planar surface, a second lens having a convex aspheric surface and a planar surface, a substrate, wherein the planar surface of the first lens is adjacent to a first side of the substrate and the planar surface of the second lens is adjacent to a second side of the substrate, a third lens behind the second lens having a concave aspheric surface and a planar surface, and a stop disposed between the first lens and the substrate. The planar surface of the third lens is secured to an outermost surface of an image sensor.

Abstract: A liquid crystal on silicon (LCOS) panel comprises: a silicon substrate having silicon circuit within the silicon substrate; a plurality of metal electrodes disposed on the silicon substrate, where the plurality of metal electrodes are periodically formed on the silicon substrate; a dielectric material disposed in and filling gaps between adjacent metal electrodes; and an oxide layer disposed on the plurality of metal electrodes and the dielectric material in the gaps between adjacent metal electrodes; where the refractive index of the dielectric material is higher than the refractive index of the oxide layer.

Abstract: A structure light module comprises: a VCSEL substrate comprising a VCSEL array comprising a plurality of individual VCSELs; a first spacer disposed on the VCSEL substrate; a wafer level lens comprising a glass substrate and at least a replicated lens on a first surface of the glass substrate disposed on the first spacer; a second spacer disposes on the wafer level lens; a DOE disposed on the second spacer, where a structure light is projected from the DOE on a target surface for 3D imaging.

Abstract: A pixel cell includes a second photodiode laterally surrounding a first photodiode in semiconductor material. The first and second photodiodes are adapted to photogenerate image charge in response to incident light. A floating diffusion is disposed in the semiconductor material proximate to an outer perimeter of the second photodiode. A first transfer gate is disposed proximate to the semiconductor material over a first channel region between the first and second photodiodes. The first transfer gate is coupled to transfer the image charge from the first photodiode to the second photodiode. A second transfer gate is disposed proximate to the semiconductor material over a second channel region between the second photodiode and the floating diffusion. The second transfer gate is coupled to transfer the image charge from the second photodiode to the floating diffusion.

Abstract: A speaker system featuring automatic volume adjustment to avoid excess distortion includes a first converter for converting an input signal to an input frequency domain signal; and a second converter for converting a microphone signal to an environmental frequency domain signal. A distortion analyzer receives output of the first and second converter and determines at least one distortion level and provides at least one gain adjustment signal used to control a corrector to adjust gain of a speaker driver. The system performs a method of reducing distortion by automatically adjusting volume in each of a plurality of frequency bands including converting an input signal to a frequency domain input signal; converting a microphone signal to an environmental frequency domain signal; determining a distortion level; generating a gain adjustment signal; and adjusting gain of a signal provided to a speaker driver.

Abstract: A readout circuit for use with an image sensor includes a comparator coupled to compare a ramp signal from a ramp generator with an output signal from a pixel of a pixel array. A counter is coupled to the comparator to count until the comparator detects that a ramp signal value has reached an output signal value. The counter includes K cascade-coupled dynamic flip-flop circuits to generate the K least significant bits (LSBs) of the N-bit output of the counter. The counter also includes N-K cascade-coupled static flip-flop circuits to generate the N-K most significant bits (MSBs) of the N-bit output of the counter. A latch is coupled to the counter to store a count value generated by the counter after the ramp signal value has reached the output signal value.

Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.

Abstract: An alignment layer for a liquid crystal on silicon (LCOS) display includes a nano-particle layer. In a particular embodiment the nano-particle layer includes a lower nano-layer and an upper nano-layer, each formed onto oxide layers of the LCOS display. In a more particular embodiment, the lower nano-layer and the upper nano-layer are offset printed onto the oxide layers.

Abstract: A hybrid bonded image sensor has a photodiode die with macrocells having at least one photodiode and a bond contact; a supporting circuitry die with multiple supercells, each supercell having at least one macrocell unit bonded to the bond contact of a macrocell of the photodiode die. Each macrocell unit has a reset transistor adapted to reset photodiodes of the photodiode die macrocell. Each supercell has a differential amplifier configurable to receive a noninverting input from a photodiode and an inverting input, the differential amplifier providing an output, each differential amplifier has an amplifier reset transistor coupled to the differential amplifier output and the inverting input; a first capacitor coupled between the differential amplifier output and the inverting input, and a second capacitor coupled between the inverting input and a signal ground. The first and second capacitor of embodiments has controllable capacitance to adjust gain.

Abstract: An image sensor package, comprising a silicon substrate; an image sensor pixel array that is formed on the silicon substrate; a peripheral circuit region that is formed around the image sensor pixel array on the silicon substrate; a redistribution layer (RDL) that is electrically coupled to the peripheral circuit region; at least one solder ball that is electrically coupled to the RDL; and a cover glass that is coupled to the RDL. No part of the RDL is located directly above or below the image sensor pixel array. No part of the at least one solder ball is located directly above or below the silicon substrate. A dark material layer is implemented to prevent an edge flare effect of the image sensor pixel array.

Abstract: A wafer-level liquid-crystal-on-silicon (LCOS) projection assembly includes a LCOS display for spatially modulating light incident on the LCOS display and a polarizing beam-separating (PBS) layer for directing light to and from the LCOS display. A method for fabricating a LCOS projection system includes disposing a PBS wafer above an active-matrix wafer. The active-matrix wafer includes a plurality of active matrices for addressing liquid crystal display pixels. The method, further includes disposing a lens wafer above the PBS wafer. The lens wafer includes a plurality of lenses. Additionally, a method for fabricating a wafer-level polarizing beam includes bonding a PBS wafer and at least one other wafer to form a stacked wafer. The PBS wafer includes a PBS layer that contains a plurality of PBS film bands.

Abstract: An avalanche photodiode has a first diffused region of a first diffusion type overlying at least in part a second diffused region of a second diffusion type; and a first minority carrier sink region disposed within the first diffused region, the first minority carrier sink region of the second diffusion type and electrically connected to the first diffused region. In particular embodiments, the first diffusion type is N-type and the second diffusion type is P-type, and the device is biased so that a depletion zone having avalanche multiplication exists between the first and second diffused regions.

Abstract: An integrated oscillator has an R-S flipflop; a first and second capacitor; a current source transistor; first and second current-steering transistors, each having a source coupled to the current source transistor, with drains coupled to the first and second capacitor respectively. The first current-steering transistor has gate coupled to a first output of the R-S flipflop, and the second current-steering transistor has gate coupled to a second output of the R-S flipflop. The oscillator has a first sense inverter having input from the first capacitor and powered by a feedback circuit adapted to sense voltages on the first and second capacitor; and a second sense inverter having input from the second capacitor and powered by the feedback circuit. The R-S flipflop has a first input coupled to an output of the first sense inverter and a second input coupled to an output of the second sense inverter.

Abstract: An imaging system for capturing an image of an object comprises a first lens, a dichroic beam splitter, which transmits light of a color band and reflects light of all colors outside the color band, a first image sensor for capturing an image formed by the transmitted light in the color band, a second image sensor for capturing an image formed by the reflected light outside the color band. The first image sensor is a monochrome image sensor and the second image sensor is a color image sensor having a color filter array disposed on pixels of the second image sensor. The image captured by the first image sensor and the image captured by the second image sensor are combined to form a single color image.

Abstract: An imaging system having four image sensors comprises a first dichroic filter, a second dichroic filter, and a third dichroic filter. The first dichroic filter reflects light having a first wavelength band and a second wavelength band toward a second dichroic filter, and transmits light having a third wavelength band and a fourth wavelength band toward the third dichroic filter. The second dichroic filter reflects light having the first wavelength band toward the first image sensor, and transmits light having the second wavelength band toward the second image sensor. The third dichroic filter reflects light having the third wavelength band toward the third image sensor, and transmits light having the fourth wavelength band toward the fourth image sensor. The first dichroic filter, the second dichroic filter, and the third dichroic filter are included in an integrated part.