Abstract: A trenched device wafer includes a device substrate layer having a top surface; a plurality of devices in the device substrate layer, and a trench in the top surface. The trench extends into the device substrate layer, and is located between a pair of adjacent devices of the plurality of devices. A method for forming a device die from a device wafer includes forming a trench in a top surface of the device wafer between two adjacent devices of the device wafer. The trench has a bottom surface located (a) at a first depth beneath the top surface and (b) at a first height above a wafer bottom surface. The method also includes, after forming the trench, decreasing a thickness of the device wafer, between the two adjacent devices, to a thickness less than the first height.

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges accumulated in the photodiode to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a SF gate terminal and provide an amplified signal to a source follower source terminal. A row select transistor is coupled to receive the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor controlled by a bitline enable voltage is coupled to link between the bitline and a bitline source node. The bitline is coupled to an idle voltage generator, a blacksun voltage generator, and a clamp voltage generator.

Abstract: Trenched-bonding-dam devices and corresponding methods of manufacture are provided. A trenched-bonding-dam device includes a bonding dam structure positioned upon a top surface of a substrate. The bonding dam structure has a bottom surface attached to a top surface of the substrate, an inner dam surrounded by an outer dam, and a trench between the inner and outer dams. The device may further include an optics system including a lens and an adhesive positioned within a bonding region between a bottom surface of the optics system and a top surface of at least one of the inner and outer dams. The trench may be dimensioned to receive a portion of the excess adhesive flowing laterally out of the bonding region during bonding of the substrate to the optics system, laterally confining the excess adhesive and reducing lateral bleeding of the adhesive.

Abstract: An imaging system includes a primary imager and plurality of 3A-control sensors. The primary imager has a first field of view and includes a primary image sensor and a primary imaging lens with a first optical axis. The primary image sensor has a primary pixel array and control circuitry communicatively coupled thereto. The plurality of 3A-control sensors includes at least one of a peripheral imager and a 3A-control sensor. The peripheral imager, if included, has a second field of view including (i) at least part of the first field of view and (ii) a phase-difference auto-focus (PDAF) sensor and a peripheral imaging lens, the PDAF sensor being separate from the primary image sensor. The 3A-control sensor, if included, is separate from the primary pixel array and communicatively connected to the control circuitry to provide one of auto-white balance and exposure control for the primary pixel array.

Abstract: A photon detection device includes a single photon avalanche diode (SPAD) disposed in a semiconductor layer. A guard ring structure is disposed in the semiconductor layer surrounding the SPAD to isolate the SPAD. A well region is disposed in the semiconductor layer surrounding the guard ring structure and disposed along an outside perimeter of the photon detection device. A contact region is disposed in the well region only in a corner region of the outside perimeter such that there is no contact region disposed along side regions of the outside perimeter. A distance between an inside edge of the guard ring structure and the contact region in the corner region of the outside perimeter is greater than a distance between the inside edge of the guard ring structure and the side regions of the outside perimeter such that an electric field distribution is uniform around the photon detection device.

Abstract: A novel multi-display projection box includes a housing that is short and wide, a set of display panels, a set of projectors, and a controller. In a particular embodiment the set of display panels includes two display panels, each coupled to opposite sides of the housing. The set of projectors includes two projectors placed adjacent opposite side walls of the housing. One of the projectors projects a first image onto one of the display panels and the other projector projects a second image onto the other display panel. The first and second image can include product information corresponding to goods placed atop the projection box in a retail store.

Abstract: An imaging system and method for generating a three-dimensional color image include an opening for allowing light from an object to enter the imaging system. Each sensor element in an array of sensor elements receives a portion of the light and generates a signal indicative of an intensity of the received portion of the light. Light from an optical element impinges on a filter comprising a plurality of filter regions, each filter region passes a predetermined band of wavelengths of the light and is associated with and disposed in alignment with one of the sensor elements such that light passing through each filter region impinges on the sensor associated and in alignment with the filter element. At least one of the filter regions is constructed to pass a visible color band, and at least one other of the filter regions is constructed to pass an infrared band.

Abstract: An image sensor includes a semiconductor material having a front side and a back side opposite the front side. The image sensor also includes a shallow trench isolation (STI) structure, an interlayer dielectric, an intermetal dielectric, and a contact area. The STI structure extends from the front side of the semiconductor material into the semiconductor material. The interlayer dielectric is disposed between the front side of the semiconductor material and the intermetal dielectric. The contact area is disposed proximate to a lateral edge of the semiconductor material. The contact area includes a metal interconnect disposed within the intermetal dielectric and a plurality of contact plugs at least partially disposed within the interlayer dielectric. The contact area also includes a contact pad. The plurality of contact plugs is coupled between the contact pad and the metal interconnect.

Abstract: A method of image sensor package fabrication includes providing an image sensor, including a pixel array disposed in a semiconductor material, and a transparent shield adhered to the semiconductor material. The pixel array is disposed between the semiconductor material and the transparent shield. The method further includes removing portions of the transparent shield to form recessed regions in the transparent shield, where lateral bounds of the transparent shield extend beyond lateral bounds of the pixel array, and wherein the recessed regions are disposed in portions of the transparent shield that extend beyond the lateral bounds of the pixel array. The recessed regions are filled with a light blocking layer.

Abstract: An imaging system includes a pixel array of pixel cells with each one of the pixel cells including a photodiode disposed in a semiconductor material, a global shutter gate transistor, disposed in the semiconductor material and coupled to the photodiode, a storage transistor disposed in the semiconductor material, an optical isolation structure disposed in the semiconductor material to isolate a sidewall of the storage transistor from stray light and stray charge. The optical isolation structure also includes a deep trench isolation structure that is filled with tungsten and a P+ passivation formed over an interior sidewall of the deep trench optical isolation structure. Each one of the pixel cells also include control circuitry coupled to the pixel array to control operation of the pixel array and readout circuitry coupled to the pixel array to readout image data from the plurality of pixels.

Abstract: A photon detection device includes a single photon avalanche diode (SPAD) including a multiplication junction defined at an interface between n doped and p doped layers of the SPAD in a first region of a semiconductor layer. A vertical gate structure surrounds the SPAD in the semiconductor layer to isolate the SPAD in the first region from a second region of the semiconductor layer on an opposite side of the vertical gate structure. The SPAD laterally extends within the first region of semiconductor layer to the vertical gate structure. An inversion layer is generated in the SPAD around a perimeter of the SPAD proximate to the vertical gate structure in response to a gate bias voltage coupled to the vertical gate structure. The inversion layer isolates the SPAD from the second region of the semiconductor layer on the opposite side of the vertical gate structure.

Abstract: Apparatuses and methods for a skimming photodiode with high dynamic range (HDR) and reduced Light Emitting Diode (LED) flicker in imaging system are disclosed herein. A voltage generator provides a transfer gate voltage to a transfer transistor. The transfer gate voltage is a voltage selected one of a transfer-on, a transfer-off, and a skimming voltage. The transfer transistor transfers charges generated on a Complementary Metal-Oxide-Semiconductor (CMOS) photodiode (PD) to a floating diffusion (FD). The voltage on transfer gate controls the amount of the charges that can be transferred from the PD to the FD. A reset transistor precharges the PD and FD to an AVDD. A first enable transistor controls the amount of charges transferred from the FD to a first capacitor. A second enable transistor controls the amount of charges transferred from the FD to a second capacitor. The first and second enable transistors receive their individual periodical control pulses once activated.

Abstract: A CMOS photodiode device for use in a dual-sensitivity imaging pixel contains at least two areas of differential doping. Transistors are provided in electrical contact with these areas to govern operation of signals emanating from the photodiode on two channels, each associated with a different sensitivity to light. A plurality of such photodiodes may be incorporate into a shared arrangement forming a single pixel, in order to enhance the signals.

Abstract: An image sensor includes a photodiode disposed in a first semiconductor material to absorb photons incident on the image sensor and generate image charge. A floating diffusion is disposed in the first semiconductor material and positioned to receive the image charge from the photodiode, and a transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge out of the photodiode into floating diffusion in response to a transfer signal. A source follower transistor with a gate terminal is coupled to the floating diffusion to output an amplified signal of the image charge in the floating diffusion. The gate terminal includes a second semiconductor material in contact with the floating diffusion, and a gate oxide is partially disposed between the second semiconductor material and the first semiconductor material. The second semiconductor material extends beyond the lateral bounds of the floating diffusion.

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a plurality of isolation structures disposed between individual photodiodes in the plurality of photodiodes. The plurality of isolation structures electrically isolate individual photodiodes in the plurality of photodiodes. A plurality of transistors are disposed proximate to the plurality of photodiodes and include a reset transistor, an amplifier transistor, and a row select transistor. An active region and a gate electrode of at least one transistor in the plurality of transistors are vertically aligned with an isolation structure in the plurality of isolation structures.

Abstract: A backside-illuminated color image sensor with crosstalk-suppressing color filter array includes (a) a silicon layer including an array of photodiodes and (b) a color filter layer on the light-receiving surface of the silicon layer, wherein the color filter layer includes (i) an array of color filters cooperating with the array of photodiodes to form a respective array of color pixels and (ii) a light barrier grid disposed between the color filters to suppress transmission of light between adjacent ones of the color filters. The light barrier is spatially non-uniform across the color filter layer to account for variation of chief ray angle across the array of color filters.

Abstract: A bezel for die level packaging of a camera module may include (a) a recessed lip surrounding an aperture of the bezel and facing in a first direction, wherein the recessed lip is configured for seating thereon an image sensor, and (b) a planar rim surrounding the aperture and facing in a second direction opposite the first direction, wherein the planar rim is configured for bonding thereto a wafer-level lens unit implementing a wafer-level lens for delivering light to the image sensor through the aperture, wherein transverse extent of the planar rim across the aperture in a dimension orthogonal to the first direction exceeds corresponding transverse extent of the recessed lip.

Abstract: A method of processing an image sensor system, comprising steps of placing a first cover member on top of an image sensor; coating the image sensor and the first cover member with a dark coating agent; removing the first cover member from the image sensor; placing a second cover member on top of the image sensor; affixing the image sensor on to a permanent mount to form an electrical coupling between the image sensor and the permanent mount; removing the second cover member from the image sensor; wherein the first cover member completely covers a top portion of the image sensor; and wherein the second cover member includes an internal rib configured to form a contact seal with the image sensor.

Abstract: An image sensor includes an array of split dual photodiode (DPD) pairs. First groupings of the array of split DPD pairs consist entirely of either first-dimension split DPD pairs or entirely of second-dimension split DPD pairs. Each first grouping of the array of split DPD pairs consisting of the first-dimension split DPD pairs is adjacent to an other first grouping of the array of split DPD pairs consisting of the second-dimension split DPD pairs. The first-dimension is orthogonal to the second-dimension. A plurality of floating diffusion (FD) regions is arranged in each first grouping of the split DPD pairs. Each one of a plurality of transfer transistors is coupled to a respective photodiode of a respective split DPD pair, and is coupled between the respective photodiode and a respective one of the plurality of FD regions.

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. The accumulate image charges are transferred to a floating diffusion, amplified, row selected and the amplified row selected signal is output to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. A current source is coupled to connect between the bitline source node and a ground. The current source generator sinks adjustable current from the bitline source node to the ground through a cascode transistor and a bias transistor. A cascode hold capacitor is coupled between the cascode control voltage and the ground. A bias hold capacitor is coupled between the bias control voltage and the ground. A bias boost driver is coupled to control the cascode control voltage and the bias control voltage.