Abstract: A liquid crystal on silicon (LCOS) panel comprises: a silicon substrate having silicon circuit within the silicon substrate; a plurality of metal electrodes disposed on the silicon substrate, where the plurality of metal electrodes are periodically formed on the silicon substrate; a dielectric material disposed in and filling gaps between adjacent metal electrodes; and an oxide layer disposed on the plurality of metal electrodes and the dielectric material in the gaps between adjacent metal electrodes; where the refractive index of the dielectric material is higher than the refractive index of the oxide layer.

Abstract: An apparatus configured to measure electromagnetic radiation coupled from an image sensor integrated circuit (IC) to a nearby cell phone antenna has an image sensor PCB with the image sensor IC on a first side and image sensor decoupling capacitors disposed on a second side, the image sensor PCB disposed within a shielding box. The apparatus also has an image processor PCB with an image processor IC on a first side and at least one image processor decoupling capacitors, the image processor IC electrically coupled to the image sensor IC. The image processor IC is located outside the shielding box, and the at least one image processor decoupling capacitor is within the shielding box. In embodiments, the decoupling capacitors are shielded with separate, additional, metal covers.

Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.

Abstract: An imaging system comprises an image pixel array, a dark pixel array, and a controller. The image pixel array includes a plurality of pixel clusters adapted to generate image signals. The dark pixel array is adapted to generate one or more black reference signals corresponding to a global black level value of the imaging system. The controller includes logic that when executed by the controller causes the system to perform operations including determining local black level values for each of the pixel clusters and correcting a first image signal included in the image signals based, at least in part, on the global black level and a first local black level value included in the local black level values.

Abstract: An endoscope comprises a FPC (flexible printed circuit) having a first side and a second side, where the FPC comprises a first head part, a body part, and tail part. At least one solder pad is on the first side of the first head part, and at least one solder pad is on the first side of the body part. The endoscope further comprises a camera module mounted on the first side of the body part and a first LED (light emitting diode). A first side of the first LED is mounted on the first side of the first head part and a second side of the first LED is mounted on a first side of the camera module, while the first head part is bent. The second side of the body part is mounted on an end of a flexible fiber, and the tail part of the FPC is bent to mount on the flexible fiber.

Abstract: A pixel cell includes a photodiode disposed in a semiconductor material layer to accumulate image charge photogenerated in the photodiode in response to incident light. A storage transistor is coupled to the photodiode to store the image charge photogenerated in the photodiode. The storage transistor includes a storage gate disposed proximate a first surface of the semiconductor material layer. The storage gate includes a pair of vertical transfer gate (VTG) portions. Each one of the pair of VTG portions extends a first distance into the semiconductor material layer through the first surface of the semiconductor material layer. A storage node is disposed below the first surface of the semiconductor material layer and between the pair of VTG portions of the storage gate to store the image charge transferred from the photodiode in response to a storage signal.

Abstract: A smart camera system including an image sensor and a controller is presented. The image sensor generates video data that is initially at a bit rate of a pre-determined bit rate value. The controller is coupled to the image sensor to transmit the video data. The controller includes a processor operating at a clock rate of a first frequency. The processor is coupled to memory, the memory including instructions, which when executed by the controller causes the smart camera system to perform operations. The operations include dynamically scaling the clock rate of the processor to an adjustment frequency in response to receiving an input to change the bit rate of the video data. The adjustment frequency for the clock rate of the processor based, at least in part, on the input bit rate value. The operations further include changing the bit rate to the input bit rate value.

Abstract: A reflective semiconductor device includes integrated circuitry disposed in a semiconductor layer. A first plurality of mirrors is formed in a mirror layer over the semiconductor layer, and each of the first plurality of mirrors is spaced apart from one another by at least a uniform width. A thin dielectric film layer covers sidewalls of the first plurality of mirrors and the semiconductor layer in the regions between the spaced apart first plurality of mirrors. A second plurality of mirrors are formed in the mirror layer between the thin dielectric film layer covered sidewalls of the first plurality of mirrors and over the thin dielectric film layer covering the semiconductor layer. Each one of the first and second plurality of mirrors has the uniform width, and is coupled to the integrated circuitry disposed in the semiconductor layer.

Abstract: A novel liquid crystal on silicon (LCoS) device includes an array of pixel electrodes having a highly reflective material formed thereon. In a particular embodiment, the pixel electrodes are aluminum and have silver pixel mirrors electroplated thereon. In a more particular embodiment, the LCoS device includes auxiliary circuitry facilitating the electroplating of the pixel mirrors.

Abstract: A chip-scale packaging process for wafer-level camera manufacture includes aligning an optics component wafer with an interposer wafer having a photoresist pattern that forms a plurality of transparent regions, bonding the aligned optics component wafer to the interposer wafer, and dicing the bonded optics component wafer and interposer wafer such that each optics component with interposer has a transparent region. The process further includes dicing an image sensor wafer, aligning the pixel array of each image sensor with the transparent region of a respective optics component with interposer, and bonding each image sensor to its respective optics component with interposer. Each interposer provides alignment between its respective optics component center and its respective pixel array center of the image sensor based on the respective transparent region. The interposer further provides a back focal length for focusing light from the optics component onto a top surface of the pixel array.

Abstract: An image sensor has multiple blocks each with multiple pixels; each block uses a separate analog-to-digital converter (ADC). The ADCs feed digitized images into an image DRAM, and the image DRAM feeds digitized images to an alignment buffer in turn providing images to an image processor. The ADCs feed digitized image data into the image DRAM in hyperlong words, using staggered, overlapping, word lines to write each hyperlong word. A method of imaging includes exposing a photosensor array to light, reading pixels of the array in sequence within each block of pixels, one pixel in each block simultaneously; and digitizing pixels in separate ADCs for each block. Digitized pixels are written to image DRAM as hyperlong words with one pixel from each block in parallel using staggered, overlapping, word lines. Pixels are read from the image DRAM into an alignment buffer and thence to the image processor.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern formed using laser marking on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the at least one code pattern is visible from a backside of the chip, the at least one code pattern represents a binary number having four bits; and the binary number represents a decimal number to represent a tracing number of the chip.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern of a first group and at least one code pattern of a second group formed on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the code patterns are visible from a backside of the chip, and wherein a tracing number of the chip is represented by the code patterns.

Abstract: A flexible printed circuit board (PCB) includes a flexible first layer proximate to a flexible second layer. Conductive traces are arranged in the flexible first layer and coupled to a first circuit block at a first end of the flexible PCB and coupled to a second circuit block at a second end of the flexible PCB such that the first circuit block is coupled to the second circuit block through the conductive traces. Companion traces re arranged in the flexible second layer to provide a reference plane coupled to the first and second circuit blocks. The companion traces are arranged in the flexible second layer to be replicas of the conductive traces such that each one of the conductive traces is proximate to and aligned with a corresponding one of the companion traces along an entire length between the first and second circuit blocks.

Abstract: A pixel array for use in a high dynamic range image sensor includes a plurality of pixels arranged in a plurality of rows and columns in the pixel array. Each one of the pixels includes a linear subpixel and a log subpixel disposed in a semiconductor material. The linear subpixel is coupled to generate a linear output signal having a linear response, and the log subpixel is coupled to generate a log output signal having a logarithmic response in response to the incident light. A bitline is coupled to the linear subpixel and to the log subpixel to receive the linear output signal and the log output signal. The bitline is one of a plurality of bitlines coupled to the plurality of pixels. Each one of the plurality of bitlines is coupled to a corresponding grouping of the plurality of pixels.

Abstract: A near-eye display device includes (a) a display unit for displaying a display image, (b) a viewing unit for presenting the display image to the eye and transmitting ambient light from an ambient scene toward the eye, and (c) an eye imaging unit including (i) an illumination module for generating at least three infrared light beams propagating along at least three different, non-coplanar directions, respectively, (ii) a first beamsplitter interface, disposed between the display unit and the viewing unit, for merging at least a portion of each of the infrared light beams with visible display light to direct each portion toward the eye via the viewing unit, and (iii) a camera for imaging, via the viewing unit and the first beamsplitter interface, pupil of the eye and reflections of the infrared light beams incident on the eye, to form one or more images indicative of gaze direction of the eye.

Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.

Abstract: A method for manufacturing a stepped spacer wafer for a wafer-level camera includes a step of measuring a plurality of focal lengths f1,2, . . . , N of a respective one of a plurality of lenses L1,2, . . . , N of a lens wafer. The method also includes a step of fabricating a stepped spacer wafer including (i) a plurality of apertures A1,2, . . . , N therethrough, and (ii) a plurality of thicknesses T1,2, . . . , N defining a respective thickness of the stepped spacer wafer at least partially surrounding a respective one of the plurality of apertures A1,2, . . . , N. Each of the plurality of thicknesses T1,2, . . . , N is equal to a difference between (a) a respective one of the plurality of focal lengths f1,2, . . . , N, and (b) a uniform thickness that is the same for each of the plurality of thicknesses.

Abstract: A time of flight camera includes a light source, a first pixel, a time-to-digital converting, and a controller. The light source is configured to emit light towards an object to be reflected back to the time of flight camera as image light. The first pixel includes a photodetector to detect the image light and to convert the image light into an electric signal. The time-to-digital converter is configured to generate timing signals representative of when the light source emits the light and when the photodetector detects the image light. The controller is coupled to the light source, the first pixel, and the time-to-digital converter. The controller includes logic that when executed causes the time of flight camera to perform operations. The operations include determining a detection window for a round-trip time of the image light based, at least in part, on the timing signals and first pulses of the light.

Abstract: A system for capturing a high dynamic range (HDR) image comprises an image sensor comprising a split pixel including a first pixel having higher effective gain and a second pixel having lower effective gain. The second pixels exposed with a capture window capture at least a pulse emitted by a light emitting diode (LED) controlled by a pulse width modulation. A first HDR image is produced by a combination including an image produced by the second pixels, and images produced by multiple exposures of the first pixels. A weight map of LED flicker correction is generated from the difference of the image produced by second pixels and the images produced by the first pixels, and the flicker areas in the first HDR image are corrected with the weight map and the image from the second pixels.