Abstract: A time-of-flight (TOF) sensor includes a light source, a plurality of avalanche photodiodes, and a plurality of pulse generators. Control circuitry is coupled to the light source, the plurality of avalanche photodiodes, and the plurality of pulse generators, and the control circuitry includes logic that when executed by the control circuitry causes the time-of-flight sensor to perform operations. The operations include emitting the light from the light source, and receiving the light reflected from an object with the plurality of avalanche photodiodes. A plurality of pulses is output from the individual pulse generators corresponding to the individual avalanche photodiodes that received the light, and a timing signal is output when the plurality of pulses overlap temporally. A time is calculated when a first avalanche photodiode in the plurality of avalanche photodiodes received the light.

Abstract: Comparison circuitry includes a comparator having a first input configured to receive a pixel signal. A switch is coupled to a second input of the comparator, a reference generator, and a ramp generator. A first capacitance is coupled to the switch. The switch is configured to couple the first capacitance to the reference generator to charge the first capacitance to a reference voltage from the reference generator prior to a ramp event in a ramp signal, and to couple the first capacitance to the ramp signal from the ramp generator at an onset of the ramp event in the ramp signal. The first capacitance is coupled to provide positive current injection into the ramp signal at the onset of the ramp event in the ramp signal to reduce a ramp settling time in the ramp signal, which is provided to the second input of the comparator.

Abstract: Methods and systems for streaming low-delay, high-definition video with partially reliable transmission are disclosed herein. An example method includes determining a per-frame maximum retransmission allocation for a plurality of video packets based at least in part on a frame priority, where the plurality of video packets form at least a portion of the frame, determining a retransmission timeout for each video packet of the plurality of video packets based at least in part on a round trip time, and transmitting the plurality of video packets under traffic rate control.

Abstract: A method of forming an electrical connection in a liquid crystal on silicon (LCOS) device, comprising: providing a silicon substrate including a first surface and a second surface, wherein the silicon substrate includes an conductive pad at the first surface; providing a cover glass panel that includes a cover glass, a transparent electrode layer formed upon the cover glass, and a first sealing material layer formed upon the transparent electrode layer; forming a second sealing material layer upon the first surface of the silicon substrate, wherein the second sealing material layer covers the conductive pad; forming a display layer, comprising a liquid crystal portion, a first seal portion, and a second seal portion, upon the second sealing material layer; wherein the first seal portion and the second seal portion are situated to form a space between them; and wherein the space is situated on top of the conductive pad; placing the cover glass panel upon the display layer, wherein the first sealing material la

Abstract: A liquid crystal display includes a display area and a border area at least partially surrounding the display area, where the display area displays images for viewing and the border area displays display-protection images, which are used to control ion migration in the liquid crystal layer. In a more particular embodiment, the border area displays a series of checkerboard pattern(s), where the checkerboard patterns can alternate between initial and inverted values. The display-protection images protect the liquid crystal display from migrating ions accumulating in particular regions of the pixel array and causing permanent defects in the display area. A liquid crystal display that includes a liquid crystal alignment layer having a plurality of liquid crystal alignment directions is also disclosed. The customized liquid crystal alignment director(s) over the border area promote ion migration away from the display area.

Abstract: An image sensor includes a multi-pixel detector. The multi-pixel detector includes a first pixel formed in a substrate and having a first photodiode region, a second pixel formed in the substrate adjacent to the first pixel and having a second photodiode region, and a microlens above both the first pixel and the second pixel. The microlens includes (a) in a first cross-sectional plane perpendicular to a top surface of the substrate and including both the first and the second photodiode regions, a first height profile having N1 local maxima, and (b) in a second cross-sectional plane perpendicular to the first cross-sectional plane and the top surface and including only one of the first and the second photodiode regions, a second height profile having N2>N1 local maxima.

Abstract: A camera module comprises an image sensor and a lens module disposed on the image sensor. The lens module comprises a top glass structure at top of the lens module. The top glass structure includes a first glass substrate, a second glass substrate, and a baffle disposed immediately between the first and the second glass substrates. The top glass structure is an outermost layer of the camera module. The lens module also comprises a bottom glass substrate at bottom of the lens module. The bottom glass substrate is disposed on the image sensor.

Abstract: An image sensor comprises a first photodiode and a second photodiode having a smaller full-well capacitance than the first photodiode, wherein the second photodiode is adjacent to the first photodiode; a first micro-lens is disposed above the first photodiode and on an illuminated side of the image sensor; a second micro-lens is disposed above the second photodiode and on the illuminated side of the image sensor; and a coating layer disposed on both the first and second micro-lens, wherein the coating layer forms a flat top surface on the second micro-lens and a conformal coating layer on the first micro-lens.

Abstract: An image sensor includes a substrate, a first set of sensor pixels formed on the substrate, and a second set of sensor pixels formed on the substrate. The sensor pixels of the first set are arranged in rows and columns and are configured to detect light within a first range of wavelengths (e.g., white light). The sensor pixels of the second set are arranged in rows and columns and are each configured to detect light within one of a set of ranges of wavelengths (e.g., red, green, and blue). Each range of wavelengths of the set of ranges of wavelengths is a subrange of said first range of wavelengths, and each pixel of the second set of pixels is smaller than each pixel of the first set of pixels.

Abstract: A method for forming a lens barrel includes aligning each of a plurality of upper apertures of an upper wafer to (i) a respective one of a plurality of middle apertures of a middle wafer and (ii) a respective one of a plurality of lower apertures of a lower wafer. The middle wafer is between the upper wafer and the lower wafer. The method also includes bonding the middle wafer to the upper wafer to form a lens barrel wafer. Each triad of co-aligned upper, middle, and lower apertures forms a wafer aperture spanning between a top surface of the upper wafer and a bottom surface of the lower wafer. Each upper aperture has a respective upper width and each middle aperture has a respective middle width less than the respective upper width to form, in each triad, a ledge for supporting a lens in the upper aperture.

Abstract: A display system comprises a first display for providing a first value and a second display for providing a second value. The displayed image is a product of multiplication of the first value provided by the first display and the second value provided by the second display. The first display is a transmissive display comprises: a first glass substrate, an unpatterned ITO layer, a LC layer, a patterned ITO layer having isolated electrodes, and a second glass substrate. The second display is a reflective LCOS comprises: a glass substrate, an unpatterned ITO layer, a LC layer, a metal electrode layer, and a silicon substrate.

Abstract: A method for high-throughput assay processing includes (a) modulating temperature of a plurality of samples disposed in a respective plurality of fluidic channels on an image sensor wafer, including a plurality of image sensors, by heating the image sensor wafer using a heating module thermally coupled with the image sensor wafer, to control reaction dynamics in the samples, and (b) capturing a plurality of fluorescence images of the samples, using the plurality of image sensors, to detect one or more components of the plurality of samples. A method for manufacturing a high-throughput fluorescence imaging system with sample heating capability includes (a) bonding a fluidic wafer, including a plurality of recesses, to an image sensor wafer including a plurality of image sensors, and (b) bonding a heating module, including a heater for generating heat, to the image sensor wafer to thermally couple the heater and the image sensor wafer.

Abstract: A wafer-level method for packaging a plurality of camera modules includes (a) overmolding a first housing material around a plurality of image sensors to produce a first wafer of packaged image sensors, (b) seating a plurality of lens units in the first wafer above the plurality of image sensors, respectively, and (d) overmolding a second housing material over the first wafer and around the lens units to form a second wafer of packaged camera modules, wherein each of the packaged camera modules includes one of the image sensors and one of the lens units, and the second housing material cooperates with the first housing material to secure the lens units in the second wafer.

Abstract: A CMOS image sensor is made of an array of pixels. A column of the pixel array is coupled to a readout column. The readout column is couple to a readout circuitry (RC) that reads out an image data from the pixel array. The RC is made of at least one sampling switch which is coupled to a successive approximation register (SAR) analog-to-digital converter (ADC). The SAR ADC is made of a differential comparator, a local SAR control, and at least one digital-to-analog converter (DAC). One sampling switch is coupled between a readout column and a non-inverting input of the differential comparator. An image readout method reads two pixels with three conversions by using the RC. The RC is operated by SAR control circuitry to set its two DACs based on comparator output, and upon which a reset digital value is obtained and stored. The image data is achieved with a reduced algorithm calculation by using the stored reset digital value alongside other operations of the RC.

Abstract: A method for packaging applies to packaging a plurality of wafer-level lenses. Each wafer-level lens includes (a) a substrate with opposite facing first and second surfaces and (b) a respective lens element on at least one of the first and second surfaces. Each lens element has a lens surface facing away from the substrate. The method includes partially encasing the plurality of wafer-level lenses with a housing material to produce a wafer of packaged wafer-level lenses. In the wafer of packaged wafer-level lenses, the housing material supports each of the plurality of wafer-level lenses by contacting the respective substrate, and the housing is shaped to form a plurality of housings for the plurality of wafer-level lenses, respectively.

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a plurality of isolation structures disposed between individual photodiodes in the plurality of photodiodes. The plurality of isolation structures electrically isolate individual photodiodes in the plurality of photodiodes. A plurality of transistors are disposed proximate to the plurality of photodiodes and include a reset transistor, an amplifier transistor, and a row select transistor. An active region and a gate electrode of at least one transistor in the plurality of transistors are vertically aligned with an isolation structure in the plurality of isolation structures.

Abstract: A display system comprises a first display for providing a first value and a second display for providing a second value. The displayed image is a product of multiplication of the first value provided by the first display and the second value provided by the second display. The first display is a transmissive display comprises: a first glass substrate, an unpatterned ITO layer, a LC layer, a patterned ITO layer having isolated electrodes, and a second glass substrate. The second display is a reflective LCOS comprises: a glass substrate, an unpatterned ITO layer, a LC layer, a metal electrode layer, and a silicon substrate.

Abstract: Example comparators as discussed herein may include a second stage coupled to provide an output in response to an intermediate voltage, a first stage coupled to provide the intermediate voltage in response to an input. The first stage including a pair of cascode devices coupled to a current mirror, a low gain input coupled to inputs of the first stage via first switches, and further selectively coupled to the pair of cascode devices via second switches, and a high gain input coupled to the first and second inputs of the first stage via the first switches, and further selectively coupled to the pair of cascode devices via fourth switches.

Abstract: A readout circuit includes a comparator coupled to receive a ramp signal an output of a dual conversion gain pixel. A single counter is coupled to the output of the comparator. The counter is coupled to write to only one of a first or a second memory circuits at a time. A first multiplexor is coupled to load either an initial value or an initial memory value from the first memory circuit into the counter. A second multiplexor is coupled to load either a low conversion gain memory value from the first memory circuit or a high conversion gain memory value from the second memory circuit into a single data transmitter, which is coupled to transmit the received memory value to a digital processor.

Abstract: A liquid crystal display includes a display area and a border area at least partially surrounding the display area, where the display area displays images for viewing and the border area displays display-protection images, which are used to control ion migration in the liquid crystal layer. In a more particular embodiment, the border area displays a series of checkerboard pattern(s), where the checkerboard patterns can alternate between initial and inverted values. The display-protection images protect the liquid crystal display from migrating ions accumulating in particular regions of the pixel array and causing permanent defects in the display area. A liquid crystal display that includes a liquid crystal alignment layer having a plurality of liquid crystal alignment directions is also disclosed. The customized liquid crystal alignment director(s) over the border area promote ion migration away from the display area.