Abstract: An apparatus includes a photodiode, a first and second storage transistor, a first and second transfer transistor, and a first and second output transistor. The first transfer transistor selectively transfers a first portion of the image charge from the photodiode to the first storage transistor for storing over multiple accumulation periods. The first output transistor selectively transfers a first sum of the first portion of the image charge to a readout node. The second transfer transistor selectively transfers a second portion of the image charge from the photodiode to the second storage transistor for storing over the multiple accumulation periods. The second output transistor selectively transfers a second sum of the second portion of the image charge to the readout node.

Abstract: A backside illuminated pixel array having a buried channel source follower of a pixel cell which is coupled to output an analog signal directly to a bitline as image data. In one embodiment, the buried channel source follower of a pixel cell is coupled to a source follower power line having a line impedance which is less than that of one or more other signal lines for operating that same pixel cell. In another embodiment, a source follower power line has a line impedance which is less than at least one of a line impedance of a transfer signal line or a line impedance of a reset signal line.

Abstract: An apparatus includes an image sensor with a frontside and a backside. The image sensor includes an active circuit region and bonding pads. The active circuit region has a first shape that is substantially rectangular. The substantially rectangular first shape has first chamfered corners. A perimeter of the frontside of the image sensor has a second shape that is substantially rectangular. The second substantially rectangular shape has second chamfered corners. The bonding pads are disposed on the frontside of the image sensor. The bonding pads are disposed between the first chamfered corners and the second chamfered corners. The first shape is disposed inside the second shape.

Abstract: A method of forming trenches in a semiconductor device includes forming an etchant barrier layer above a first portion of a semiconductor layer. A first trench is etched in a second portion of the semiconductor layer using a first etchant. The second portion of the semiconductor layer is not disposed underneath the etchant barrier layer. The etchant barrier layer is etched through using a second etchant that does not substantially etch the semiconductor layer. A second trench is etched in the first portion of the semiconductor layer using a third etchant. The third etchant also extends a depth of the first trench.

Abstract: A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. The trench is positioned to impede a light path between the light emitting element and the light sensing element when the light path is internal to the semiconductor layer.

Abstract: A method for combining images includes capturing a first image including a subject from a first camera. A second image is captured from a second camera and the second image includes the subject. First pre-processing functions are applied on the first image to produce a first processed image. The first pre-processing functions include applying a distortion component of a rotation matrix to the first image. The rotation matrix defines a corrected relationship between the first and the second image. Second pre-processing functions are applied on the second image to produces a second processed image. The second pre-processing functions include applying the rotation matrix to the second image. The first processed image and the second processed image are blended in a processing unit to form a composite image.

Abstract: A technique for obtaining a corrected pixel value is disclosed. The technique includes measuring a first dark current of a dark calibration pixel of a pixel array and measuring a second dark current of an imaging pixel of the pixel array. A dark current ratio is calculated based on the first dark current and the second dark current. An image charge is acquired with the imaging pixel where the image charge is accumulated over a first time period. A charge is acquired with the dark calibration pixel where the charge is accumulated over a second time period. The second time period is approximately equal to the first time period divided by the dark current ratio. A corrected imaging pixel value is calculated using a first readout from the imaging pixel and a second readout from the dark calibration pixel.

Abstract: An apparatus includes a semiconductor layer, a dielectric layer, and a light prevention structure. The semiconductor layer has a front surface and a backside surface. The semiconductor layer includes a light sensing element and a periphery circuit region containing a light emitting element and not containing the light sensing element. The dielectric layer contacts at least a portion of the backside surface of the semiconductor layer. At least a portion of the light prevention structure is disposed between the light sensing element and the light emitting element. The light prevention structure is positioned to prevent light emitted by the light emitting element from reaching the light sensing element.

Abstract: An example image sensor includes a plurality of pixels arranged in an array of columns and rows, a row driver, and a control logic circuit. The row driver is coupled to pixels in a row of the array to provide a variable driving voltage to drive transistors included in the pixels of the row. The control logic circuit is coupled to provide one or more control logic signals to the row driver. The row driver adjusts a magnitude of the driving voltage in response to the one or more control logic signals.

Abstract: An image sensor for three-dimensional (“3D”) imaging includes a first, a second, and a third pixel unit, where the second pixel unit is disposed between the first and third pixel units. Optical filters included in the pixel units are disposed on a light incident side of the image sensor to filter polarization-encoded light having a first polarization and a second polarization to photosensing regions of the pixel units. The first pixel unit includes a first optical filter having the first polarization, the second pixel unit includes a second optical filter having the second polarization, and the third pixel unit includes a third optical filter having the first polarization.

Abstract: An image sensor having an image acquisition mode and an ambient light sensing mode includes a pixel array having pixel cells organized into rows and columns for capturing image data and ambient light data. Readout circuitry is coupled via column bit lines to the pixels cells to read out the image data along the column bit lines. An ambient light detection (“ALD”) unit is selectively coupled to the pixel array to readout the ambient light data and to generate an ambient light signal based on ambient light incident upon the pixel array. Control circuitry is coupled to the pixel array to control time sharing of the pixels cells between the readout circuitry during image acquisition and the ALD unit during ambient light sensing.

Abstract: A time of flight pixel includes a photodiode that accumulates charge in response to light incident upon the photodiode. A first transfer transistor is couple between the photodiode and a first charge storage device to selectively transfer charge to the first charge storage device from the photodiode. A second transfer transistor coupled between the photodiode and a second charge storage device to selectively transfer charge to the second charge storage device from the photodiode. An enable transistor is coupled between the first charge storage device and a readout node coupled to the second charge storage device to selectively couple the first charge storage device to the readout node. An amplifier transistor having a gate is also coupled to a readout node.

Abstract: An infrared cut filter may be used with an image sensor to remove infrared light components from image light received from a first side of the infrared cut filter prior to the image light reaching the image sensor to be disposed on a second side of the infrared cut filter. The infrared cut filter includes at least one red absorbing layer and an infrared reflector. The at least one red absorbing layer partially absorbs red light components within the image light. The infrared reflector reflects the infrared light components. The infrared reflector is disposed between the red absorbing layer and the first side of the infrared cut filter while the at least one red absorbing layer is disposed between the infrared reflector and the second side of the infrared cut filter.

Abstract: Implementations of a pixel including a substrate having a front side, a back side, and a photosensitive region formed on or near the front side, a dielectric layer formed on the front side, and a metal stack having a bottom side and a top side, the bottom side being on the dielectric layer. A light guide is formed in the dielectric layer and the metal stack and extending from the front side of the substrate to the top side of the metal stack, the light guide having a refractive index equal to or greater than the refractive index of the substrate. Other implementations are disclosed and claimed.

Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.

Abstract: Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.

Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

Abstract: A device includes a transistor including a source and a drain disposed in a substrate and a gate disposed above the substrate. The gate includes a first longitudinal member disposed above the source and the drain and running substantially parallel to a channel of the transistor. The first longitudinal member is disposed over a first junction isolation area. The gate also includes a second longitudinal member disposed above the source and the drain and running substantially parallel to the channel of the transistor. The second longitudinal member is disposed over a second junction isolation region. The gate also includes a cross member running substantially perpendicular to the channel of the transistor and connecting the first longitudinal member to the second longitudinal member. The cross member is disposed above and between the source and the drain.

Abstract: Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.

Abstract: A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied data is then compared with a predetermined data. The image data from the second super row is readout into the counter. If the multiplied data is larger than the predetermined data, the multiplied data from the first super row is stored in the counter. If not, the image data from the second super row is stored. Other embodiments are also described.