Abstract: Techniques for selectively translating resource requests from a program running on a computer system are disclosed. The resource request may be a request to access a file, library file, API, etc. The resource request may be a system call or library call. The computer program may be non-native to the computer system. Translation of resource requests may occur within the operating system or outside it. A resource request containing a reference to a first path and file name may be selectively translated by altering the resource request to contain a reference to a second path and file name. After selectively translating a request, he request is caused to be serviced. A resource request may be serviced by forwarding it to an operating system, and a result may be sent back to the program.

Abstract: A system for self-tuning hardware resources includes a processor, a hardware resource, an operating system (OS), a metric monitoring unit (MMU), and a configuration engine (CE). The OS determines: the hardware resource; a metric for monitoring the hardware resource; a hardware resource management policy for the hardware resource; and a primary and secondary sub-ranges for the metric. The OS sends a hardware resource management policy directive to the CE. The MMU monitors the hardware resource to obtain data for the metric. The CE receives the hardware resource management policy directive, determines the primary and secondary sub-ranges from the hardware resource management policy directive, obtains data for the metric from the MMU. When data is outside the primary sub-range and inside the secondary sub-range, the CE determines and executes a hardware resource optimization routine to bring hardware resource utilization into compliance with the primary sub-range.

Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.

Abstract: A method for transferring execution to a subsequent operating system. The method includes rebooting a computer system. Rebooting the computer system includes initializing an in-kernel boot loader. The in-kernel boot loader executes in a kernel of an initial operating system. Rebooting the computer system further includes populating, by the in-kernel boot loader, an initialization data structure using system data gathered during the execution of the initial operating system, loading, by the in-kernel boot loader, the subsequent operating system, and transferring control of the computer system from the initial operating system to the subsequent operating system. The subsequent operating system accesses the initialization data structure to identify available hardware. The method further includes executing the subsequent operating system on the available hardware of the computer system.

Abstract: The present disclosure provides a compiler prespill phase that reduces or eliminates excessive register pressure, or locations in the code of a program where live virtual registers exceeds physical registers of a target computing device, prior to register allocation. The prespill phase identifies points of excessive register pressure, selects candidate virtual registers, chooses virtual registers to prespill from the candidates, and inserts spill and reload instructions to prespill the chosen registers. The prespill phase may reduce the register pressure such that the live virtual registers only exceed the physical registers by a particular number, the live virtual registers equal the physical registers, or the physical registers exceed the live virtual registers by a particular number. The compiler may then perform one or more early and/or late instruction scheduling phases, including global and/or local instruction scheduling, to optimize the placement of the spill and reload instructions.

Abstract: In a system having a cluster of system components interconnected by a cluster interconnect fabric, the system components include out-of-band management network interfaces to an out-of-band management network. The system is configured to use the cluster interconnect fabric and the out-of-band management network interfaces to determine the overall connectivity and status of the cluster.

Abstract: A relational database may be integrated into an integrated circuit design and analysis environment as the persistent data store for data associated with the design. This design data may include two or more abstractions of the design, such as layout data models and timing data models, in some embodiments. Design data may be partitioned in the database and indexed according to various attributes. The use of a relational database may facilitate cross-probing of design data corresponding to different abstractions of the design. The relational database may be queried to produce design reports and to identify design errors or weaknesses. Reports may be graphical or tabular, and may be displayed, printed, stored, or posted for viewing. Proposed modifications to a design may be investigated by modifying data in the relational database, rather than in the actual design. Design reports may be re-generated and compared with corresponding reports for the un-modified design.

Abstract: System and Methods for time-based object aging for generational garbage collectors are provided. Time data is received from a user identifying the amount of time an object should survive in a generation defined in a heap. A circular buffer is generated to store a plurality of starting time for a plurality of garbage collections. Generational garbage collection is performed, and the time data in conjunction with the starting times stored in the circular buffer are used to determine when objects are promoted from one generation to the next oldest generation.

Abstract: A processor may include several processor cores, each including a respective higher-level cache; a lower-level cache including several tag units each including several controllers, where each controller corresponds to a respective cache bank configured to store data, and where the controllers are concurrently operable to access their respective cache banks; and an interconnect network configured to convey data between the cores and the lower-level cache. The controllers in a given tag unit may share access to a resource that may include one or more of an interconnect egress port coupled to the interconnect network, an interconnect ingress port coupled to the interconnect network, a test controller, or a data storage structure.

Abstract: In one embodiment of the present invention, there is provided a mechanism for implementing multi-level network administration in operating system partitions. With this mechanism, it is possible to control how network messages are routed and how network resources are used at multiple levels of an operating system environment. In one embodiment, a global administrator can control (or at least affect) routing at the partition level by setting the partition message processing rules. Similarly, a partition administrator can control (or at least affect) routing at the process group level by setting the process group message processing rules. Further, the global administrator can control the amount of a network resource that can be allocated to a non-global partition as a whole, and the partition administrator can control how that amount of the particular network resource can be allocated to the various projects within that non-global partition.

Abstract: Some embodiments of the present invention provide a system that processes a request for a cache line in a multiprocessor system that supports a directory-based cache-coherence scheme. During operation, the system receives the request for the cache line from a requesting node at a home node, wherein the home node maintains directory information for all or a subset of the address space which includes the cache line. Next, the system performs an action at the home node, which causes a valid copy of the cache line to be sent to the requesting node. The system then completes processing of the request at the home node without waiting for an acknowledgment indicating that the requesting node received the valid copy of the cache line.

Abstract: Methods for rendering effects of graphical components of a graphical user interface are provided. One method includes defining a screen display having one or more components. The method also includes defining a start state for at least one of the one or more components and defining an end state for at least one of the one or more components. An operation of determining if a component identified for transition includes a defined start state and a defined end state is also provided. The method determines a transition type for the component that that has the defined start state and the defined end state and identifies an effect type based on the determined transition type. To render, the method includes (a) altering a graphics state at a time interval and (b) painting the component for the identified graphics state at the time interval. The method repeats (a)-(b) until the graphics state matches the defined end state.

Abstract: A method and apparatus for efficient interrupt event notification for a scalable input/output device in a network system. A network interface unit is operably connected to a plurality of processing entities and associated memory units. At least one status register in the network interface unit contains information relating to a process to be performed by at least one processing entity communicated to the processing entity by an interrupt event notification. Shared memory space comprises a mailbox storage register operable to store an image of the interrupt information stored in the status register of the network interface unit. A processing entity can directly access the process information stored in the mailbox status register thereby reducing system latency associated with reading information in the status register. Updated process status information in the network interface status register may be read by the processing entity on an interleaved basis while executing a process.

Abstract: Duplicative code found in modules of high level computer code can be eliminated at link-time. A compiler forms a plurality of object files from a software program in which each object file includes one or more functions associated with the software program. An analyzer examines each function to ascertain whether any of the plurality of object files include functional duplicates. In addition, call and caller routing references are determined for each of the object files and functions contained therein. Responsive to determining that a functional equivalence exists, the routing of duplicative functions is altered to reference a golden copy of the same function. Once the call and caller information has been re-routed, the duplicative function(s) is(are) deleted.

Abstract: Various techniques for mitigating dependencies between groups of instructions are disclosed. In one embodiment, such dependencies include “evil twin” conditions, in which a first floating-point instruction has as a destination a first portion of a logical floating-point register (e.g., a single-precision write), and in which a second, subsequent floating-point instruction has as a source the first portion and a second portion of the same logical floating-point register (e.g., a double-precision read). The disclosed techniques may be applicable in a multithreaded processor implementing register renaming. In one embodiment, a processor may enter an operating mode in which detection of evil twin “producers” (e.g., single-precision writes) causes the instruction sequence to be modified to break potential dependencies. Modification of the instruction sequence may continue until one or more exit criteria are reached (e.g., committing a predetermined number of single-precision writes).

Abstract: A computer implemented method for transitioning a component between graphical user interface screens is provided. The method initiates with identifying a start state of the component within a transition panel. An end state of the component is identified within the transition panel and timer logic is triggered to periodically call a transition engine. An effects engine is called in response to the triggering and a next state of the component is rendered into an animation layer. The next state of the component is then displayed. A transition framework is also provided.

Abstract: A method for sharing data includes creating a socket serviced by a server application executing within a central operating system environment and creating another socket serviced by a client application executing within a virtualized operating system environment. The central operating system environment and virtualized operating system environment run on a single computer and are separated by a secure boundary. The central operating system environment has administrative control over the virtualized operating system environment. The method also includes establishing a communication link across the secure boundary and between the sockets, requesting at least one element of a server array existing in a memory space of the server application and passing the at least one element to the client application via the communication link to mirror the server array into a memory space of the client application.

Abstract: Some embodiments of the present invention provide a system that controls a device that generates vibrations in a computer system. During operation, a critical vibration frequency is determined for the computer system. Next, a keep-out zone is generated based on the critical vibration frequency, wherein the keep-out zone specifies a range of frequencies to be avoided. Then, the device is controlled based on the keep-out zone to reduce vibrations generated by the device in the keep-out zone.

Abstract: A method for processing a first request including receiving the first request, determining a first application associated with the first request, determining a first filter instance parameter associated with the first application, instantiating a first filter instance using the first filter instance parameter, and processing the first request using the first filter instance.

Abstract: Systems and methods for discovery and classification of denial of service attacks in a distributed computing system may employ local agents on nodes thereof to detect resource-related events. An information later agent may determine if events indicate attacks, perform clustering analysis to determine if they represent known or unknown attack patterns, classify the attacks, and initiate appropriate responses to prevent and/or mitigate the attack, including sending warnings and/or modifying resource pool(s). The information layer agent may consult a knowledge base comprising information associated with known attack patterns, including state-action mappings. An attack tree model and an overlay network (over which detection and/or response messages may be sent) may be constructed for the distributed system. They may be dynamically modified in response to changes in system configuration, state, and/or workload.