Abstract: An output processor for transforming the output produced by a functional component into different forms that can be consumed and presented by different types of clients is disclosed. With this output processor, a functional component is allowed to produce a single set of output that is not targeted at any particular type of client. The output processor then determines which type of client is requesting the output, and transforms the output into a form that can be consumed and presented by that type of client. By performing this transformation, the output processor allows the implementation of the functional component to be decoupled from the client that is requesting output from the functional component. This decoupling in turn enables the amount of effort needed to develop and maintain functional components in a large scale program to be significantly reduced.

Abstract: Transactional memory implementations provide the “illusion” of multiple memory locations changing value atomically, while in fact they do not. Techniques that employ transactional memory may allow a debug user to define a group of variables as an atomic group and may ensure coherent or consistent access to variables of the atomic group. These techniques may facilitate the debugging of programs that are executed using transactional memory. Unlike conventional debuggers, debuggers that employ these techniques may be adapted to provide a coherent or consistent view of variables in a system that employs transactional memory. The atomic group may be accessed for viewing and/or modifying during debugging using a transaction, regardless of whether all or less than all of the variables in the atomic group are modified.

Abstract: A device list is created for an operating system and/or a virtualized operating system. A bus node is created for each bus. Interface nodes are created as child nodes of the respective bus and a status indicator indicates whether a device connected to the interface is accessible. A device node is created for the device connected to the interface. Virtualized interface nodes are created as child nodes of the device node for each virtual device included in the device and a status indicator indicates whether the respective virtual device is accessible. Then, devices and/or virtual devices may be added and/or removed utilizing the list. After a device and/or virtualized device has been removed for one operating system and/or virtualized operating system, it may then be added to another. In this way, devices and/or virtualized devices can be virtually hot plugged without physically connecting and/or disconnecting devices.

Abstract: A method for configuring software modules that includes accessing a properties repository that includes a plurality of properties of the execution environment of the computer system. The method further includes generating a configuration file for each software module. Generating a configuration file includes obtaining a generator module defined for the software module, and executing the generator module to instantiate the configuration file for the software module. The generator module is configured to identify a property required for the configuration file, obtain the value for the property from the properties repository, and store the value for the property in the configuration file in accordance with a customized format required by the software module. The method further includes storing the configuration file for each of the software modules.

Abstract: A technique is disclosed for correcting inconsistent language model parameters associated with a compiled computer readable project. One or more compiled units are analyzed to identify compiler commentary therein. Based on the debugging information, it is determined whether inconsistent language model parameters exist. If so, a user is allowed to apply a correction strategy to correct the one or more inconsistent parameters.

Abstract: A capacitively and conductively coupled multiplexer (C3mux) circuit is described. This C3mux circuit includes a set of nonlinear coupling capacitors, such as metal-oxide-semiconductor (MOS) transistors, that can multiplex multiple input signals while minimizing the parasitic capacitance penalty associated with the ‘off’ paths. In particular, the capacitance of a given MOS transistor depends on whether its channel is present or absent. Furthermore, this channel is formed based on whether the gate-to-source and drain voltages for the MOS transistor are greater than the MOS transistor's threshold voltage. Note that the capacitance of the MOS transistors in the C3mux circuit is low for the unselected inputs. Consequently, the parasitic loading and the delay increase slowly as a function of the number of inputs. Moreover, the conductive feedback can be used to maintain a DC level of the input signals.

Abstract: A system and method for servicing translation lookaside buffer (TLB) misses may manage separate input and output pipelines within a memory management unit. A pending request queue (PRQ) in the input pipeline may include an instruction-related portion storing entries for instruction TLB (ITLB) misses and a data-related portion storing entries for potential or actual data TLB (DTLB) misses. A DTLB PRQ entry may be allocated to each load/store instruction selected from the pick queue. The system may select an ITLB- or DTLB-related entry for servicing dependent on prior PRQ entry selection(s). A corresponding entry may be held in a translation table entry return queue (TTERQ) in the output pipeline until a matching address translation is received from system memory. PRQ and/or TTERQ entries may be deallocated when a corresponding TLB miss is serviced. PRQ and/or TTERQ entries associated with a thread may be deallocated in response to a thread flush.

Abstract: A method and system for acquiring multiple software locks in bulk is disclosed. When multiple locks need to be acquired, such as for atomic transactions in transactional memory systems, the disclosed techniques may be applied to consolidate computationally expensive memory barrier operations across the lock acquisitions. A system may acquire multiple locks in bulk, at least in part, by modifying values in one or more fields of multiple locks and by then performing a memory barrier operation to ensure that the modified values in the multiple locks are visible to other application threads. The technique may be repeated for locks that the system fails to acquire during earlier iterations until all required locks are acquired. The described technique may be applied to various scenarios including static and/or dynamic transactional locking protocols.

Abstract: A method for demand-driven symbolic analysis involves obtaining a section of code comprising an instruction from a source code file and determining a critical variable in the section of code and data dependencies related to the critical variable. The method further involves iteratively computing a symbolic value representing a range of values of the critical variable according to the data dependencies, determining a set of control predicates relevant to the critical variable at the instruction, refining the range of values according to the set of control predicates to generate a second range of values for the symbolic value, and reporting an error when the second range of values exceeds a predetermined value.

Abstract: An optical waveguide is described. This optical waveguide may be defined in a semiconductor layer, and may include a vertical slot that includes an electro-optic material having an electric-field-dependent index of refraction, and the electro-optic material may be other than a semiconductor in the semiconductor layer. Alternatively, the optical waveguide may include a vertical stack with two semiconductor layers that surround and partially overlap an intermediate layer, which includes the electro-optic material.

Abstract: A device, system, and method are directed towards managing threads in a computer system with one or more processing units, each processing unit having a corresponding hardware resource. Threads are characterized based on their use or requirements for access to the hardware resource. The threads are distributed among the processing units in a configuration that leaves at least one processing unit with threads that have an aggregate zero or low usage of the hardware resource. Power may be reduced or turned off to the instances of the hardware resource that have zero or low usage. Distribution may be based on one or more of a number of specifications or factors, such as user power management specifications, power usage, performance, and other factors.

Abstract: Systems and methods for graphical user interfaces and for presenting content to a user of a graphical user interface are provided. In one implementation, a method for providing a graphical user interface component for a web page is disclosed. The method includes positioning a graphical user interface component on a web page layout, defining one or more conditions associated with the graphical user interface component, and determining content to be displayed at run time if the conditions are satisfied.

Abstract: Method and apparatus for automatically generating intermediate-level interfaces between program methods written in a platform-independent language and program methods written in a native language. A portable stub generator generates stubs in an intermediate, tokenized internal representation. The stub generator is portable across platforms as the stubs it generates are not platform-specific. In addition, the generated stubs are available to the compiler at intermediate compilation stages rather than at the backend compilation stage, and thus may be optimized together with the rest of the platform-independent code, and also may be inlined. The portable stub generator may be directed at virtual machine environments. An exemplary virtual machine environment in which the stub generator may be implemented is the Java™ Virtual Machine (JVM). In JVMs, Java™ is the platform-independent language, and Java™ bytecode the tokenized internal representation.

Abstract: Some embodiments of the present invention provide a system that acquires a lock in a shared memory multiprocessor system. During operation, the system loads the lock into a cache associated with the thread and then reads a value of the lock. If the value indicates that the lock is currently held by another thread, the system periodically executes an instruction that tests a status of the lock. If the status indicates the lock is valid, the system continues to test the status of the lock. Otherwise, if the status indicates that the lock was invalidated by a store, the system attempts to acquire the lock by executing an atomic operation. On the other hand, if the status indicates that the lock was invalidated by an atomic operation, or that the lock is not present in the cache, the system repeats the loading and reading operations.

Abstract: A system and method of spread-spectrum fan control for an air-cooled system is provided for reducing the vibrational and acoustical noise associated with the air-cooled system. The method includes generating a first control signal that controls a blade-passing frequency of a first cooling fan and a second control signal that controls a blade-passing frequency of a second cooling fan, wherein the first and second control signals may be pulse width modulated (“PWM”) signals. One or more noise generators independently vary duty cycles for the first and second PWM signals within a range around respective first and second blade-passing frequency set points. As a result, the blade-passing frequencies for the first and second cooling fans are independently and randomly modulated within a range around the respective first and second blade-passing frequency set points.

Abstract: A method for associating sounds with different keypresses, involving receiving an input of a first keypress from a keyboard including a plurality of keys, wherein the keyboard is associated with a computing device, determining whether a key corresponding to the first keypress is one of a plurality of significant elements, wherein the plurality of significant elements is a subset of the plurality of keys, determining a first sound event associated with the key, when the key is one of the plurality of significant elements, and outputting a first sound associated with the first sound event.

Abstract: A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a stepped terrace. A high-bandwidth ramp component, which is positioned approximately parallel to the stepped terrace, is mechanically coupled to the semiconductor dies. Furthermore, the ramp component includes an optical waveguide that conveys the optical signal, and an optical coupling component that optically couples the optical signal to one of the semiconductor dies, thereby facilitating high-bandwidth communication of the optical signal between the semiconductor die and the ramp component.

Abstract: A method for processing a read request identifying an address. The method includes receiving, at a module including a flash memory and a memory buffer, the read request from a requesting processor, mapping, using a coherence directory controller within the module, the address to a cache line in a cache memory associated with a remote processor, and sending a coherency message from the module to the remote processor to change a state of the cache line in the cache memory. The method further includes receiving, at the module, the cache line from the remote processor, sending, using processor bus and in response to the read request, the cache line to the requesting processor, identifying a requested page stored within the flash memory based on the address, storing a copy of the requested page in the memory buffer, and writing the cache line to the copy of the requested page.

Abstract: A system and method for using an opaque group within a federated identity management environment, to prevent disclosure of identities of the group. An opaque group is constructed at an identity provider within the system and has a group identity that references primary system identities of its members (e.g., electronic mail addresses, public key certificates, network addresses). Services to the group (e.g., distribution of an object such as a document or electronic mail message, invitation to an online meeting, authentication as a member of the group) can be requested from service providers, but because service providers do not have access to members' primary identities, the service providers forward the requests to an identity provider that has access to the group identity. That identity provider retrieves the members' identities and completes the action.

Abstract: A system and method for aggressive loop parallelization using speculative execution is disclosed. The method may include transforming code of a target application for concurrent execution, which may include adding an instruction to create a global address table entry for each store operation on which a load operation of a different loop iteration is dependent. The method may include replacing a standard load instruction with a special instruction configured to determine if an operand address of the load matches an operand address in one of the global address table entries. Another special instruction may remove a table entry following execution of the corresponding store operation. If an operand address of a load of a currently executing thread matches an operand address in the global address table, the method may include setting a checkpoint, completing execution of the thread in a pre-fetch mode, and re-executing the thread from the checkpoint.