Patents Assigned to Oracle America
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Patent number: 8319116Abstract: Systems and methods for providing mechanically reinforced plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities and reliability, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. One or more electrically-nonfunctional lands (or “rib reinforcements”) are provided in internal conductive layers to mechanically support the walls of the PCB.Type: GrantFiled: September 11, 2009Date of Patent: November 27, 2012Assignee: Oracle America, Inc.Inventors: Jorge Eduardo Martinez-Vargas, Lien-Fen (Livia) Hu, Samuel Ming Sien Lee, James David Britton, Martin John Henson
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Patent number: 8315395Abstract: Some embodiments provide a system to generate a key pair. During operation, the system can receive a request to generate the key pair, wherein the key pair is generated by a key assigner, and wherein the key pair is associated with a user. Next, the system can determine a secret associated with the key assigner. Specifically, the system can determine the secret by determining an initial secret associated with the key assigner, and by applying a one-way hash function to the initial secret one or more times. The system can then determine a seed based on the secret. Specifically, the system can determine the seed by cryptographically combining the secret with information associated with the user. Next, the system can generate the key pair by using the seed as an input to a key generator. The system can then return the key pair to a requestor.Type: GrantFiled: December 10, 2008Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventor: Radia J. Perlman
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Patent number: 8316281Abstract: An LDPC coding system includes a number of LDPC encoders and a number of LDPC decoders. The number of encoders/decoders is between one and one fewer than the total number of tracks on the high density tape are provided. The LDPC encoders are operable to break data from an incoming data sector into the data blocks to be written to the high density tape. The LDPC decoders are operable to assemble the data blocks into data sectors.Type: GrantFiled: November 3, 2009Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Richard A. Gill, Jin Lu
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Patent number: 8316099Abstract: Dividing a set of leaf objects having the same path of a directory namespace allows the divided path data sets to be distributed over separate physical stores (e.g., directory servers, network storage, separate memory, etc.). Distribution of divided path data sets over separate physical stores enhances scalability of a directory namespace and facilitates efficient utilization of resources. A directory distributor maintains information that indicates distribution of data path sets of a directory namespace and directs requests for the directory namespace to appropriate stores in accordance with this information.Type: GrantFiled: July 2, 2004Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Bradley C. Diggs, Thomas Sharif Abdallah, Neil A. Wilson, Stephen T. Shoaff, Kelly C. Hemphill
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Patent number: 8315065Abstract: A multi-chip module (MCM) is described. This MCM includes at least two substrates that are remateably mechanically coupled by positive and negative features on facing surfaces of the substrates. These positive and negative features may mate and self-lock with each other. For example, the positive features on one of the surfaces may include pairs of counterposed micro-springs, and the negative features may include pits or grooves on the other surface. When the substrates are mechanically coupled, a given pair of positive features may provide a force in a plane of the other surface. Furthermore, by compressing the MCM so that the surfaces of the substrates are pushed toward each other, the mechanical coupling may be released.Type: GrantFiled: September 28, 2009Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Jing Shi, Hiren D. Thacker, Ashok V. Krishnamoorthy
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Facilitating transactional execution in a processor that supports simultaneous speculative threading
Patent number: 8316366Abstract: Embodiments of the present invention provide a system that executes a transaction on a simultaneous speculative threading (SST) processor. In these embodiments, the processor includes a primary strand and a subordinate strand. Upon encountering a transaction with the primary strand while executing instructions non-transactionally, the processor checkpoints the primary strand and executes the transaction with the primary strand while continuing to non-transactionally execute deferred instructions with the subordinate strand. When the subordinate strand non-transactionally accesses a cache line during the transaction, the processor updates a record for the cache line to indicate the first strand ID. When the primary strand transactionally accesses a cache line during the transaction, the processor updates a record for the cache line to indicate a second strand ID.Type: GrantFiled: April 2, 2008Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Sherman H. Yip, Paul Caprioli, Marc Tremblay -
Patent number: 8316352Abstract: Transactional programming promises to substantially simplify the development and maintenance of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. However, various features and capabilities that would be desirable for debugging programs executed using transactional memory are absent from conventional debuggers. Because transactional memory implementations provide the “illusion” of multiple memory locations changing value atomically, while in fact they do not, there can be significant challenges involved with integrating debuggers with such programs to provide the user with a coherent view of program execution. We describe use of transactional memory access tracking mechanism for implementations of watchpoints on memory locations that correspond to transactional variables.Type: GrantFiled: October 25, 2006Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Yosef Lev, Moir S. Mark
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Patent number: 8316204Abstract: One embodiment of the present invention provides a system that uses versioned pointers to facilitate reusing memory without having to reclaim the objects solely through garbage collection. The system operates by first receiving a request to allocate an object. Next, the system obtains the object from a pool of free objects, and sets an allocated/free flag in the object to indicate that the object is allocated. The system also increments a version number in the object, and also encodes the version number into a pointer for the object. The system then returns the pointer, which includes the encoded version number. In this way, subsequent accesses to the object through the pointer can compare the version number encoded in the pointer with the version number in the object to determine whether the object has been reused since the pointer was generated.Type: GrantFiled: September 28, 2011Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventor: David R. Chase
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Patent number: 8315156Abstract: A system for distributing network traffic among direct hardware access datapaths, comprising: a processor; one or more activated PNICs; a host operating system; and a virtual machine (VM). Each activated PNIC sends and receives data packets over a network. Each activated PNIC is configured with a virtual function. The VM includes a VNIC and a virtual link aggregator configured to maintain a list identifying each activated PNIC. Virtual function mappings for the VM associate the VM with virtual functions for the activated PNICs. The virtual link aggregator selects the first activated PNIC for servicing a network connection and determines a virtual function for the first activated PNIC. The VNIC for the first activated PNIC uses the virtual function to directly transfer network traffic for the network connection between the VM and the first activated PNIC.Type: GrantFiled: June 30, 2010Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Nicolas G. Droux, Sunay Tripathi
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Patent number: 8315171Abstract: A method of managing a plurality of computing resources including obtaining a first load threshold and a second load threshold, obtaining a first load value and a second load value, comparing the first load threshold and the second load threshold with the first load value and the second load value, and changing an operating mode of a resource of the plurality of computing resources when both the first load threshold and the second load threshold are between the first load value and the second load value.Type: GrantFiled: October 31, 2006Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventors: Bharath Venkatakrishnan, Amit Kumar Sharma, Suraj Kumar Verma
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Patent number: 8316258Abstract: A system and method for error detection in a data storage array includes one or more storage medium interconnected with a controller through a network. A data integrity engine in the controller applies a first error detection process to a data object to create one or more data blocks and associated parity codes. First and second error detection processes are applied to detect and repair errors in the data object.Type: GrantFiled: May 3, 2007Date of Patent: November 20, 2012Assignee: Oracle America, Inc.Inventor: James P. Hughes
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Patent number: 8312442Abstract: A computing system has an amount of shared cache, and performs runtime automatic parallelization wherein when a parallelized loop is encountered, a main thread shares the workload with at least one other non-main thread. A method for providing interprocedural prefetching includes compiling source code to produce compiled code having a main thread including a parallelized loop. Prior to the parallelized loop in the main thread, the main thread includes prefetching instructions for the at least one other non-main thread that shares the workload of the parallelized loop. As a result, the main thread prefetches data into the shared cache for use by the at least one other non-main thread.Type: GrantFiled: December 10, 2008Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Yonghong Song, Spiros Kalogeropulos, Partha P. Tirumalai
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Patent number: 8312467Abstract: A method for executing an application, that includes instantiating, by a first thread, a first executable object and a second executable object, creating a first processing unit and a second processing unit, instantiating an executable container object, spawning a second thread, associating the first executable object and the second executable object with the executable container object, processing the executable container object to generate a result, and storing the result. Processing the executable container object includes associating the first executable object with the first processing unit, and associating the second executable object with the second processing unit, wherein the first thread processes executable objects associated with the first processing unit, wherein the second thread processes executable objects associated with the second processing unit, and wherein the first thread and the second thread execute concurrently.Type: GrantFiled: May 13, 2008Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Liang T. Chen, Yuan Lin, Deepankar Bairagi
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Patent number: 8312187Abstract: An I/O device includes a host interface coupled to a plurality of hardware resources. The host interface includes a transaction layer packet (TLP) processing unit that may receive and process a plurality of transaction layer packets sent by a plurality of processing units. Each processing unit may correspond to a respective root complex. The TLP processing unit may identify a transaction type and a processing unit corresponding to each transaction layer packet and store each transaction layer packet within a storage according to the transaction type and the processing unit. The TLP processing unit may select one or more transaction layer packets from the storage for process scheduling based upon a set of fairness criteria using an arbitration scheme. The TLP processing unit may further select and dispatch transaction layer packets for processing by downstream application hardware based upon additional criteria.Type: GrantFiled: September 18, 2009Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Elisa Rodrigues, John E. Watkins
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Patent number: 8310950Abstract: A method for use in a datacenter for load balancing services. A native registry is operated to provide a naming service storing service access information for services active in a network. On a node, an instance of a service is provided, and the native registry is updated with access information for the service. The method includes providing a content switch with a node controller such as on a network device. The method includes obtaining, with the node controller, service configuration information for the service from the native registry that includes the service access information. The node controller activates the service on the network by configuring the content switch based on the obtained service configuration information. The method includes the service node publishing a service definition for the service that includes the service access information and other information such as a service name, an IP address, and a load balancing algorithm.Type: GrantFiled: December 28, 2009Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Jan Mikael Markus Lofstrand, Jason Thomas Carolan
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Patent number: 8312431Abstract: A method for verifying an Executable and Linking File (ELF) object, that includes receiving a request for an ELF object from a client, obtaining the ELF object, determining whether a signature associated with the ELF object is valid, determining whether a usage restriction is associated with the ELF object, if the signature is valid, and restricting access to the ELF object, if the usage restriction is associated with the ELF object.Type: GrantFiled: September 19, 2005Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Darren J. Moffat, Kais Belgaied, Paul Sangster
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Patent number: 8312461Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes a storage for storing a resource discovery table, and programmed I/O (PIO) configuration registers corresponding to hardware resources. A system processor may allocate the plurality of hardware resources to one or more functions, and to populate each entry of the resource discovery table for each function. The processing units may execute one or more processes. Given processing units may further execute OS instructions to allocate space for an I/O mapping of a PIO configuration space in a system memory, and to assign a function to a respective process. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.Type: GrantFiled: June 9, 2008Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventor: John E. Watkins
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Patent number: 8312544Abstract: A method for controlling a denial of service attack involves receiving a plurality of packets from a network, identifying an attacking host based on a severity level of the denial of service attack from the network, wherein the attacking host is identified by an identifying attack characteristic associated with one of the plurality of packets associated with the attacking host, analyzing each of the plurality of packets by a classifier to determine to which of a plurality of temporary data structures each of the plurality of packet is forwarded, forwarding each of the plurality of packets associated with the identifying attack characteristic to one of the plurality of temporary data structures matching the severity level of the denial of service attack as determined by the classifier, requesting a number of packets from the one of the plurality of temporary data structures matching the severity level by the virtual serialization queue, and forwarding the number of packets to the virtual serialization queue.Type: GrantFiled: November 3, 2009Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Sunay Tripathi, Nicolas G. Droux, Yuzo Watanabe
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Patent number: 8312167Abstract: A method and apparatus for timely delivery of classes and objects is provided. A header comprising timing information is attached to said classes and/or objects. A “start loading” time and a “load by” time are specified in the header. Other classes and/or objects to be loaded are also specified in the header. Optional compression, security, and/or error resilience schemes are also specified in the header. A process for creating the header and attaching it to a class or object is provided. A process for receiving and processing a class or object with an attached header is provided. Embodiments of the invention allow timely delivery of classes and/or objects over a wide variety of transport mechanisms, including unreliable transport mechanisms and those lacking any guarantees of timely delivery.Type: GrantFiled: June 6, 2005Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventors: Viswanathan Swaminathan, Gerard Fernando, Michael Speer
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Patent number: 8307353Abstract: A system and method are provided for inlining across protection domain boundaries with a system virtual machine. A protection domain comprises a unique combination of a privilege level and a memory address space. The system virtual machine interprets or dynamically compiles not only application code executing under guest operating systems, but also the guest operating systems. For a program call that crosses a protection domain boundary, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the applicable protection domains. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions reveal the protection domain in which they are to operate, and instructions corresponding to different domains may be interleaved.Type: GrantFiled: August 12, 2008Date of Patent: November 6, 2012Assignee: Oracle America, Inc.Inventors: Gregory M. Wright, Christopher A. Vick, Mario I. Wolczko