Abstract: One embodiment of the present invention provides a system that non-intrusively detects counterfeit components in a target computer system. During operation, the system collects target electromagnetic interference (EMI) signals generated by the target computer system using one or more antennas positioned in close proximity to the target computer system. The system then generates a target EMI fingerprint for the target computer system from the target EMI signals. Next, the system compares the target EMI fingerprint against a reference EMI fingerprint to determine whether the target computer system contains a counterfeit component.

Abstract: A method for performing server monitoring via condition tracking and state identification of server components. In one embodiment, the method includes continuously monitoring a server, the server having a plurality of components, determining whether a component of the plurality of components has entered a maintenance state, and triggering a maintenance action for the component if it has entered the maintenance state.

Abstract: One embodiment provides a system that pre-fetches into a sibling cache. During operation, a first thread executes in a first processor core associated with a first cache, while a second thread associated with the first thread simultaneously executes in a second processor core associated with a second cache. During execution, the second thread encounters an instruction that triggers a request to a lower-level cache which is shared by the first cache and the second cache. The system responds to this request by directing a load fill which returns from the lower-level cache in response to the request to the first cache, thereby reducing cache misses for the first thread.

Abstract: One embodiment of the present invention provides a system for predicting a remaining useful life (RUL) for a component in a set of components within a computer system. The system starts by collecting values of at least one degradation-related parameter associated with the operation of a monitored component within the computer system. Note that the degradation-related parameter is a direct measurement of a degree of degradation of the monitored component. The system additionally collects values of at least one stress-based parameter from the computer system. Note that the stress-based parameter measures an accumulative stress in the operating environment of the set of components which can cause degradation of the set of components. The system then uses the values of the at least one degradation-related parameter and the values of the at least one stress-based parameter to predict an RUL for a component in the set of components.

Abstract: A heat source is cooled by employing heat pipes, magneto-hydrodynamic fluid pipes, and a heat sink. Heat is transmitted from evaporating ends of the heat pipes connected to the heat source to condensing ends of the heat pipes connected to the heat sink. The magneto-hydrodynamic fluid is circulated inside the magneto-hydrodynamic fluid pipes. Magnetic fields are generated using an array of magnets and an electric potential is created from a top surface to a bottom surface of each magneto-hydrodynamic fluid pipe using metal films. The magnetic fields and electric potential induce an electrically-conductive magneto-hydrodynamic fluid to circulate in the magneto-hydrodynamic fluid pipes thereby dissipating heat from the heat sink.

Abstract: A system and method is disclosed for verifying whether a test API of a high-security software platform implements a reference API when a verification tool has insufficient permissions to detect one or more members of the test API. A signature is determined for a reference API implementation, which includes multiple API members. Determining the signature involves identifying a proper subset of the API members, where the subset excludes one or more API members that are not programmatically detectable by a given verification tool executing on a high-security platform that implements the reference API. The member may not be detectable by the verification tool because the tool has insufficient permission to programmatically detect the member on the high-security platform. The signature is then configured to indicate the members of the subset and not the excluded members. The signature is then stored.

Abstract: A multi-chip module (MCM) is described. This MCM includes at least two substrates that are remateably mechanically coupled by positive and negative features on facing surfaces of the substrates. These positive and negative features mate with each other. In particular, a positive feature may mate with a given pair of negative features, which includes negative features on each of the substrates. Furthermore, at least one of the negative features in the given pair may include a hard magnetic material, and the positive feature and the other negative feature in the given pair may include a soft magnetic material that provide a flux-return path to the hard magnetic material. In this way, the hard magnetic material may facilitate the remateable mechanical coupling of the substrates.

Abstract: A system that provides error detection and correction for a memory that has a specific failed memory component accesses a block of data from the memory. Each block of data includes an array of bits logically organized into rows and columns, including a column including row-checkbits, a column including inner checkbits and data bits, and columns containing data bits. Each column is stored in a different memory component and the checkbits are generated from the data bits. Next, the system attempts to correct a column of the block by using the checkbits and the data bits to produce a corrected column. The system then regenerates row-parity bits and the inner checkbits for the block of data, wherein the block includes the corrected column, and compares the regenerated row-parity bits and inner checkbits with existing row-parity bits and inner checkbits.

Abstract: Systems and methods for efficient dynamic utilization of shared resources in a processor. A processor comprises a front end pipeline, an execution pipeline, and a commit pipeline, wherein each pipeline comprises a shared resource with entries configured to be allocated for use in each clock cycle by each of a plurality of threads supported by the processor. To avoid starvation of any active thread, the processor further comprises circuitry configured to ensure each active thread is able to allocate at least a predetermined quota of entries of each shared resource. Each pipe stage of a total pipeline for the processor may include at least one dynamically allocated shared resource configured not to starve any active thread. Dynamic allocation of shared resources between a plurality of threads may yield higher performance over static allocation. In addition, dynamic allocation may require relatively little overhead for activation/deactivation of threads.

Abstract: Techniques and structures are described which allow the detection of certain dependency conditions, including evil twin conditions, during the execution of computer instructions. Information used to detect dependencies may be stored in a logical map table, which may include a content-addressable memory. The logical map table may maintain a logical register to physical register mapping, including entries dedicated to physical registers available as rename registers. In one embodiment, each entry in the logical map table includes a first value usable to indicate whether only a portion of the physical register is valid and whether the physical register includes the most recent update to the logical register being renamed. Use of this first value may allow precise detection of dependency conditions, including evil twin conditions, upon an instruction reading from at least two portions of a logical register having an entry in the logical map table whose first value is set.

Abstract: A method for garbage collection, involving identifying a first object referenced by a second object, determining whether the address of the first object is lower than a pointer position, in response to determining that the address of the first object is lower than the pointer position, adding an identifier for the first object to a mark stack, determining whether a number of identifiers in the mark stack has reached a flush threshold, in response to determining that the number of identifiers in the mark stack has reached the flush threshold, setting a set of marks included in a mark bitmap to grey, setting a region field of a rescan map to indicate that a region of the mark bitmap includes any of the set of marks, and performing a rescan of the region based on the region field.

Abstract: A memory system accesses a block of data, each block including bits logically divided into rows and columns, each column including a row-checkbit column, an inner-checkbit column, and data-bit columns. Each column is stored in a different memory component, and checkbits are generated from databits to provide block-level correction for a failed memory component, and double-error correction for errors in different memory components. The system calculates a row syndrome and an inner syndrome for the block of data, the inner syndrome resulting from any two-bit error in the same row being unique. The system can use the row and inner syndromes to determine whether errors are associated with a failed memory component. If not, the system can use the row and inner syndromes, and inner syndromes for all possible combinations of one-bit errors occurring in two rows with a row syndrome of one to correct two bits.

Abstract: Apparatus, methods, and program products are disclosed that provide a technology that implicitly isolates a portion of a transactional memory that is shared between multiple threads for exclusive use by an isolating thread without the possibility of other transactions modifying the isolated portion of the transactional memory. In some of the described embodiments read locations of a shared memory are covered by a first set of lock objects, and write locations are covered by a second set of lock objects, each lock object in each set having a reader mode and a writer mode. Some of these embodiments acquiring each lock object in the first set using the reader mode, and acquire each lock object in the second set using the writer mode. These embodiments store result data values at write locations in the shared memory subsequent to the acquiring said first and second set of lock objects.

Abstract: A method including obtaining an operational status of a first processor core, where the first processor core is associated with a plurality of processor cores located on a chip; configuring a first IO block of a package design based on the operational status of the first processor core, where the package design is based on a fully functional chip; and configuring a stackup of the package design after configuring the first IO block for use with the chip.

Abstract: The described embodiments provide a processor (e.g., processor 102) for executing instructions. During execution, the processor starts by transactionally executing instructions from a protected section of program code. The processor then encounters a transactional failure condition while transactionally executing the instructions from the protected section of program code. In response to encountering the transactional failure condition, the processor enters a transactional-scout mode and speculatively executes subsequent instructions in the transactional-scout mode.

Abstract: A method for detecting user input dependence in software code. The method including representing the software code with a reachability graph having: a plurality of nodes, where a root node of the plurality of nodes represents an input controlled by a user; a first directed edge connecting a first node of the plurality of nodes and a second node of the plurality of nodes, where the first directed edge represents a data dependency; and a second directed edge connecting a third node of the plurality of nodes and a fourth node of the plurality of nodes, wherein the second directed edge represents a data dependency. The method also includes identifying a fifth node of the plurality of nodes as a reachable node from the root node by traversing the reachability graph from the root node to the reachable node; and marking a portion of the software code represented by the reachable node as user input dependant.

Abstract: One embodiment of the present invention provides a system that facilitates adjusting the wavelengths of lasers via temperature control. This system includes a chip with an active face upon which active circuitry and signal pads reside. A thermal-control mechanism provides localized thermal control of two lasers mounted upon the active face of the chip. By individually controlling the temperature of the lasers, the thermal-control mechanism controls the wavelengths emitted by each respective laser. By creating a temperature gradient that causes a temperature difference between two or more lasers, the system can cause the lasers to emit different wavelengths.

Abstract: Embodiments of a bidirectional 3-way optical splitter are described. This bidirectional 3-way optical splitter includes an optical splitter having: a first external node, a second external node, a third external node, and a fourth external node. In one mode of operation, the optical splitter may be configured to receive an external input optical signal on the first external node and to provide external output optical signals on the other external nodes. Moreover, in another mode of operation, the optical splitter may be configured to receive the external input optical signal on the third external node and to provide the external output optical signals on the other external nodes.

Abstract: Embodiments of the present invention are directed towards a method and apparatus for calling virtual machine across processes. In one embodiment, it is determined whether a virtual machine is running in the same process. If a virtual machine is running in the same process, that virtual machine is used. If a virtual machine is running in another process, the application sends commands for the virtual machine to an intermediary application in the same process. The intermediary application passes the commands on to another intermediary application in the process where the virtual machine is running, and that intermediary application sends the commands to the virtual machine. Communication from the virtual machine to the application are performed in the reverse order.

Abstract: A method for migrating a virtual machine executing on a host. The method involves monitoring, by a monitoring agent connected to a device driver, hosts in a network, wherein the device driver is connected to a network interface card, determining a virtual machine to be migrated based on a virtual machine policy, sending, by the host, a request to migrate to at least one of a plurality of target hosts in the network, receiving an acceptance to the request to migrate from at least one of the plurality of target hosts, determining, by the monitoring agent, a chosen target host to receive the virtual machine based on a migration policy, wherein the chosen target host is one of the at least one target hosts that sent the acceptance, sending a confirmation and historical information to the chosen target host, and migrating the virtual machine to the chosen target host.