Abstract: A method for fault management. The method includes generating, in firmware of a computer system, a physical resource inventory (PRI) of a plurality of hardware components of the computer system, wherein the PRI defines a hierarchy of the hardware components. The method further includes traversing, by an enumerator executing in a fault manager, the PRI to generate a topology of the plurality of hardware components. The topology is used for fault management of the computer system.

Abstract: Leaked memory in a computer system is detected and recovered by first detecting memory leakage within the computer system based on nonlinear and non-parametric time-series regression analysis of software telemetry data generated by one or more software process running on the computer system. If existence of memory leakage is detected, then memory that has leaked is specifically identified and recovered. This is done by halting one or more of the software processes, generating a core image file or files of the halted software process(es), and re-starting the halted process or processes without waiting for analysis of the core image file(s). Then, the core image file is evaluated to specifically identify leaked memory in the computer system based on the core image file. Finally, the identified leaked memory is recovered.

Abstract: An information processing module includes a processor subsystem including a processor and memory. The information processing module is configured as a field replaceable unit blade server removably receivable in a carrier. Redundant external connections are provided for interconnection with the carrier. The external connections for carry information signals, management signals and power. The information processing module can be configured as a field replaceable blade server. The provision of a limited set of redundant connections provides for highly reliable interconnection between the information processing module and the carrier.

Abstract: An instruction processing circuit for a processor, where the instruction processing circuit is adapted to provide one or more sequence of operations, based on one or more sequence of instructions, to an execution circuit of the processor. The instruction processing circuit includes a cache circuit operable to store a second type of sequence of operations that represents at least a portion of a first type of sequence of operations, where the sequence of operations of the second type includes at most one control transfer that, when present, ends a first portion of a sequence of instructions, where the cache circuit is further configured to store a third type of sequence of operations that represents a set of at least two sequences of operations.

Abstract: A method and apparatus are provided, the method and apparatus comprising running a plurality of identical programs on a plurality of identical computers and recording information about at least some state updates done within each of the plurality of the identical programs running on the plurality of the identical computers using a plurality of digests of the at least some state updates. The method and apparatus also comprises comparing the plurality of the digests to determine whether at least one of the plurality of the identical programs running on the plurality of the identical computers has failed.

Abstract: Graphical means for setting up, monitoring and issuing alerts for data conditions are described.

Abstract: A method for congestion recovery during a denial of service attack involves creating a split horizon zone on a server, where the split horizon zone includes a fictitious zone mapped to a fictitious address, receiving and investigating requests from clients, designating a malicious client based on investigating the requests, where the malicious client is associated with a client address, assigning the client address to the fictitious zone, and routing network traffic from the malicious client to the fictitious address.

Abstract: A servo writing method is provided for use with unoriented magnetic tape media. A biasing zone is formed, such as between a pair of permanent block or disk magnets, with a strong DC magnetic field that is substantially free of perpendicular components. The method includes feeding the tape through the magnetic biasing zone to form a longitudinal magnetic bias in the magnetic layer of the tape media. The method includes using a write head to write a servo pattern on the tape media after the forming of the longitudinal magnetic bias in the tape media, and the servo pattern produces an output that is substantially symmetric with high amplitudes. In one embodiment, the biasing zone is formed or defined as the gap between first and second magnetic assemblies oriented with a single direction of magnetization, such as in the same direction as the tape travel through the biasing zone.

Abstract: A method, system and computer program product that involves receiving and initializing a digital image. Quantization is preformed on the digital image using at least two multiplication operations. Finally, a compressed version of the digital image is presented for viewing and/or storage or transport.

Abstract: A method for addressing system latency within a network system which includes providing a network interface and moving data within each of the plurality of memory access channels independently and in parallel to and from a memory system so that one or more of the plurality of memory access channels operate efficiently in the presence of arbitrary memory latencies across multiple requests is disclosed. The network interface includes a plurality of memory access channels.

Abstract: A test system including a package with switchable paths. The package may have conductive paths that are selected by switches. The electrically switchable conductive paths may yield increased data without significantly increasing the required testing hardware.

Abstract: A computer processor and a method of using the computer processor take advantage of information in the event address register of the computer processor by saving information from the event address register to an event address register history buffer. Thus, the event address register history buffer includes a cluster of events associated with execution of a computer program. The cluster of events is analyzed and the computer program modified, either statically or dynamically, to eliminate or at least ameliorate the effects of such events in further execution of the computer program.

Abstract: A mounting assembly is provided for use in mounting a printed circuit board to a computer chassis. The mounting assembly includes standoffs attached to the chassis wall to extend outward into the chassis. Each standoff includes an elongated body and a neck extending from the body and having a smaller diameter than outer dimensions of the body. Each standoff includes a head extending from the neck. The mounting assembly includes retention assemblies that are mounted to the printed circuit board. Each retention assembly includes a spring-force retention member (such as a single coil of a ring spring) with an inner passageway with an at rest diameter smaller than the head. The printed circuit board is mounted to the chassis wall by pressing the printed circuit board onto the standoff elements, which are clasped by a spring force applied by each of the spring-force retention members on the standoff necks.

Abstract: A method includes associating each computing job with a group of a plurality of groups, and associating each group with a minimum promised utilization. Further, the method includes determining a present utilization for each group having at least one job ready for scheduling, each job being associated with at least one required resource, the present utilization for a given group comprising a total amount of a promised resource consumed by presently executing jobs associated with the given group divided by the minimum promised utilization associated with the given group. A first computing job selected for scheduling is one that is ready for scheduling and is the computing job having a highest static priority within a group having a lowest present utilization. A subset of computing nodes able to satisfy the at least one required resource associated with the first computing job is identified.

Abstract: A Mobile Enterprise Platform utilizes a web based service that synchronizes enterprise data between a plurality of disparate mobile devices and a plurality of backend enterprise resources. The Mobile Enterprise Platform creates a web service synchronization source instance using Hypertext Transfer Protocol (“HTTP”) for each application or database present on a plurality of mobile devices. Corresponding to each of these web service synchronization source instances is a web based synchronization service associated with a specific backend enterprise resource. Each synchronization service is web based and can thus live anywhere on the network or on a dedicated services tie as they need only to supply a small set of operations to offer synchronization capability to a variety of mobile devices.

Abstract: A mounting assembly includes two side rails that mechanically couple to at least two sides on an exterior of a device, where a given side rail includes one or more circumferential edges that define one or more holes on a surface and into an interior of the given side rail, and the surface is approximately parallel to one of the at least two sides on the exterior of the device. Moreover, the mounting assembly includes mechanical collars that mechanically couple to mechanical couplers that mechanically couple the mounting assembly to a chassis in a computer system, where a given mechanical collar is included in a given hole in the given side rail. Additionally, the mounting assembly includes energy-absorbing material encapsulating the mechanical collars, where the energy-absorbing material is positioned between an outer surface of the given mechanical collar and an inner surface of the given hole.

Abstract: Methods and apparatus provide for a local search indexer to allow for an optimized search within a web server that returns accurate search results while maintaining independent control as to defining search patterns, search prioritization, and updated content available for search. Specifically, the local search indexer organizes content according to a hierarchical directory structure at a web server. The hierarchical directory structure includes at least one directory level that provides at least one directory for storing the content. The local search indexer builds a search index associated with the directory and stores the search index at the web server. The search index is populated with indexed content based on an update of the content stored in the directory. The local search indexer employs a search engine, at the web server, to process search queries against the indexed content to provide a search result that includes the update of the content.

Abstract: A lock implementation has properties of both backoff locks and queue locks. Such a “composite” lock is abortable and is provided with a constant number of preallocated nodes. A thread requesting the lock selects one of the nodes, attempts to acquire the selected node, and, if successful, inserts the selected node in a wait-queue for the lock. Because there is only a constant number of nodes for the wait-queue, all requesting threads may not be queued. Requesting threads unable to successfully acquire a selected node may backoff and retry selecting and acquiring a node. A node at the front of the wait-queue holds the lock.

Abstract: In general, in one aspect, the invention relates to a method for conserving power. The method includes determining a first network connection speed for a network interface card (NIC), configuring the NIC to operate at the first network connection speed, processing, after the configuration, packets received by the NIC, obtaining a bandwidth utilization of the NIC, determining, using a power management policy, a second network connection speed for the NIC based on the bandwidth utilization when the bandwidth utilization is outside a threshold range, and configuring the NIC to operate at the second network connection speed.

Abstract: A method, system, and computer readable medium for reconfiguring a virtual network path. A virtual switching table associated with virtual network interface cards (VNICs) is populated and used to implement the virtual network path. The virtual network path includes a first virtual wire between a first VNIC located in a first computer and a second VNIC located in a second computer. A first network packet and a second network packet are placed in a receive buffer associated with the second VNIC. The first network packet is transmitted to the second VNIC using the virtual switching table. The second VNIC is migrated from the second computer to a third computer. The virtual switching table is updated based on migrating the second VNIC. The second network packet is transmitted to the second VNIC in the third computer using the virtual switching table.