Abstract: In general, the invention relates to a method for garbage collection. The method includes examining old regions to obtain a mark bitmap, a connectivity matrix, and fragmentation information, where the mark bitmap describes marked words and unmarked words for the old regions. The method further includes identifying a fragmented region in the old regions based on the fragmentation information, where the fragmented region includes at least one of the marked words. The method further includes copying the at least one of the marked words to a new region allocated from a pool of free regions, designating each of the unmarked words not in the fragmented region as free, adjusting a cross-region reference to the fragmented region in the marked words to point to the new region based on the connectivity matrix, and adding the fragmented region to the pool of free regions.

Abstract: An active membrane creates a secure area around one or more devices. The active membrane forms a physical barrier between the encased secure area and an external environment. Linked to the membrane and acting as the sole interface between the secure area and the outside environment is a boundary interface. The boundary interface tunnels data to the secure area in a secure fashion. According to one embodiment of the present invention, the boundary interface utilizes symmetric and/or asymmetric cryptographic techniques to secure the data path. The boundary interface is also coupled to the active membrane, and upon the membrane sensing a breach of the membrane (thus signifying an intrusion of the secure area), the boundary interface can be configured to sever the data paths linking the secure area with the unsecured area as well as take other active steps to ensure that data within the secure area is not compromised.

Abstract: An information processing system includes a runtime versioning facility which allows for managing its configuration so that modifications made during runtime are propagated and take affect without restarting the system or a portion thereof. This allows the potential for 100% uptime while upgrading such systems. This also provides a system capability to process multiple configuration versions, and to be able to process such versions even while such versions are changing during operation of the information processing systems. For example, a system such as a registry server capable of transactional configuration changes is provided which manages its configuration so that modifications made during runtime are propagated and take affect without restarting the server.

Abstract: An improved, systematic approach is provided for automatically determining which cells in a circuit should be replaced to satisfy timing adjustment requirements (TAR's), and automatically replacing the cells with replacement cells to meet the TAR's. With the improved approach, there is a high likelihood that an optimal replacement scheme will be found which requires the fewest number of cells to be replaced while still satisfying all of the TAR's.

Abstract: A head positioning assembly having a first carriage assembly, a second carriage assembly, and an actuator. The second carriage assembly has a head and is coupled to the first carriage assembly by a first flexible member. The first and second carriage assemblies may be actuated to position the head when sufficient force is provided by the actuator.

Abstract: Provided is a method, computer program and system for controlling the flow of service requests originated by a plurality of requesters. The method includes adding an additional control mechanism, which includes a serializer and a serializer queue, between the requesters and the service provider. The serializer inhibits the requesters when the serializer queue size reaches a threshold for a period proportional to the number of requesters already waiting, the queue length and the serializer service time. When the service provider queue is full or at a critical level, the serializer is inhibited for a period of time that is the approximately the difference between the service times of the serializer and the service provider. In addition, when the service provider queue is full, the service provider service time is recalculated as a function of the serializer service time and of the time required to process requests by the service provider.

Abstract: An instruction processing unit includes a trace builder circuit operable to (i) receive at least a portion of a first type of sequence of operations and to generate, based thereon, a second type of sequence of operations, where the portion includes at most one control transfer instruction that, when present, ends the portion, (ii) receive sets of at least two sequences of operations and to generate, based thereon, a plurality of third type of sequences of operations, where a sequence of operations of the third type includes one or more interior control transfer instructions and is generated from the sequence of operations of the second type and another sequence of operations of the third type, and (iii) retrieve the sequence of operations of the second type and the another sequence of operations of the third type from a cache circuit.

Abstract: Approaches for transparently interfacing with a third party version control system (VCS) are provided. In one approach, an enterprise application integration (EAI) system comprises an integrated development environment (IDE) client, a repository, an API, and an API implementation. The IDE client enables a user to develop one or more functional components that can be used or executed to derive one or more enterprise application functionalities. The repository interacts with the IDE client to save and access the one or more functional components. The API is invoked by the repository to interact with any VCS. The API implementation enables the repository, by way of invoking the API, to interact with a VCS, which is an external VCS that is not provided as part of the EAI system.

Abstract: Embodiments of the present invention provide a system that maintains load-marks on cache lines. The system includes: (1) a cache which accommodates a set of cache lines, wherein each cache line includes metadata for load-marking the cache line, and (2) a local cache controller for the cache. Upon determining that a remote cache controller has made a request for a cache line that would cause the local cache controller to invalidate a copy of the cache line in the cache, the local cache controller determines if there is a load-mark in the metadata for the copy of the cache line. If not, the local cache controller invalidates the copy of the cache line. Otherwise, the local cache controller signals a denial of the invalidation of the cache line and retains the copy of the cache line and the load-mark in the metadata for the copy of the cache line.

Abstract: One embodiment of the present invention provides a system for communicating and performing synchronization operations between a main thread and a helper-thread. The system starts by executing a program in a main thread. Upon encountering a loop which has associated helper-thread code, the system commences the execution of the code by the helper-thread separately and in parallel with the main thread. While executing the code by the helper-thread, the system periodically checks the progress of the main thread and deactivates the helper-thread if the code being executed by the helper-thread is no longer performing useful work. Hence, the helper-thread is executes in advance of where the main thread is executing to prefetch data items for the main thread without unnecessarily consuming processor resources or hampering the execution of the main thread.

Abstract: One embodiment of the present invention provides a system that automatically detects and corrects a misalignment of a semiconductor chip. During operation, the system uses a position-detection mechanism integrated with the chip to determine the misalignment of the chip from a desired alignment for the chip. Next, the system uses an actuation mechanism integrated with the chip to automatically correct the misalignment, thereby improving performance and reliability of the chip.

Abstract: A method for viewing a desktop on a first client involves initiating a first desktop session and a second desktop session, populating a first virtual frame buffer (VFB) using the first desktop session, populating a second VFB using the second desktop session, storing an extended virtual frame buffer (EVFB) using the first VFB and the second VFB, and selecting a first portion of the EVFB to view on the desktop using a first VFB scout.

Abstract: A method for searching and resource discovery in a distributed enterprise (DE), the method including: generating a first classifier for a first repository in the DE; generating a second classifier for a second repository in the DE, where the second classifier has a vector element identifying a location of the second repository; submitting a copy of the second classifier to a web server of the first repository; obtaining a resource at the first repository after submitting the copy of the second classifier; matching the resource to the copy of a second classifier; sending a copy of the resource to the second repository using the vector element; and storing the copy of the resource in the second repository.

Abstract: Techniques are provided for fast reduction of a system model, such as fast parasitics reduction of an electrical design. Delta loops, which comprise three nodes connected by three edges, may be identified. The netlist can be annotated with the number of delta loops to which an edge belongs and a delta loop identifier. Delta loops that share an edge may be assigned the same identifier. Identifying delta loops may be based on the intersection of binary search trees that are based on the netlist. In one embodiment, a cost of removing a node from the netlist is determined. Based on the annotations to the edges connected to a node under consideration for removal, the total number of delta loops that are shared by pairs of edges is determined. Based, at least in part, on the total number of common delta loops, a cost is determined of removing the node.

Abstract: A register access request for control and/or status operations from a link is detected using a hardware mechanism and is forwarded to a software-controlled entity for access to a virtual register for control and/or status operations. The software-controlled entity can provide virtual registers in memory associated with the software-controlled entity. The hardware mechanism can form part of an interconnect device and the software-controlled entity is external to the interconnect device.

Abstract: In general, the invention relates to a method for creating a virtual network path. The method includes instantiating a number of virtual network interface cards (VNICs) on a number of virtual machines, where each virtual machines is located in one of the computers, each of the computers is connected using a chassis interconnect, and the computers share a physical network interface. The method further includes populating a virtual switching table associated with the VNICs and implementing the virtual network path using the virtual switching table. The virtual network path includes a first virtual wire between a first VNIC and a second VNIC, wherein the first VNIC is located in a first computer and wherein the second VNIC is located in a second computer selected from the plurality of computers.

Abstract: The present invention relates to a method and arrangements for node recovery particularly suitable for recovery involving large database fragments. The method for node recovery according to the present invention makes use of an old version of a fragment in a failed node (114). The old version is brought up to date by means of scanning an up to date version of the fragment in another node and copying parts of the fragment (117), which have changed since the creation of the old version, to the recovering node. A delete log is utilized in order to take deletions, which have taken place since the creation of the old version, into account in the recovery of the failed node (116). An advantage of the method for node recovery according to the present invention is that it does not require write transactions to be stopped during the recovery process.

Abstract: A system may include a node and an additional node coupled by an inter-node network. The node includes an active device, an interface to the inter-node network, a memory, and an address network coupling the active device, the interface, and the memory. The active device sends an address packet to initiate a transaction to gain an access right to a coherency unit. In response to receiving the address packet, the memory is configured to send a report corresponding to the address packet to the interface if the transaction cannot be satisfied within the node. The interface is configured to ignore the address packet and to send a coherency message requesting the access right to the additional node via the inter-node network in response to the report.

Abstract: A transducer positioning apparatus is provided that supports a read/write head on a data storage machine and biases the head against rotation. The transducer positioning apparatus may comprise a base that includes a linear drive motor and a support frame to which the read/write head is secured. The support frame is reciprocally driven by the linear drive motor relative to the base. A magnetic coupling is provided between the base and the support frame that resists movement of the frame other than the reciprocal movement of the support frame relative to the base. A method is also disclosed for magnetically biasing a movable head of a transducer against rotation.

Abstract: Method and apparatus for barrier synchronization of threads, for example work-stealing threads. Embodiments may provide a consensus barrier synchronization mechanism that allows a “stop world” operation being performed by two or more worker threads configured to “steal” work from other threads to complete, even if one or more of the threads are not scheduled/started by the thread scheduler and thus do not rendezvous or “check in” at a consensus barrier in a timely manner. In embodiments, portions (subtasks) of the overall task which were assigned to the tardy thread may have been completed by other work-stealing threads, and one of the other threads may check in the tardy thread at the consensus barrier upon determining that the thread is dormant and does not have any more apportioned work to be performed. In one embodiment, the task being performed may be garbage collection for a process.