Abstract: A method, apparatus and computer program product for providing Global Account Lockout (GAL) using an Ordered Messaging Service (OMS) is presented. A database operation is received from a client, and a determination made regarding whether the operation contains an authentication mechanism. When the operation does not contain an authentication mechanism then the operation is returned from. When the operation does contain an authentication mechanism then the following steps are performed: locating the entry and checking its authentication mechanism, determining whether the authentication mechanism in the operation is good, sending a bind message to a GAL manager, checking and updating GAL state, committing updates to GAL state, and returning operation to the client.

Abstract: A method for virtual computing that includes receiving a virtual computer specification, wherein the virtual computer specification defines a plurality of hardware and software configuration requirements for a virtual computer and a duration requirement for use of the virtual computer, requisitioning a plurality of computing resources based on the plurality of hardware and software configuration requirements, provisioning the plurality of computing resources from a pool of computing resources to obtain a provisioned virtual computer, and scheduling the plurality of computing resources of the provisioned virtual computer for use based on the duration requirement.

Abstract: The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable signal is coupled to the test circuit. When the disable signal is asserted, the test circuit is disabled, and the pulse generator circuit outputs pulses of a predetermined duration. In contrast, when the disable signal is deasserted, the test circuit is enabled, and the pulse generator circuit outputs an oscillating signal.

Abstract: Methods and apparatus provide for a Dynamic Interleaver to modify the interleaving distribution spanning physical memory modules. Specifically, dynamic interleaving provides the ability to increase the number of interleaved physical memory modules when a current interleaved group of memory locations is experiencing heavy use. By increasing the number of interleaved memory locations, a system can make optimal use of memory by allowing more parallel accesses to physical memory during the period of heavy utilization. However, if the current interleaved group of memory locations experience low use, the Dynamic Interleaver can choose to interleave across fewer physical memory modules and apply power management techniques to those memory locations that are no longer being accessed. Prior to “re-interleaving” interleaved memory locations, the Dynamic Interleaver migrates data out of the current interleaved memory locations.

Abstract: Method and system that test device sensitivity according to whether the device passes or fails when subjected to a test signal. The device may be repeatedly subjected to test signal at varying operating parameters in order to assess pass-fail threshold at which the device transitions from operating properly/improperly to operating improperly/properly.

Abstract: A method for installing a device driver for a device in a guest domain, that includes obtaining a first device driver for the device by a hypervisor, installing, by the hypervisor, the first device driver into memory allocated to the guest domain, and notifying an operating system in the guest domain of the first device driver after installing the device driver, wherein the operating system communicates with the device using the first device driver.

Abstract: Embodiments of the present invention provide a system that handles way mispredictions in a multi-way cache. The system starts by receiving requests to access cache lines in the multi-way cache. For each request, the system makes a prediction of a way in which the cache line resides based on a corresponding entry in the way prediction table. The system then checks for the presence of the cache line in the predicted way. Upon determining that the cache line is not present in the predicted way, but is present in a different way, and hence the way was mispredicted, the system increments a corresponding record in a conflict detection table. Upon detecting that a record in the conflict detection table indicates that a number of mispredictions equals a predetermined value, the system copies the corresponding cache line from the way where the cache line actually resides into the predicted way.

Abstract: A method of testing a proximity communication system for voltage margin by impressing a voltage upon the data link between the transmitter on one chip and the receiver on the other chip coupled to the transmitter through a capacitively coupling circuit formed by juxtaposed capacitor pads on the respective two chips. The impressed voltage is varied and the output of the receiver is monitored to determine an operational voltage margin. The floating inputs on the receiver may be continuously biased by connecting them to variable biasing supply voltages through high impedances. When the floating inputs are periodically refreshed to a refresh voltage during a quiescent data period, the refresh voltage is varied between successive refresh cycles. The variable test voltage may be applied to transmitter output when it is in a high-impedance state, and the output of the receiver is measured.

Abstract: A resource-constrained device comprises a processor configured to execute multiple instruction streams comprising multiple instructions having an opcode and zero or more operands. Each of the multiple instruction streams is associated with one of multiple instruction execution modes having an instruction set comprising multiple instruction implementations. At least one of the multiple instruction implementations is configured to change the processor from a first instruction execution mode to a second instruction execution mode. The processor comprises an instruction fetcher configured to fetch an instruction from one of the multiple instruction streams based at least in part upon a current instruction execution mode.

Abstract: A system configured to receive a first request for a first datum, query the cache metadata to determine whether the first datum is present in the main memory or the asymmetric cache device (ACD), retrieve the first datum from the main memory when the first datum is present in the main memory, retrieve the first datum from the ACD when the first datum is present in the ACD and not present in the main memory, store a copy of the first datum in the main memory when the first datum is present in the ACD and not present in the main memory, update the cache metadata to indicate that the copy of the first datum is stored in the main memory when the first datum is present in the ACD and not present in the main memory, and retrieve the first datum from the disk when the first datum is not present in the ACD and is not present in the main memory.

Abstract: An embodiment of the invention provides a method for communicating event data in a network, including: receiving the event data in a first device, the event data including a native IP address associated with a source of the event data; translating a native protocol of the event data into XML, a resulting XML message including the event data and an identifier associated with the first device; transmitting the XML message from a first location to a second location; determining a new IP address based on the native IP address and the identifier; and including the new IP address in the XML message.

Abstract: A system and method for testing computing devices is provided. A method for testing computing devices includes providing a suite of test programs on a server for execution by a computing device that is coupled to the server. A test console coupled to the server is used to initiate execution of the tests on the computing device. The server facilitates and coordinates testing between the test console and the computing device. The server provides the test console with results of the tests.

Abstract: A method, apparatus, and system are directed toward overlaying a cluster of nodes over peers in a peer-to-peer network using a peer identification and communication mechanism. A string based name for a resource in a peer-to-peer network is received and is used to generate a unique identifier using a secure hash algorithm. An advertisement specifying at least one address associated with the resource is associated with the unique identifier. The advertisement is broadcasted. The unique identifier and/or the resource in the peer-to-peer network is associated with a resource in the cluster. A network packet may be addressed to the resource in the cluster by the unique identifier. The network packet may be routed to the address associated with the resource in the cluster using an Open System Interconnection (OSI) Level 2 or above protocol.

Abstract: Embodiments of a system that adjusts a checkpointing frequency in a distributed computing system that executes multiple jobs are described. During operation, the system receives signals associated with the operation of the computing nodes. Then, the system determines risk metrics for the computing nodes using a pattern-recognition technique to identify anomalous signals in the received signals. Next, the system adjusts a checkpointing frequency of a given checkpoint for a given computing node based on a comparison of a risk metric associated with the given computing node and a threshold, thereby implementing holistic fault tolerance, in which prediction and prevention of potential faults occurs across the distributed computing system.

Abstract: A method is described with which to detect and model a person's temporal activity patterns from a record of the persons computer activity or online presence. The method is both predictive and descriptive of temporal features and is constructed with a minimal amount of beforehand knowledge. Activity related data is accumulated from a mechanism that is involved in the activity of a person. Significant inactivity features are identified within the activity data. These inactivity features are characterized so as to project the temporal activity of the person. Real-time activity of the person is then detected and inactivity periods are checked for likelihood of belonging to a previously characterized significant feature. The resulting information is formatted and made available to individuals having a need for the information.

Abstract: A system and method of deterministically transferring data across a first clock domain to a second clock domain includes receiving a resynchronize command, initiating a corresponding one of a plurality of read delays in each one of a second plurality of devices in the second clock domain, counting down the plurality of read delays to zero, receiving a training pattern after the plurality of read delays count down to zero in each one of the second plurality of devices, recovering a clock data in each of the second plurality of devices, receiving a synch byte by each of the second plurality of devices, selecting one of a plurality of serial lanes as a reference lane, wherein the plurality of serial lanes couple the first clock domain to the second clock domain, initiating a write pointer, writing n bytes of serial data to a buffer and converting the n bytes of data from serial data to parallel data in a serial to parallel converter such that the serial n byte data in the buffer are aligned in time.

Abstract: The invention relates to a method of managing a distributed computer system, comprising a group of nodes. The method comprises the following steps: a. sending a candidates master message from a given one of the node to other nodes in the group (906), b. recording receipt in the given node of candidate master messages from other nodes, until a first end-of-receipt condition is met, and c. upon receipt of candidate master message from other nodes at step b., starting in the given node a master election scheme between the given node and such other nodes having sent candidate master messages. The invention also relates to a corresponding distributed computer system.

Abstract: A mechanism for automatically determining an optimal temporal interval for displaying data is provided. The mechanism receives information indicating a temporal range. The mechanism determines the size of a display area in which data corresponding to the temporal range is to be displayed. The mechanism further determines, based at least partially upon the size of the display area, how many data display elements can be displayed within the first display area. The mechanism then determines, based at least partially upon the temporal range and how many data display elements can be displayed within the display area, a temporal interval by which the temporal range is to be divided for purposes of displaying the data corresponding to the temporal range. Each data display element corresponds to a particular instance of temporal interval.

Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.

Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.