Abstract: A vertical junction field effect transistor (JFET) includes a substrate, an active region having a plurality of semiconductor fins, a source metal layer on an upper surface of the fins, a source metal pad layer coupled to the semiconductor fins through the source metal layer, a gate region surrounding the semiconductor fins, and a body diode surrounding the gate region.

Abstract: This disclosure is directed to generator systems and methods for monitoring a direct current bus and automatically operating in response to a power level of the direct current bus dropping below a desired power level or to a threshold before dropping below the power level. The automatic operation of the generator system may raise or keep the actual power level of the system above the desired power level or threshold.

Abstract: A multi-phase voltage converter has a plurality of integrated circuits (ICs), and a controller. Each IC has a control pin to receive a control signal, a monitoring pin and a temperature sensing circuit, the controller has a monitoring pin connected to the monitoring pin of each of the plurality of ICs to receive a monitoring signal. The temperature sensing circuit is connected to or disconnected from the monitoring pin of the corresponding one of the plurality of ICs in response to the control signal and the monitoring signal.

Abstract: An automatic transfer switch includes a first conduction bar selectively coupled with a first power source and a load conduction bar; a second conduction bar selectively coupled with a second power source and the load conduction bar; a first blade assembly electrically coupled to the first conduction bar; and a second blade assembly electrically coupled to the second conduction bar. The first blade assembly is electrically coupled to a first source conduction bar in a closed position, and a first electromagnetic force induced by a first current flowing through the first blade assembly and the first conduction bar repulses the first blade assembly. The second blade assembly is electrically coupled to a second source conduction bar in a closed position, and a second electromagnetic force induced by a second current flowing through the second blade assembly and the second conduction bar repulses the second blade assembly.

Abstract: A retention structure can be created using two or more different materials (e.g., one magnetic material, and one non-magnetic material) as a composite structure. The retention structure can include a cylindrical hoop comprising one or more one or magnetic regions tangentially alternating with one or more non-magnetic regions configured to surround and retain a plurality of magnets to a rotor, wherein the one or more magnetic regions are aligned with each one of the plurality of magnets and the one or more non-magnetic regions are aligned with one or more spaces between the plurality of magnets on the rotor. The magnetic material allows flux from the permanent magnets to flow through to the stators and the non-magnetic sections reduce leakage of magnetic flux to adjoining permanent magnets through use of non-magnetic materials. The retention structure can be fabricated using a hot isostatic press process.

Abstract: An LLC resonant converter includes a transformer, a switching half-bridge circuit, a resonant circuit, and a full-bridge rectifier. Both the switching half-bridge circuit and the full-bridge rectifier are on the same side of the transformer. The switching half-bridge circuit has a pair of switches, with one of the switches being connected to the output voltage node of the converter.

Abstract: A trans-inductor voltage regulator (TLVR) has regulator blocks and transformers. Secondary windings of the transformers are connected in series with a compensation inductor to form a trans-inductor loop, which is connected to the output voltage of the TLVR instead of to ground. Primary windings of the transformers serve as output inductors of the regulator blocks. The inductance of each output inductor and the output inductance of the TLVR are input to an averaging network of an averaging inductor direct current resistance (DCR) current sense circuit to generate an average sensed voltage. The average sensed voltage is converted to an average sensed current, which is used by a controller to generate control signals that drive the regulator blocks to generate the output voltage of the TLVR.

Abstract: A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type; forming a first III-nitride layer coupled to the III-nitride substrate, wherein the first III-nitride layer is characterized by a first dopant concentration and the first conductivity type; forming a plurality of trenches within the first III-nitride layer, wherein the plurality of trenches extend to a predetermined depth; epitaxially regrowing a second III-nitride structure in the trenches, wherein the second III-nitride structure is characterized by a second conductivity type; forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions; epitaxially regrowing a III-nitride gate layer in the recess regions, wherein the III-nitride gate layer is coupled to the second III-nitride structure, and wherein the III-nitride gate layer is characterized by the second conductivity t

Abstract: A fish passage system having flexible textile materials forming a conduit to transport fish across river barriers encountered during migration. The system can include modular support structures that can be independently secured to riverbeds to form conduit supports, dams, hydropower structures, and the like.

Abstract: Electrochemical cell battery system and associated methods of operation are provided based on the incorporation of a thermal suppression construct including a supply of cooling fluid dispensed in intimate contact with the cells disposed within an enveloping sealed enclosure. The electrochemical cells are connected electrically by bus bars to form a battery of cells. The bus bars support cooling by convection methods. The cells are allowed to float mechanically as they are charged and discharged while maintaining intimate thermal contact with the enveloping sealed enclosure through conduction and the bus bars through conduction. The system provides a method of cooling the cells by conduction and convection and that accommodates mechanical changes to both the cells and the enveloping sealed enclosure.

Abstract: In an embodiment, a power module may include: a plurality of first stages, each having an H-bridge to receive an incoming AC voltage at a first frequency and rectify the incoming AC voltage to a DC voltage; a plurality of DC buses, each to receive the DC voltage from one of the plurality of first stages; a plurality of second stages, each coupled to one of the plurality of DC buses to receive the DC voltage and output a second AC voltage at a second frequency; and a hardware configuration system having fixed components and optional components to provide different configurations for the power module.

Abstract: Junction field effect transistors (JFETs) and related manufacturing methods are disclosed herein. A disclosed JFET includes a vertical channel region located in a mesa and a first channel control region located on a first side of the mesa. The first channel control region is at least one of a gate region and a first base region. The JEFT also includes a second base region located on a second side of the mesa and extending through the mesa to contact the vertical channel region. The vertical channel can be an implanted vertical channel. The vertical channel can be asymmetrically located in the mesa towards the first side of the mesa.

Abstract: A power converter includes a controller for driving a power switch in one phase of a plurality of phases of the power converter. The controller may have a first terminal for receiving an input switch driving signal which is used to drive a power switch in another phase of the power converter, and a second terminal for providing an output switch driving signal to drive the power switch in the one phase. The controller draws power from the input switch driving signal received at the first terminal, and is configured to provide the output switch driving signal based on the input switch driving signal.

Abstract: A power conversion circuit for an uninterruptible power system, including an inductor, a first capacitor, a second capacitor, a first switch, a second switch, a third switch, a first diode, a second diode, and a third diode body, is provided. A terminal of the second switch is electrically coupled to the inductor through the first switch, and another terminal of the second switch is electrically coupled to a neutral wire and the third switch. An anode and a cathode of the first diode are electrically coupled to the first switch and a positive DC bus, respectively. A cathode and an anode of the second diode are electrically coupled to the first switch and the third switch, respectively. A cathode and an anode of the third diode are electrically coupled to the third switch and a negative DC bus, respectively. In addition, an uninterruptible power system using the same is provided.

Abstract: Provided herein is a method for fabricating a heat source for a radioisotope thermoelectric generator (RTG). The method may include reducing a particle size in a strontium compound by powdering and sieving the strontium compound and/or dissolving the strontium compound into an aqueous solution; mixing the strontium compound with graphite to obtain a strontium-graphite mixture; performing a press to the strontium-graphite mixture; and encapsulating the pressed strontium-graphite mixture into an x-ray shielding to obtain the heat source.

Abstract: A field-plate trench FET having a drain region, an epitaxial layer, a source region, a gate conductive layer formed in a trench, a field-plate dielectric layer formed on vertical sidewalls of the trench, a well region formed below the trench, a source contact and a gate contact. When the well region is in direct physical contact with the gate conductive layer, the field-plate trench FET can be used as a normally-on device working depletion mode, and when the well region is electrically isolated from the gate conductive layer by the field-plate layer, the field-plate trench FET can be used as a normally-off device working in an accumulation-depletion mode.

Abstract: A battery module includes features to optimize cooling while providing electrical isolation and cell gas-venting channels. The battery module can include the integration of a heatsink in order to improve thermal performance. Thermally conductive pads can be provided to create an electrically isolated interface between a plurality of series-connected battery-cell lead plates, at different potentials, and the heatsink. Optimization, by stacking thin and thick thermally conductive pads, allows for creation of gas-venting channels along the positive cell terminal locations. In some arrangements, a plurality of fluid paths are disposed between the inlet and the outlet of the battery module to provide heat convective airflow through the battery module.

Abstract: A method of operating a forced induction gaseous-fueled engine includes mixing gaseous-fuel and engine intake air to form a mixture at a fuel mixer. The method includes delivering the mixture to an intake manifold by at least partially bypassing a charge air cooler.

Abstract: Junction field effect transistors (JFETs) and related manufacturing methods are disclosed herein. A disclosed four terminal JFET includes an integrated high voltage capacitor (HVC). The JFET includes a first terminal coupled to a drain region, a second terminal coupled to the source region, a third terminal coupled to the base region, and an integrated HVC terminal coupled to an integrated HVC electrode which forms an HVC with the drain region. The JFET also includes a channel formed by a channel region. A bias on the base region fully depletes the channel of majority carriers. The channel has an unbiased concentration of majority carriers. The integrated HVC electrode is positioned relative to the channel region such that applying the bias to the integrated HVC terminal depletes the channel by at most ten percent of the unbiased concentration of majority carriers.