Patents Assigned to Prime Computer, Inc.
  • Patent number: 5428772
    Abstract: A data processing system providing user interaction in multiple natural languages, including a processor for executing application programs and a memory for storing message files corresponding to the application program in at least one natural language and a link table for storing links between the application program and corresponding message files, wherein a link for an application program stores a natural language and a pointer to its message file, wherein the operating system for the processor establishes links when a message file is loaded into memory. The data processing system nests language information for nested application programs. A fall-back mechanism is used to provide a default language when a language desired by a user is not available or when nested languages are not available.
    Type: Grant
    Filed: October 1, 1991
    Date of Patent: June 27, 1995
    Assignee: Prime Computer, Inc.
    Inventor: Lauren Merz
  • Patent number: 5423023
    Abstract: A user configurable system which integrates and manages a plurality of different tasks and software tools. It is adapted primarily for use in design and production automation systems. The system has a main control routine which utilizes macros to control each process to be performed, including the sequencing of tasks and the encapsulation of any incompatible software tools which interface with the control program. The encapsulation controls the interpretations for transfers between the incompatible tool and the control program. Additional routines are provided for providing interfacing between various tools, including tools having various types of incompatibilities, and between an operator and the system or the various tools used therein. All such routines are rules based and such rules, including the macros used with the control routine, are written in an interpretive extension language which is both human and machine readable. This renders the system easily configurable and reconfigurable by the user.
    Type: Grant
    Filed: June 25, 1990
    Date of Patent: June 6, 1995
    Assignee: Prime Computer, Inc.
    Inventors: James C. Batch, Eileen M. Burns-Brookens, Pavel Ivanov, Timothy I. Michel, Robert A. Russell
  • Patent number: 5247679
    Abstract: A method and apparatus for linking and registering executable program formats (EPFs) so as to resolve all unresolved pointers. The invention sequentially attempts to link and initialize each EPF by resolving the unresolved pointers of each EPF. During each attempt to initialize an EPF, the EPF is assigned two states, a linkage state and an invocation state. If an EPF has all pointers to shared address space resolved, it is marked as INITIALIZED. Otherwise, it is marked as UNINITIALIZED. Further, an EPF is marked as SUSPENDED if it contains either unresolved pointers or pointers that reference another EPF that is marked as SUSPENDED. Otherwise, the EPF is marked as READY and is ready to execute. Data defining the unresolved pointers of each EPF that is not SUSPENDED is stored in a database. After each EPF is registered, the database is checked to determine if all the unresolved pointers in the shared linkage of a suspended EPF can now be resolved.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: September 21, 1993
    Assignee: Prime Computer, Inc.
    Inventor: Arun Kumar
  • Patent number: 5185745
    Abstract: A method of diagnosing memory and CPU boards by using scan rings which are composed of interconnected shift registers. A maintenance processor (MP) down-loads vector files to the scan rings. The scan rings are transparently partitioned into subsections and each subsection and individual bits are then tagged using a high level language, i.e., a scan path diagnostic language (SPDL). The user of SPDL writes a program in SPDL language addressing a portion of the scan ring. Next, the high level commands are translated into low level machine code and run on the MP. Bits are then loaded into the scan ring and subjected to a test routine. Additional commands are given to correct any errors uncovered and the bits are then reloaded through the MP to the hardware element being tested.
    Type: Grant
    Filed: May 14, 1990
    Date of Patent: February 9, 1993
    Assignee: Prime Computer, Inc.
    Inventor: Peter J. Manca, Jr.
  • Patent number: 5170113
    Abstract: A method and apparatus for detecting an improper connection of one or more cables to signal a cable misconnection error. On a board at one end of the cable there is provided a transmit circuit unique to one of the pins or sockets of the connector and at the other end of the cable at an opposite board there is provided a receive circuit that, when the cable is properly connected, receives the signal from the transmit circuit. A misconnection of the cable eliminates the signal from the transmit circuit thus signaling an error at the receive circuit. In addition, semi-dedicated connector positions are also employed so as to assure a detection of a number of different misconnections of the cable, particularly in a multi-cable system.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: December 8, 1992
    Assignee: Prime Computer, Inc.
    Inventor: David H. Albonesi
  • Patent number: 5140321
    Abstract: A method and apparatus for compressing digital data uses data which has been previously compressed as a dictionary of substrings which may be replaced in an input data stream. The method and apparatus uses a hash table to take advantage of principles of locality and probability to solve the maximal matching substring problem inherent in this type of compressing apparatus, most of the time. The hash table consists of first-in, first-out (FIFO) collision chains of fixed, uniform numbers of pointers to substrings of data already compressed which potentially match an input substring. A companion decompressing method and apparatus receives compressed data from the compressing apparatus and expand that data back to its original form.
    Type: Grant
    Filed: September 4, 1991
    Date of Patent: August 18, 1992
    Assignee: Prime Computer, Inc.
    Inventor: Robert K. Jung
  • Patent number: 5136696
    Abstract: A pipelined central processor capable of executing both single-cycle instructions and multicycle instructions is provided. An instruction fetch stage of the processor includes an instruction cache memory and a prediction cache memory that are commonly addressed by a program counter register. The instruction cache memory stores instructions of a program being executed and microinstructions of a multicycle instruction interpreter. The prediction cache memory stores interpreter call predictions and interpreter entry addresses at the addresses of the multicycle intructions. When a call prediction occurs, the entry address of the instruction interpreter is loaded into the program counter register on the processing cycle immediately following the call prediction, and a return address is pushed onto a stack. The microinstructions of the interpreter are fetched sequentially from the instruction cache memory. When the interpreter is completed, the prediction cache memory makes a return prediction.
    Type: Grant
    Filed: June 27, 1988
    Date of Patent: August 4, 1992
    Assignee: Prime Computer, Inc.
    Inventors: Robert F. Beckwith, Neil J. Johnson, Suren Irukulla, Steven Schwartz, Nihar Mohapatra
  • Patent number: 5134364
    Abstract: A test probe for testing electronic circuits is provided with a flexible conductive pad disposed at the end of the test probe. The flexible conductive pad is resilient so that when it makes physical and electrical contact with an electronic circuit, it compresses and does not damage either the electrical circuit or the probe itself.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: July 28, 1992
    Assignee: Prime Computer, Inc.
    Inventors: Maurice S. Karpman, Leo M. Higgins, III
  • Patent number: 5132780
    Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: July 21, 1992
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5117069
    Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: May 26, 1992
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5113514
    Abstract: The invention comprises a system bus apparatus and method for a multi-arm, multiprocessor computer system having a main memory and localized buffer cache memories at each processor. Each block of data in a cache includes tag bits which identifies the condition of the data block in relation to the corresponding data in main memory and other caches. The system bus (SYSBUS) comprises three subparts; 1) a MESSAGE/DATA bus, 2) a REQUEST/GRANT bus and 3) a BCU bus. The MESSAGE/DATA bus is coupled to every device on the system and is used for transferring messages, data and addresses. The REQUEST/GRANT bus couples between every device on an arm of the system and that arm's bus control unit (BCU). The BCU bus couples between the various BCUs.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: May 12, 1992
    Assignee: Prime Computer, Inc.
    Inventors: David H. Albonesi, Brian K. Langendorf, John Chang, John G. Faase, Michael J. Homberg
  • Patent number: 5089443
    Abstract: A method for making a heat sink device as constructed for use with a semiconductor circuit chip 15. On a thermally conductive substrate a layer of a metal alloy is deposited. The metal alloy is thermally conductive and electrically insulative. Cavities are selectively and controllably formed in the alloy layer to define a plurality of heat dissipation members having heat dissipation surfaces.
    Type: Grant
    Filed: May 30, 1990
    Date of Patent: February 18, 1992
    Assignee: Prime Computer, Inc.
    Inventors: Apor Kerey, Peter Delivorias
  • Patent number: 5088081
    Abstract: In a RAID level 5 disk drive subsystem, one or more additional disk drives, called "reserve" disks are intercoupled to the array of disk drives and a control system is included for storing recovered digital data on the additional disk drive if a sector on one of the disk drives becomes defective. The system reduces the number of disk accesses required to obtain the information stored on the defective sector. Once the information has been recovered, it is then stored on the "reserve" disk. Thereafter, whenever this information is required, the system reads the required information from the "reserve" disk, instead of going through an entire recovery process for the defective sector. Since the recovery process can take a time that is greater than several disk access times, the present invention improves the speed and the availability of data.
    Type: Grant
    Filed: March 28, 1990
    Date of Patent: February 11, 1992
    Assignee: Prime Computer, Inc.
    Inventor: William Farr
  • Patent number: 5058000
    Abstract: An improved method for access to data from a remote computer and an improved method for accessing remote heterogeneous data bases. The method includes a personal computer having an application program for processing data by keyboard input that operates on a local applications data base having files with a first file structure. A remote host computer accesses data in remote files having a second file structure. A preselected keystroke of the first computer modifies the data accession program of the remote computer to reformat retrieved data in the format of the personal computer applications program before transmission back to the personal computer, so that the personal computer resident portions of the program require no information as to where the requested data is located or what the host computer file structure is.
    Type: Grant
    Filed: June 15, 1989
    Date of Patent: October 15, 1991
    Assignee: Prime Computer, Inc.
    Inventors: Landon Cox, Wayne Kovsky, Marie Mastaj
  • Patent number: 5040381
    Abstract: An apparatus for cooling circuit modules by use of a thermo-electric device which comprises a series of semiconductor regions and etched copper conductors designed to conduct heat in a specified direction by means of the Peltier Effect. The thermo-electric device is sandwiched between two layers of a polymer based, thermally conductive dielectric such as the dielectric used in the manufacture of Thermal Clad.TM.. The hot layer of Thermal Clad.TM. (i.e., the layer that receives heat) is laminated directly to a heat sink. The cold layer of Thermal Clad.TM. is laminated directly to a cold plate which is, in turn, coupled to the circuit module.
    Type: Grant
    Filed: April 19, 1990
    Date of Patent: August 20, 1991
    Assignee: Prime Computer, Inc.
    Inventor: William A. Hazen
  • Patent number: 5029111
    Abstract: A multiuser display system in which the bit planes are shared by a plurality of user stations. A bus carries a superpixel containing bits from each of the bit planes in this system. Each user station is assigned particular bit planes and extracts the bits corresponding to the assigned bit planes from the superpixel. Double buffering within a window is made possible by providing two sets of bit plane identification registers.
    Type: Grant
    Filed: April 29, 1987
    Date of Patent: July 2, 1991
    Assignee: Prime Computer, Inc.
    Inventor: Barry N. Mansell
  • Patent number: 5019971
    Abstract: A high availability set associative cache memory for use as a buffer between a main memory and a central processing unit includes multiple sets of cache cells contained in two or more cache memory elements. Each of the cache cells includes a data field, a tag field and a status field. The status field includes a force bit which indicates a defective cache cell when it is set. Output from a cache cell is suppressed when its force bit is set. The defective cache cell is effectively mapped out so that data is not stored in it. As long as one cell in a set remains operational, the system can continue operation. The status field also includes an update bit which indicates the update status of the respective cache cell. Replacement selection logic examines the bit pattern in all the cache cells in a set and selects a cache cell to be replaced using a first-in first-out algorithm.
    Type: Grant
    Filed: August 21, 1989
    Date of Patent: May 28, 1991
    Assignee: Prime Computer, Inc.
    Inventors: Brian Lefsky, Mary E. Natusch
  • Patent number: 5019880
    Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.
    Type: Grant
    Filed: January 7, 1988
    Date of Patent: May 28, 1991
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III.
  • Patent number: 5012342
    Abstract: A video mixing system that is adapted to receive respective video and graphic control signals for controlling the display content on a video monitor. A video decoder processes the video and graphic control signals, thus making it possible to mix two or more video sources, one of which is typically an in-house data terminal source and the other of which is typically connected as a graphics option. At the output of the decoder is a gate means for providing selective voltage stepped intensity control signals for controlling the video monitor.
    Type: Grant
    Filed: June 30, 1988
    Date of Patent: April 30, 1991
    Assignee: Prime Computer, Inc.
    Inventors: Richard Olsen, William Gross
  • Patent number: 4967314
    Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.
    Type: Grant
    Filed: November 1, 1989
    Date of Patent: October 30, 1990
    Assignee: Prime Computer Inc.
    Inventor: Leo M. Higgins, III