Patents Assigned to Qorvo US, Inc.
  • Patent number: 10707819
    Abstract: Monolithic microwave integrated circuits (MMICs) with phase tuning are disclosed. A MMIC structure may include a MMIC amplifier with electrically coupled input and output lines. The MMIC structure may further include an adjustable cover over the MMIC amplifier that includes at least one portion that can be adjusted closer to or farther away from either the input or output lines. In this manner, a signal capacitance between the adjustable cover and the input or output lines is adjustable, and accordingly, a signal phase of the MMIC structure may be tuned. A spatial power-combining device may include a plurality of amplifier assemblies, wherein each amplifier assembly includes a MMIC amplifier with an adjustable cover. In this manner, the plurality of amplifier assemblies may be phase-tuned to a target value.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: July 7, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Soack Yoon, Ankush Mohan, Dan Denninghoff
  • Patent number: 10707095
    Abstract: The present disclosure relates to a semiconductor package with reduced parasitic coupling effects, and a process for making the same. The disclosed semiconductor package includes a thinned flip-chip die and a first mold compound component with a dielectric constant no more than 7. The thinned flip-chip die includes a back-end-of-line (BEOL) layer with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, a device layer over the upper surface of the BEOL layer, and a buried oxide (BOX) layer over the device layer. The BEOL layer includes a first passive device and a second passive device, which are underlying the first surface portion and not underlying the second surface portion. Herein, the first mold compound component extends through the BOX layer and the device layer to the first surface portion.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: July 7, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, George Maxim, Dirk Robert Walter Leipold, Baker Scott
  • Patent number: 10707911
    Abstract: A radio frequency front-end (RFFE) bus hub circuit and related apparatus are provided. In examples discussed herein, the RFFE bus hub circuit can be configured to bridge an RFFE bus with a number of auxiliary RFFE buses. In a non-limiting example, each of the auxiliary RFFE buses can be configured to support up to fourteen RFFE slaves. Thus, by bridging the RFFE bus with multiple auxiliary RFFE buses using the RFFE bus hub circuit, it may be possible to support more than fifteen RFFE slaves without adding an additional RFFE bus. As a result, it may be possible to reduce pin count requirement for an RFFE master and/or enable flexible RFFE bus deployment in an RFFE apparatus.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: July 7, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala
  • Patent number: 10700732
    Abstract: Systems and methods relating to improving transmit (TX) port to receive (RX) port isolation of a duplexer or multiplexer are disclosed. In some embodiments, a system includes a duplexer or multiplexer having a transmit port, a receive port, and an antenna port. The system further includes a leakage cancellation subsystem adapted to cancel a leakage signal from the TX port of the duplexer or multiplexer to the RX port of the duplexer or multiplexer across a desired cancellation bandwidth. The leakage cancellation subsystem compensates for variation of the leakage signal across the desired cancellation bandwidth, thereby improving TX port to RX port isolation over conventional systems.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: June 30, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Gernot Fattinger
  • Patent number: 10698847
    Abstract: This disclosure relates generally to bus interface systems for mobile user devices. In one embodiment, the bus interface system includes a first bus interface subsystem that operates in accordance with a one wire bus protocol, a second bus interface subsystem that operates in accordance with a Mobile Industry Processor Interface (MIPI) radio frequency front end (RFFE) bus protocol, and a translation bus controller that translates commands between the first bus interface subsystem and the second bus interface system. The translation bus controller is configured to implement cross over bus operations between a master bus controller that operates in accordance with in the one wire bus protocol and a slave bus controller in the second bus interface system. In this manner, the translation bus allows the master bus controller to be the master of different bus systems that operate in accordance with different bus protocols.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: June 30, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala
  • Patent number: 10692645
    Abstract: A coupled inductor structure includes a first three-dimensional inductor structure and a second three-dimensional folded inductor structure. At least a portion of the first three-dimensional folded inductor structure is located within a volume bounded by the second three-dimensional folded inductor structure. By nesting the first three-dimensional folded inductor structure within the second three-dimensional folded inductor structure, a variety of coupling factors can be achieved while minimizing the size of the coupled inductor structure.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 23, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Marcus Granger-Jones, Baker Scott
  • Patent number: 10693245
    Abstract: Spatial power-combining devices and antenna assemblies for spatial power-combining devices are disclosed. A spatial power-combining device may include an input coaxial waveguide section, an output coaxial waveguide section, and a center waveguide section. The center waveguide section may include an input center waveguide section, an output center waveguide section, and a core section. The core section may form an integral single component with an input inner housing of the input center waveguide section and an output inner housing of the output center waveguide section. Alternatively, the core section may be attached to the input inner housing and the output inner housing. The plurality of amplifiers may be registered with the core section. Antenna assemblies may include antennas with signal and ground conductors that are separated by air. Representative spatial power-combining devices may be designed with high efficiency, high or low frequency ranges, ultra-wide bandwidth operation, and high output power.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: June 23, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Ankush Mohan
  • Patent number: 10693420
    Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 23, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
  • Patent number: 10686485
    Abstract: A high isolation duplexer/quasi circulator with two quadrature couplers is disclosed. Isolation between a transmit (TX) port and receive (RX) port of the quasi circulator is improved through use of two quadrature couplers. The quadrature couplers are coupled such that a first TX-RX signal path (from the TX port to the RX port) is shifted at or near 180 degrees from a second TX-RX signal path. These paths cancel each other to provide a high level of isolation between the TX port and the RX port. There are two signal paths between an antenna (ANT) port and the quadrature couplers for both TX signals and RX signals. A phase shift circuit is coupled to the ANT port of one or both duplexers such that the signals passing through the quadrature couplers to the ANT port are combined substantially in phase.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: June 16, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Kelly M. Lear, Jeffrey D. Galipeau
  • Patent number: 10680559
    Abstract: An envelope tracking (ET) system is provided. The ET amplifies a radio frequency (RF) signal correspond to an amplitude bandwidth exceeding a voltage modulation bandwidth limitation of the ET system. The ET system compresses the amplitude bandwidth to match the voltage modulation bandwidth of the ET system. More specifically, the ET system compresses a predefined voltage waveform, which tracks time-variant amplitudes of a digital form of the RF signal, to generate a modified voltage waveform at a reduced bandwidth. To ensure that signal distortion(s) resulted from the bandwidth compression can be corrected, the ET system nonlinearly modifies predefined amplitude(s) of the predefined voltage waveform to generate modified amplitude(s) of the modified voltage waveform that is never less than the predefined amplitude(s) of the predefined voltage waveform. As such, the ET system can amplify the RF signal with improved linearity and efficiency, without degrading spectral performance of the RF signal.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Andrew F. Folkmann
  • Patent number: 10680565
    Abstract: A power amplifier system is disclosed. The power amplifier system includes a power amplifier having a first signal input and a first signal output and a main bias circuitry configured to provide a first portion of a first bias signal to the power amplifier through a first bias output coupled to the first signal input. Further included is peak bias circuitry that is configured to provide a second portion of the first bias signal to the power amplifier through a second bias output coupled to the first signal input, wherein the first portion of the first bias signal is greater than the second portion of the first bias signal over a first input power range and the second portion of the first bias signal is greater than the first portion of the first bias signal over a second input power range that is greater than the first input power range.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, Hideya Oshima, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 10676348
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes redistribution interconnects that connect the first device layer to package contacts on a bottom surface of the multilayer redistribution structure. Herein, the connections between the redistribution interconnects and the first device layer are solder-free. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond
  • Patent number: 10679918
    Abstract: The present disclosure relates to a packaging process to enhance thermal and electrical performance of a wafer-level package. The wafer-level package with enhanced performance includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes package contacts on a bottom surface of the multilayer redistribution structure and redistribution interconnects connecting the first device layer to the package contacts. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define a cavity within the first mold compound and over the first thinned die. The second mold compound fills the cavity and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jan Edward Vandemeer, Jonathan Hale Hammond, Merrill Albert Hatcher, Jr., Jon Chadwick
  • Patent number: 10680556
    Abstract: A radio frequency (RF) front-end circuit is provided. A power management circuit is configured to output a first modulated voltage, a second modulated voltage, a first bias voltage, and a second bias voltage via a first voltage port(s), a second voltage port(s), a first bias voltage port(s), and a second bias voltage port(s), respectively. An amplifier circuit(s) is configured to amplify an RF signal based on a selected modulated voltage and a selected bias voltage outputted by a selected voltage port and a selected bias voltage port, respectively. The power management circuit can be controlled to dynamically increase the selected bias voltage at the selected bias voltage port in case the selected bias voltage drops below a defined bias voltage threshold. As such, it may be possible to maintain the selected bias voltage at a desirable level, thus enabling the amplifier circuit(s) to operate with improved linearity and efficiency.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10673472
    Abstract: A radio frequency (RF) multiplexer includes, for example, a common port, a first port for a first frequency band, a second port for a second frequency band, and a third port for a third frequency band. The RF multiplexer also includes, for example, a first quadrature hybrid coupler (QHC), a second QHC and a third QHC. A coupling of the first QHC, a first pair of filters, and the second QHC separates the first frequency band and the second frequency band from the common port to the first port and to the second port, respectively. A coupling of the first QHC, a second pair of filters, and the third QHC separates the first frequency band and the third frequency band from the common port to the first port and to the third port respectively.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: June 2, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Sam Mandegaran
  • Patent number: 10673471
    Abstract: A radio frequency (RF) multiplexer includes, for example, a common port, a first port for a first frequency band, a second port for a second frequency band, and a third port for a third frequency band. The RF multiplexer also includes, for example, a first quadrature hybrid coupler (QHC), a second QHC and a third QHC. A coupling of the first QHC, a first pair of filters, and the second QHC separates the first frequency band and the second frequency band from the common port to the first port and to the second port, respectively. A coupling of the first QHC, a second pair of filters, and the third QHC separates the first frequency band and the third frequency band from the common port to the first port and to the third port respectively.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: June 2, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Sam Mandegaran
  • Patent number: 10666202
    Abstract: An envelope tracking (ET) power management circuit is provided. The ET power management circuit includes an amplifier circuit(s) configured to output a radio frequency (RF) signal at a defined power level corresponding to a direct current, an alternating current, and an ET modulated voltage received by the amplifier circuit(s). The ET power management circuit can operate in a high-power ET mode when the defined power level exceeds a defined power level threshold and the RF signal is modulated to include no more than a defined number of resource blocks. The ET power management includes two ET tracker circuitries each generating a respective ET modulated voltage and two charge pump circuitries each generating a respective current. In the high-power ET mode, both charge pump circuitries are activated to each provide a reduced current to the amplifier circuit, thus helping to reduce a footprint and cost of the ET power management circuit.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: May 26, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 10666311
    Abstract: A multi-amplifier power management circuit and related apparatus are provided. The multi-amplifier power management circuit includes a transceiver circuit and an amplifier circuit, which are physically separated (e.g., in different integrated circuits). The amplifier circuit receives a radio frequency (RF) signal from the transceiver circuit and splits the RF signal into a number of RF transmit signals. The amplifier circuit includes a number of amplifiers configured to amplify the RF transmit signals. In examples discussed herein, the multi-amplifier power management circuit can be provided in an apparatus (e.g., a mobile communication device). The amplifier circuit may be collocated with a number of transmit antennas closer to an edge(s) of the apparatus. By collocating the amplifier circuit and the transmit antennas closer to the edge(s) of the apparatus, it may be possible to reduce RF signal radiation distance, thus helping to improve radiation efficiency and reduce heat dissipation in the apparatus.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: May 26, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10666225
    Abstract: An acoustic impedance transformation circuit and related apparatus are provided. In aspects discussed herein, the acoustic impedance transformation circuit can be configured to transform an input impedance into an output impedance higher than the input impedance. In this regard, the acoustic impedance transformation circuit can be provided in an apparatus to enable impedance matching between two electrical circuits. As a result, it may be possible to reduce signal reflection resulting from impedance mismatch between the two circuits, thus helping to improve performance of the apparatus.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: May 26, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10667102
    Abstract: A data detector is disclosed. The data detector includes a memory and processing circuitry interfaced with the memory. The processing circuitry is configured to receive a digital signal representative of a radio frequency signal in the digital domain. The processing circuitry generates a frequency offset estimate derived from the digital signal and outputs the frequency offset to the memory and in turn receives output from the memory a set of coefficients that corresponds to the frequency offset estimate. The processing circuitry then performs a complex correlation between the digital signal and the set of coefficients to determine a maximum peak correlation.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 26, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Andrew Fort