Patents Assigned to Qorvo US, Inc.
  • Patent number: 11031909
    Abstract: A group delay optimization circuit is provided. The group delay optimization circuit receives a first signal (e.g., a voltage signal) and a second signal (e.g., a current signal). Notably, the first signal and the second signal may experience different group delays that can cause the first signal and the second signal to misalign at an amplifier circuit configured to amplify a radio frequency (RF) signal. The group delay optimization circuit is configured to determine a statistical indicator indicative of a group delay offset between the first signal and the second signal. Accordingly, the group delay optimization circuit may minimize the group delay offset by reducing the statistical indicator to below a defined threshold in one or more group delay optimization cycles. As a result, it may be possible to pre-compensate for the group delay offset in the RF signal, thus helping to improve efficiency and linearity of the amplifier circuit.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: June 8, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11031911
    Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC is configured to generate an ET voltage based on a supply voltage(s) and provide the ET voltage to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s). Notably, the RF signal(s) may be modulated in different modulation bandwidths and the amplifier circuit(s) may correspond to different load-line impedances. Accordingly, the ETIC may need to adapt the ET voltage such that the ETIC and the amplifier circuit(s) can operate at higher efficiencies. In examples discussed herein, the ETIC is configured to determine a time-variant peak of the ET voltage and adjust the supply voltage(s) accordingly. As a result, it may be possible to improve operating efficiency of the ETIC in face of a wide range of bandwidth and/or load-line requirements.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: June 8, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11025458
    Abstract: An adaptive frequency equalizer for wide modulation bandwidth envelope tracking (ET) is provided. In this regard, an ET integrated circuit (ETIC) provides an ET power signal for one or more power amplifiers (PAs). A voltage error can occur in the ET power signal due to variable impedance sources, such as a variable load impedance at the PA and a variable trace inductance between the ETIC and the PA. The adaptive frequency equalizer disclosed herein works to adaptively correct for such voltage errors to provide improved overall power signal tracking at the PA, especially where there is a large trace inductance from the ETIC being located several centimeters (cm) away from the PA. Thus, embodiments of the adaptive frequency equalizer enhance ET performance for radio frequency (RF) systems having a modulation bandwidth of 100 megahertz (MHz) or above.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11025224
    Abstract: RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jean-Frederic Chiron, Marcus Granger-Jones, Andrew F. Folkmann, Robert Aigner
  • Patent number: 11024479
    Abstract: A passive wireless switch circuit and related apparatus are provided. In examples discussed herein, an apparatus includes a smaller number of voltage circuits configured to control a larger number of microelectromechanical systems (MEMS) switches. The voltage circuits passively generate a number of constant voltages based on a number of radio frequency (RF) signals to collectively identify each of the MEMS switches. A decoder circuit decodes the constant voltages to identify a selected MEMS switch and provides a selected constant voltage higher than a defined threshold voltage to close the selected MEMS switch. As such, it may be possible to eliminate active components and/or circuits from the passive wireless switch circuit, thus helping to reduce leakage and power consumption. It may be further possible to reduce conductive traces between the voltage circuits and the MEMS switches, thus helping to reduce routing complexity and footprint of the apparatus.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11024541
    Abstract: A process for molding a back side wafer singulation guide is disclosed. Structures for heat mitigation include an overmold formed over a contact surface of a device layer of a wafer, covering bump structures. The overmold and bump structures are thinned and planarized, and the overmold provides an underfill to increase interconnect reliability of a semiconductor die in a flip chip bonded package. However, visibility of singulation guides on the contact surface is obstructed. A channel is formed extending through the device layer and into the handle layer, and is filled with the overmold. The handle layer is replaced with a thermally-conductive molding layer formed on the back side for dissipating heat generated by semiconductor devices. The thermally-conductive handle is thinned until the overmold in the channel beneath the device layer is exposed. The exposed overmold provides a visible back side singulation guide for singulating the wafer.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Neftali Salazar, Rommel Quintero, Thomas Scott Morris
  • Patent number: 11018702
    Abstract: A multi-radio access technology (RAT) circuit is provided. The multi-RAT circuit includes a radio frequency (RF) circuit(s) coupled to an interconnect medium(s). The RF circuit(s) includes a power head circuit configured to receive a local oscillation (LO) pilot and an RF signal via the interconnect medium(s). The power head circuit generates an LO signal based on the LO pilot without requiring a synthesizer. Accordingly, the power head circuit modulates the RF signal to a carrier band based on the LO signal for transmission in a millimeter wave (mmWave) spectrum. By generating the LO signal and modulating the RF signal to the carrier band in the power head circuit, it may be possible to minimize attenuation and/or interference to the RF signal. Further, it may also be possible to share the interconnect medium(s) with existing RATs, thus helping to reduce size, power, and cost impacts associated with supporting an mmWave RAT.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Dirk Robert Walter Leipold, Alexander Wayne Hietala, Baker Scott
  • Patent number: 11018638
    Abstract: A multimode envelope tracking (ET) circuit and related apparatus is provided. The multimode ET circuit is configured to provide an ET voltage(s) to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) that may correspond to a wider range of modulation bandwidth. In this regard, the multimode ET circuit is configured to switch dynamically and opportunistically between different operation modes based on the modulation bandwidth of the RF signal(s). In examples discussed herein, the multimode ET circuit is configured to support a single amplifier circuit in a high-modulation-bandwidth mode and an additional amplifier circuit(s) in a mid-modulation-bandwidth mode and a low-modulation-bandwidth mode.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11018627
    Abstract: A multi-bandwidth envelope tracking (ET) integrated circuit (IC) (ETIC) and related apparatus are provided. In a non-limiting example, the multi-bandwidth ETIC is coupled to an amplifier circuit(s) configured to amplify a radio frequency (RF) signal corresponding to a wide range of modulation bandwidth (e.g., from less than 90 KHz to over 40 MHz). In this regard, the multi-bandwidth ETIC is configured to generate different ET voltages based on the modulation bandwidth of the RF signal. By generating the ET voltages based on the modulation bandwidth of the RF signal, it may be possible to optimize operating efficiency of the amplifier circuit(s). As a result, it may be possible to improve power consumption and reduce heat dissipation in an apparatus employing the multi-bandwidth ETIC, thus making it possible to provide the multi-bandwidth ETIC in a wearable device.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11018649
    Abstract: Compensation of on-die inductive parasitics in ladder filters through negative mutual inductance between ground inductors is disclosed herein. An exemplary ladder filter includes a primary arm of series resonators and two or more shunt resonator arms connecting nodes between the series resonators to ground. The resonators of the ladder filter are disposed over a semiconductor substrate, to form a circuit die. Constructed ladder filter dice may fail to achieve design filter rejection due to inductive parasitics (e.g., undesired magnetic induction between components). A first shunt arm and a second shunt arm are provided with mutual negatively coupled inductors in order to compensate for these parasitics and improve filter performance.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Yazid Yusuf, Mudar Al-Joumayly, Gernot Fattinger
  • Patent number: 11007526
    Abstract: A cartridge for collecting sample material may include a cartridge body, a filter, a fluid reservoir, and a fluid drive port. The cartridge body may define a capless sample well port configured to receive a sample material and a fluidic channel in fluid communication with the capless sample well port. The filter may be positioned between the capless sample well port and the fluidic channel. The fluidic channel may extend between the capless sample well port and the fluid reservoir. The fluid drive port may be in fluid communication with the fluidic channel. The fluid drive port may be configured to be operably connected to a pressure source such that a pressure is applied within the fluidic channel to direct the sample material towards the fluid reservoir.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: May 18, 2021
    Assignee: Qorvo US, Inc.
    Inventor: James Russell Webster
  • Patent number: 11011498
    Abstract: The present disclosure relates to a microelectronics package with vertically stacked flip-chip dies, and a process for making the same. The disclosed microelectronics package includes a module board, a first thinned flip-chip die with a through-die via, a second flip-chip die with a package contact at the bottom, and a mold compound. Herein, a top portion of the through-die via is exposed at top of the first thinned flip-chip die. The first thinned flip-chip die and the mold compound reside over the module substrate. The mold compound surrounds the first thinned flip-chip die and extends above the first thinned flip-chip die to define an opening. The second flip-chip die, which has a smaller plane size than the first thinned flip-chip die, resides within the opening and is stacked with the first thinned flip-chip die by coupling the package contact to the exposed top portion of the through-die via.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: May 18, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Robert Aigner, Gernot Fattinger, Dirk Robert Walter Leipold, George Maxim, Baker Scott, Merrill Albert Hatcher, Jr., Jon Chadwick
  • Patent number: 11004853
    Abstract: The present disclosure relates to a bulk complementary-metal-oxide-semiconductor (CMOS) device including a device substrate, a thinned device die with a device region over the device substrate, a first mold compound, and a second mold compound. The device region includes a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion. The first mold compound resides over the device substrate, surrounds the thinned device die, and extends vertically beyond the thinned device die to define an opening over the thinned device die and within the first mold compound. The second mold compound fills the opening and directly connects the thinned device die. Herein, a silicon material with a resistivity between 5 Ohm-cm and 30000 Ohm-cm does not exist between the second mold compound and the thinned device die.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Michael Carroll, Dirk Robert Walter Leipold, George Maxim, Baker Scott
  • Patent number: 11005450
    Abstract: A filter circuit includes a first input node and a second input node for receiving an input signal, and a first output node and a second output node for providing an output signal. A first series acoustic resonator is coupled in series between the first input node and the first output node. At least one coupled resonator filter (CRF) includes first and second transducers, which may be acoustically coupled to one another. The first transducer has a first electrode coupled to the first input node, a second electrode coupled to the second input node, and a first piezoelectric layer between the first electrode and the second electrode. A second transducer has a third electrode coupled to the first output node, a fourth electrode coupled to the second output node, and a second piezoelectric layer between the third electrode and the fourth electrode.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Robert Aigner
  • Patent number: 11005437
    Abstract: Spatial power-combining devices and, more particularly, spatial power-combining devices with improved isolation are disclosed. Spatial power-combining devices are disclosed that include a thin film resistor that is configured to provide improved signal isolation. The thin film resistor may be arranged within one or more amplifier assemblies of the spatial power-combining device to reduce signal leakage between the amplifier assemblies. The thin film resistor may be formed on a carrier substrate or the thin film resistor may supported by a surface of an amplifier assembly without a carrier substrate. Spatial power-combining devices are disclosed that include a radial arrangement of amplifier assemblies, and each amplifier assembly includes an antenna structure and a thin film resistor.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Soack Dae Yoon, Ankush Mohan, Dan Denninghoff
  • Patent number: 11005181
    Abstract: A multi-layer antenna assembly and related antenna array are provided. In one aspect, a multi-layer antenna assembly includes a first radiating layer(s) and a second radiating layer(s). The second radiating layer(s) is provided below and in parallel to the first radiating layer(s). The second radiating layer(s) overlaps at least partially with the first radiating layer(s). In this regard, an electromagnetic wave radiated vertically from the second radiating layer(s) is horizontally guided by an overlapping portion of the first radiating layer(s). In another aspect, an antenna array can be configured to include a number of multi-layer antenna assemblies to enable radio frequency (RF) beamforming. By employing the multi-layer antenna assemblies in the antenna array, it may be possible to flexibly and naturally steer an RF beam in a desired direction(s) without causing oversized side lobes, thus helping to improve power efficiency and performance of the antenna array.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Nadim Khlat, Baker Scott
  • Patent number: 10998900
    Abstract: A radio frequency switch having an N number of switch cells coupled in series is disclosed. Each of the switch cells includes a field-effect transistor (FET), wherein a source of switch cell 1 is coupled to a first port, a drain of switch cell N is coupled to a second port, and a drain of switch cell X is coupled to a source of switch cell X+1 for switch cell 1 through switch cell N. A first diode stack has a first anode coupled to the body of switch cell X and a first cathode coupled to a drain of switch cell X+1 for switch cell 1 through switch cell N?1, and a second diode stack has a second anode coupled to the body of switch cell X and a second cathode coupled to the source of switch cell X?1 for switch cell 2 through switch cell N.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: May 4, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Hideya Oshima, Dirk Robert Walter Leipold
  • Patent number: 10998407
    Abstract: The present disclosure relates to a Gallium-Nitride (GaN) based module, which includes a module substrate, a thinned switch die residing over the module substrate, a first mold compound, and a second mold compound. The thinned switch die includes an electrode region, a number of switch interconnects extending from a bottom surface of the electrode region to the module substrate, an aluminium gallium nitride (AlGaN) barrier layer over a top surface of the electrode region, a GaN buffer layer over the AlGaN barrier layer, and a lateral two-dimensional electron gas (2DEG) layer realized at a heterojunction of the AlGaN barrier layer and the GaN buffer layer. The first mold compound resides over the module substrate, surrounds the thinned switch die, and extends above a top surface of the thinned switch die to form an opening over the top surface of the thinned switch die. The second mold compound fills the opening.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: May 4, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Michael Carroll
  • Patent number: 10998859
    Abstract: A dual-input envelope tracking (ET) integrated circuit (ETIC) and related apparatus are provided. The dual-input ETIC includes an ET voltage circuit configured to generate an ET voltage based on an ET voltage and a first set of parameters. The ET voltage may be provided to a power amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) in an ET power range. The dual-input ETIC also includes a target voltage processing circuit configured to generate the ET target voltage based on a second set of parameters. The dual-input ETIC further includes a control circuit configured to determine the first set of parameters and the second set parameters based at least on the ET power range of the power amplifier circuit(s). As such, it may be possible to optimize the dual-input ETIC performance in a wide-range of modulation bandwidth, thus helping to improve linearity and efficiency of the power amplifier circuit(s).
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 4, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10992270
    Abstract: A power amplifier apparatus supporting reverse intermodulation product (rIMD) cancellation is provided. The power amplifier apparatus includes an amplifier circuit configured to amplify and output a radio frequency (RF) signal for transmission via an antenna port. The antenna port may receive a reverse interference signal, which may interfere with the RF signal to create a rIMD(s) that can fall within an RF receive band(s). A reverse coupling circuit is provided in the power amplifier apparatus to generate an interference cancellation signal based on the reverse interference signal. The amplifier circuit is configured to amplify the interference cancellation signal and the RF signal to create an intermodulation product(s) to suppress the rIMD(s) to a determined threshold. By suppressing the rIMD(s) in the power amplifier apparatus, it is possible to support concurrent transmissions and receptions in a number of RF spectrums while in compliance with stringent regulatory spurious emissions (SEM) requirements.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 27, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Marcus Granger-Jones, Dirk Robert Walter Leipold, Nadim Khlat