Patents Assigned to Qorvo US, Inc.
  • Patent number: 11943019
    Abstract: Systems and methods for low-power multi-antenna synchronization are disclosed. In one aspect, a computing device, such as an Internet of Things (IoT) computing device, may include a transceiver operating using BLUETOOTH LOW ENERGY (BLE) with multiple antennas. In an exemplary aspect, each of a plurality of antennas is coupled to a respective edge detection circuit. When an incoming signal is detected by one of the edge detection circuits, circuitry associated with others of the multiple antennas may be placed in a low-power mode while circuitry associated with the detecting edge detection circuit attempts to synchronize with the incoming signal to see if the incoming signal is a signal of interest.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: March 26, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Andrew Fort
  • Patent number: 11942389
    Abstract: The present disclosure relates to a thermally enhanced package, which includes a carrier, a thinned die over the carrier, a mold compound, and a heat extractor. The thinned die includes a device layer over the carrier and a dielectric layer over the device layer. The mold compound resides over the carrier, surrounds the thinned die, and extends beyond a top surface of the thinned die to define an opening within the mold compound and over the thinned die. The top surface of the thinned die is at a bottom of the opening. At least a portion of the heat extractor is inserted into the opening and in thermal contact with the thinned die. Herein the heat extractor is formed of a metal or an alloy.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: March 26, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, George Maxim
  • Patent number: 11942899
    Abstract: Envelope tracking (ET) voltage correction in a transmission circuit is provided. The transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant modulation vector and the power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit. Herein, the transceiver circuit is configured to apply a complex filter(s) to the time-variant modulation vector and/or the RF signal(s) to compensate for a voltage distortion filter created across a modulation bandwidth of the RF signal(s) by coupling the power amplifier circuit with the RF front-end circuit.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: March 26, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, James M. Retz
  • Patent number: 11942391
    Abstract: The present disclosure relates to a system in package having a chiplet with a first substrate and a first die deposed over the first substrate, a second die, a second substrate that the chiplet and the second die are deposed over, and a heatsink spreader deposed over the chiplet and the second die. Herein, the first substrate includes layered-cake shaped heatsink stanchions that are coupled to the first die, and the second substrate includes layered-cake shaped heatsink stanchions that are coupled to the chiplet and the second die. As such, heat generated by the first die can be dissipated by the heatsink stanchions within the first and second substrates, and heat generated by the second die can be dissipated by the heatsink stanchions within the second substrate. Furthermore, the heat generated by the first die and the second die can be dissipated by the heatsink spreader above them.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Kelly M. Lear, Jeffrey Miller, Mihir Roy, Christine Blair
  • Patent number: 11936341
    Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: March 19, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11929300
    Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: March 12, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
  • Patent number: 11929713
    Abstract: Maximum voltage detection in a power management circuit is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. The voltage processing circuit includes a maximum signal detector circuit configured to generate a windowed time-variant target voltage that is higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. In this regard, the windowed time-variant target voltage can tolerate a certain amount of group delay within the group delay tolerance window(s).
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: March 12, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Marcus Granger-Jones
  • Patent number: 11929712
    Abstract: A delay-compensating power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC) configured to generate a time-variant voltage(s) based on a time-variant target voltage(s) for amplifying an analog signal(s) associated with a time-variant power envelope(s). A voltage processing circuit is provided in the power management circuit to determine a temporal offset, which can be positive or negative, between the time-variant power envelope(s) and the time-variant target voltage(s). Accordingly, the voltage processing circuit modifies the time-variant target voltage(s) to substantially reduce the determined temporal offset and thereby realign the time-variant target voltage(s) with the time-variant power envelope(s). By realigning the time variant target voltage(s) with the time-variant power envelope(s), it is possible to align the time-variant voltage(s) with the time-variant power envelope(s) to reduce distortions (e.g.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: March 12, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11929720
    Abstract: A difference between subsequent measures of a second signal when a first signal crosses a threshold value can be used to estimate a delay between the first and second signal. The delay can be used to compensate for delays between an envelope power supply signal and a radio frequency (RF) input signal.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 12, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11923806
    Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11923238
    Abstract: The present disclosure relates to a radio frequency device and a process for making the same. According to the process, a precursor wafer, which includes device regions, individual interfacial layers formed of SiGe, and a silicon handle substrate, is first provided. Each individual interfacial layer is over an active layer of a corresponding device region, and the silicon handle substrate is over each individual interfacial layer. A first bonding layer is formed underneath the precursor wafer. The precursor wafer is then attached to a support carrier with a second bonding layer. The first bonding layer and the second bonding layer merge to form a bonding structure between the precursor wafer and the support carrier. Next, the silicon handle substrate is removed from the precursor wafer to provide an etched wafer, and a first mold compound is applied to the etched wafer to provide a mold device wafer.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Robert Aigner
  • Patent number: 11923313
    Abstract: The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The first mold compound resides over the active layer without silicon crystal, which has no germanium content, in between. The multilayer redistribution structure includes redistribution interconnections and a number of bump structures that are at bottom of the multilayer redistribution structure and electrically coupled to the mold device die via the redistribution interconnections.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Michael Carroll
  • Patent number: 11923827
    Abstract: Disclosed is a Bulk Acoustic Wave (BAW) assist filter structure with a BAW resonator stacked onto an integrated passive device (IPD). In exemplary aspects disclosed herein, the BAW filter structure includes a transducer with electrodes and a piezoelectric layer between the electrodes. The IPD is electrically coupled to the BAW resonator and provides a high frequency of operation. In such a configuration, the BAW assist filter structure has a low insertion loss and mitigates electrical length parasitic loss due to the close electrically proximity of the BAW resonator stacked onto the IPD. Further, the BAW assist filter structure is able to filter high frequencies and provides improved filter performance and greater flexibility in design of a filter transfer function.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Jeffery D. Galipeau, Kelly M. Lear
  • Patent number: 11923812
    Abstract: A delay-compensating power management integrated circuit (PMIC) is provided. The PMIC includes a target voltage circuit configured to generate a target voltage that is utilized for generating a time-variant voltage to amplify an analog signal. The target voltage is generated based on a time-variant envelope of the analog signal but lags behind the time-variant envelope by a temporal delay(s) due to an inherent processing delay in the target voltage circuit. In this regard, a voltage processing circuit is provided in the target voltage circuit to generate a modified target voltage that is time-adjusted relative to the target voltage to substantially offset the temporal delay(s). By generating the time-variant voltage based on the modified target voltage, the time-variant voltage can be better aligned with the time-variant envelope of the analog signal, thus helping to reduce amplitude distortion when amplifying the analog signal.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11916541
    Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to pass a first passband and attenuate frequencies outside the first passband, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter, wherein the second AW filter is configured to pass a second passband that is spaced from the first passband to minimize interference between first bandpass and the second bandpass while attenuating frequencies outside the second passband.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: February 27, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Patent number: 11906992
    Abstract: A distributed power management circuit is provided. In embodiments disclosed herein, the distributed power management circuit can achieve multiple performance enhancing objectives simultaneously. More specifically, the distributed power management circuit can be configured to switch a modulated voltage from one voltage level to another within a very short switching window, reduce in-rush current required for switching the modulated voltage, and minimize a ripple in the modulated voltage, all at same time. As a result, the distributed power management circuit can be provided in a wireless device (e.g., smartphone) to enable very fast voltage switching across a wide modulation bandwidth (e.g., 400 MHz) with reduced power consumption and voltage distortion.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: February 20, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11909385
    Abstract: A fast-switching power management circuit is provided. The fast-switching power management circuit is configured to generate an output voltage(s) based on an output voltage target that may change on a per-frame or per-symbol basis. In embodiments disclosed herein, the fast-switching power management circuit can be configured to adapt (increase or decrease) the output voltage(s) within a very short switching interval (e.g., less than one microsecond). As a result, when the fast-switching power management circuit is employed in a wireless communication apparatus to supply the output voltage(s) to a power amplifier circuit(s), the fast-switching power management circuit can quickly adapt the output voltage(s) to help improve operating efficiency and linearity of the power amplifier circuit(s).
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: February 20, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11908808
    Abstract: A monolithic microwave integrated circuit (MMIC) with embedded transmission line (ETL) ground shielding is provided. In an exemplary aspect, an ETL MMIC according to this disclosure includes a MMIC substrate having an active side, an ETL dielectric layer covering the active side, and a topside ground plane over the ETL dielectric layer. The active side includes one or more transmission lines or other components which may undesirably couple to metal signal lines (e.g., package metal interconnects) in an external circuit assembly. The topside ground plane in the ETL MMIC provides shielding to reduce such electromagnetic coupling. The topside ground plane can also facilitate improved thermal paths for heat dissipation, such as through a redistribution layer (RDL) to a next higher assembly (NHA) and/or through a backside ground plane of the MMIC substrate.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: February 20, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Andrew Arthur Ketterson
  • Patent number: 11901620
    Abstract: A directional coupler for co-located antennas contemplates coupling a first transceiver to an antenna through a directional coupler. A second transceiver is also coupled to the antenna using the directional coupler. When the first transceiver is transmitting, the second transceiver may receive through the antenna without suffering interference from signals transmitted by the first transceiver. To facilitate signal handling, a tunable or variable load may also be coupled to the directional coupler.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: February 13, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Yilong Shen
  • Patent number: 11894767
    Abstract: A power management circuit operable to reduce rush current is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying a radio frequency (RF) signal(s). Notably, a variation in the time-variant voltage(s) can cause a rush current that is proportionally related to the variation of the time-variant voltage(s). To reduce the rush current, the power management circuit is configured to maintain the time-variant voltage(s) at a non-zero standby voltage level when the power amplifier(s) is inactive. When the power amplifier(s) becomes active and the time-variant voltage(s) needs to be raised or reduced from the non-zero standby voltage level, the rush current will be smaller as a result of reduced variation in the time-variant voltage(s). As such, it is possible to prolong the battery life in a device employing the power management circuit.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: February 6, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay