Abstract: Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.

Abstract: A transformer balun for high rejection unbalanced lattice filters includes two symmetrical coils separated by a shielding element. In a further exemplary aspect, the transformer may include a conductor, which may be a third coil that operates with a capacitor to form a resonant circuit that enhances mutual coupling. Using either of the exemplary transformers provides improved performance in the passband while concurrently providing out-of-band rejection at levels exceeding seventy decibels (70 dB).

Abstract: An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce the footprint and improve heat dissipation of the ET power amplifier apparatus.

Abstract: Described herein is a ruggedized microelectromechanical (“MEMS”) force sensor including both piezoresistive and piezoelectric sensing elements and integrated with complementary metal-oxide-semiconductor (“CMOS”) circuitry on the same chip. The sensor employs piezoresistive strain gauges for static force and piezoelectric strain gauges for dynamic changes in force. Both piezoresistive and piezoelectric sensing elements are electrically connected to integrated circuits provided on the same substrate as the sensing elements. The integrated circuits can be configured to amplify, digitize, calibrate, store, and/or communicate force values electrical terminals to external circuitry.

Abstract: An acoustic filter circuit for noise suppression outside resonance frequency is provided. The acoustic filter circuit includes a first filter branch and a second filter branch. The first filter branch and the second filter branch are both configured to resonate at a resonance frequency to pass a radio frequency (RF) signal, but in opposite phases. The acoustic filter circuit also includes a shunt circuit coupled between the first filter branch and the second filter branch. As discussed in various embodiments in the detailed description, the shunt circuit can be configured to protect the RF signal located inside the resonance frequency and suppress noises located outside the resonance frequency. As such, the acoustic filter circuit can provide improved noise rejection and reduce insertion loss.

Abstract: A radio frequency (RF) power detector is disclosed. The RF power detector includes an envelope detector having an RF signal terminal and a current mode terminal, wherein the envelope detector is configured to detect peak voltages of an RF signal at the RF signal terminal. Further included is a detector current mirror having a first mirror branch coupled to the current mode terminal and a second mirror branch configured to create a detector current that is proportional to a branch current through the first mirror branch in response to peak voltages detected by the envelope detector.

Abstract: A guided surface acoustic wave (SAW) device includes a substrate, a piezoelectric layer on the substrate, and a transducer on the piezoelectric layer. The substrate is silicon, and has a crystalline orientation defined by a first Euler angle (?), a second Euler angle (?), and a third Euler angle (?). The first Euler angle (?), the second Euler angle (?), and the third Euler angle (?) are chosen such that a velocity of wave propagation within the substrate is less than 6,000 m/s.

Abstract: A method of forming a microelectromechanical device wherein a beam of the microelectromechanical device may deviate from a resting to an engaged or disengaged position through electrical biasing. The microelectromechanical device comprises a beam disposed above a first RF conductor and a second RF conductors. The microelectromechanical device further comprises at least a center stack, a first RF stack, a second RF stack, a first stack formed on a first base layer, and a second stack formed on a second base layer, each stack disposed between the beam and the first and second RF conductors. The beam is configured to deflect downward to first contact the first stack formed on the first base layer and the second stack formed on the second base layer simultaneously or the center stack, before contacting the first RF stack and the second RF stack simultaneously.

Abstract: A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.

Abstract: Guided Surface Acoustic Wave (SAW) devices with improved quartz orientations are disclosed. A guided SAW device includes a quartz carrier substrate, a piezoelectric layer on a surface of the quartz carrier substrate, and at least one interdigitated transducer on a surface of the piezoelectric layer opposite the quartz carrier substrate. The quartz carrier substrate includes an orientation that provides improved performance parameters for the SAW device, including electromechanical coupling factor, resonator quality factor, temperature coefficient of frequency, and delta temperature coefficient of frequency.

Abstract: A wide-bandwidth resonant circuit is provided. In an embodiment disclosed herein, the wide-bandwidth resonant circuit includes a positive resonant circuit coupled in parallel to a negative resonant circuit. The positive resonant circuit and the negative resonant circuit can be configured to collectively exhibit certain impedance characteristics across a wide bandwidth. As a result, it is possible to utilize the wide-bandwidth resonant circuit to support a variety of wide-bandwidth applications, such as in a wide-bandwidth signal filter circuit.

Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.

Abstract: An inverted group delay circuit is provided. The inverted group delay circuit can offset a group delay between a pair of signals. In a non-limiting example, the inverted group delay circuit can be configured to offset a group delay (e.g., negative group delay) between a time-variant voltage and a time-variant envelope of an analog signal. More specifically, the inverted group delay circuit can output an inverted time-variant voltage having an opposing phase and time-adjusted relative to the time-variant voltage to thereby offset the group delay between the time-variant voltage and the time-variant envelope. As such, the inverted group delay circuit can be provided in a power management integrated circuit (PMIC) to improve timing alignment between a time-variant voltage(s) and a time-variant analog signal(s) at a power amplifier(s), thus helping to reduce potential amplitude distortion when the analog signal(s) is amplified by the power amplifier(s).

Abstract: An average power tracking (APT) power management integrated circuit (PMIC) is provided. The APT PMIC is configured to generate an APT voltage to a power amplifier for amplifying a high modulation bandwidth (e.g., ?200 MHz) radio frequency (RF) signal. The APT PMIC includes a voltage amplifier configured to generate an initial APT voltage and an offset capacitor configured to raise the initial APT voltage by a modulated offset voltage. The APT PMIC can be configured to modulate the initial APT voltage and the modulated offset voltage concurrently based on a time-variant APT target voltage. As a result, the APT PMIC can adapt the APT voltage very quickly between different voltage levels, thus making it possible to amplify a high modulation bandwidth radio frequency (RF) signal for transmission in a fifth-generation (5G) communication system.

Abstract: An electrical arrangement for performing radio frequency isolation for microelectromechanical relay switches. A microelectromechanical relay switch comprises a beam configured to switch from a first position connected to an upper voltage source to a second position connected to a lower voltage source. The microelectromechanical relay switch further comprises at least one frequency isolation circuit or resistor disposed adjacent to the beam. The at least one frequency isolation circuit or resistor biases a direct current potential to allow for electrostatic actuation and further provides a path for transient electrical currents during switching.

Abstract: Bulk acoustic wave (BAW) resonators, and particularly top electrodes with step arrangements for BAW resonators are disclosed. Top electrodes on piezoelectric layers are disclosed that include a border (BO) region with a dual-step arrangement where an inner step and an outer step are formed with increasing heights toward peripheral edges of the top electrode. Dielectric spacer layers may be provided between the outer steps and the piezoelectric layer. Passivation layers are disclosed that extend over the top electrode either to peripheral edges of the piezoelectric layer or that are inset from peripheral edges of the piezoelectric layer. Piezoelectric layers may be arranged with reduced thickness portions in areas that are uncovered by top electrodes. BAW resonators as disclosed herein are provided with high quality factors and suppression of spurious modes while also providing weakened BO modes that are shifted farther away from passbands of such BAW resonators.

Abstract: Disclosed is a vehicle-mounted ranging system having a communication transceiver configured to wirelessly communicate with at least one external communication transceiver and a plurality of ultra-wideband (UWB) transceivers configured to transmit and receive ranging pulses to and from at least one external UWB transceiver associated with the at least one external communication transceiver. A controller is interfaced between the communication transceiver and the plurality of UWB transceivers. The controller is configured to communicate with the associated at least one external communication transceiver to schedule transmission of ranging pulses between the plurality of UWB transceivers and the at least one external UWB transceiver and to calculate ranges between each of the plurality of UWB transceivers and the at least one external UWB transceiver based upon time-of-arrival of ranging pulses transmitted between the plurality of UWB ranging transceivers and the at least one external UWB transceiver.

Abstract: Disclosed is envelope tracking circuitry having an envelope tracking integrated circuit (ETIC) coupled to a power supply to provide an envelope tracked power signal to a power amplifier (PA) with a filter equalizer configured to inject an error-correcting signal into the ETIC in response to equalizer settings. Further included is PA resistance estimator circuitry having a first peak detector circuit configured to capture within a window first peaks associated with a sense current generated by the ETIC, a second peak detector circuit configured to capture within the window second peaks associated with a scaled supply voltage corresponding to the envelope tracked power signal, comparator circuitry configured to receive the first peaks and receive the second peaks and generate an estimation of PA resistance, and an equalizer settings correction circuit configured to receive the estimation of PA resistance and update the equalizer settings in response to the estimation of PA resistance.

Abstract: A device includes a die and an interdigital transducer on the die. The interdigital transducer includes a first bus bar, a second bus bar, and a number of electrode fingers. The first bus bar is parallel to the second bus bar. The electrode fingers are divided into a first set of electrode fingers and a second set of electrode fingers. The first set of electrode fingers extend obliquely from the first bus bar towards the second bus bar. The second set of electrode fingers extend obliquely from the second bus bar towards the first bus bar, and are parallel to and interleaved with the first set of electrode fingers. By providing the electrode fingers oblique to the bus bars, spurious transverse modes may be suppressed while maintaining the quality factor, electromechanical coupling coefficient, and capacitance of the device.

Abstract: The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate resides over the top surface of the device region. Herein, silicon crystal does not exist within the transfer substrate or between the transfer substrate and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die.