Patents Assigned to Qorvo US, Inc.
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Patent number: 11929720Abstract: A difference between subsequent measures of a second signal when a first signal crosses a threshold value can be used to estimate a delay between the first and second signal. The delay can be used to compensate for delays between an envelope power supply signal and a radio frequency (RF) input signal.Type: GrantFiled: May 5, 2021Date of Patent: March 12, 2024Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11929713Abstract: Maximum voltage detection in a power management circuit is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. The voltage processing circuit includes a maximum signal detector circuit configured to generate a windowed time-variant target voltage that is higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. In this regard, the windowed time-variant target voltage can tolerate a certain amount of group delay within the group delay tolerance window(s).Type: GrantFiled: August 19, 2021Date of Patent: March 12, 2024Assignee: Qorvo US, Inc.Inventor: Marcus Granger-Jones
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Patent number: 11923313Abstract: The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The first mold compound resides over the active layer without silicon crystal, which has no germanium content, in between. The multilayer redistribution structure includes redistribution interconnections and a number of bump structures that are at bottom of the multilayer redistribution structure and electrically coupled to the mold device die via the redistribution interconnections.Type: GrantFiled: May 30, 2019Date of Patent: March 5, 2024Assignee: Qorvo US, Inc.Inventors: Julio C. Costa, Michael Carroll
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Patent number: 11923827Abstract: Disclosed is a Bulk Acoustic Wave (BAW) assist filter structure with a BAW resonator stacked onto an integrated passive device (IPD). In exemplary aspects disclosed herein, the BAW filter structure includes a transducer with electrodes and a piezoelectric layer between the electrodes. The IPD is electrically coupled to the BAW resonator and provides a high frequency of operation. In such a configuration, the BAW assist filter structure has a low insertion loss and mitigates electrical length parasitic loss due to the close electrically proximity of the BAW resonator stacked onto the IPD. Further, the BAW assist filter structure is able to filter high frequencies and provides improved filter performance and greater flexibility in design of a filter transfer function.Type: GrantFiled: February 23, 2021Date of Patent: March 5, 2024Assignee: Qorvo US, Inc.Inventors: Jeffery D. Galipeau, Kelly M. Lear
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Patent number: 11923806Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.Type: GrantFiled: June 18, 2021Date of Patent: March 5, 2024Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11923238Abstract: The present disclosure relates to a radio frequency device and a process for making the same. According to the process, a precursor wafer, which includes device regions, individual interfacial layers formed of SiGe, and a silicon handle substrate, is first provided. Each individual interfacial layer is over an active layer of a corresponding device region, and the silicon handle substrate is over each individual interfacial layer. A first bonding layer is formed underneath the precursor wafer. The precursor wafer is then attached to a support carrier with a second bonding layer. The first bonding layer and the second bonding layer merge to form a bonding structure between the precursor wafer and the support carrier. Next, the silicon handle substrate is removed from the precursor wafer to provide an etched wafer, and a first mold compound is applied to the etched wafer to provide a mold device wafer.Type: GrantFiled: December 14, 2020Date of Patent: March 5, 2024Assignee: Qorvo US, Inc.Inventors: Julio C. Costa, Robert Aigner
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Patent number: 11923812Abstract: A delay-compensating power management integrated circuit (PMIC) is provided. The PMIC includes a target voltage circuit configured to generate a target voltage that is utilized for generating a time-variant voltage to amplify an analog signal. The target voltage is generated based on a time-variant envelope of the analog signal but lags behind the time-variant envelope by a temporal delay(s) due to an inherent processing delay in the target voltage circuit. In this regard, a voltage processing circuit is provided in the target voltage circuit to generate a modified target voltage that is time-adjusted relative to the target voltage to substantially offset the temporal delay(s). By generating the time-variant voltage based on the modified target voltage, the time-variant voltage can be better aligned with the time-variant envelope of the analog signal, thus helping to reduce amplitude distortion when amplifying the analog signal.Type: GrantFiled: May 27, 2021Date of Patent: March 5, 2024Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11916541Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to pass a first passband and attenuate frequencies outside the first passband, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter, wherein the second AW filter is configured to pass a second passband that is spaced from the first passband to minimize interference between first bandpass and the second bandpass while attenuating frequencies outside the second passband.Type: GrantFiled: June 9, 2021Date of Patent: February 27, 2024Assignee: Qorvo US, Inc.Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
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Patent number: 11906992Abstract: A distributed power management circuit is provided. In embodiments disclosed herein, the distributed power management circuit can achieve multiple performance enhancing objectives simultaneously. More specifically, the distributed power management circuit can be configured to switch a modulated voltage from one voltage level to another within a very short switching window, reduce in-rush current required for switching the modulated voltage, and minimize a ripple in the modulated voltage, all at same time. As a result, the distributed power management circuit can be provided in a wireless device (e.g., smartphone) to enable very fast voltage switching across a wide modulation bandwidth (e.g., 400 MHz) with reduced power consumption and voltage distortion.Type: GrantFiled: September 12, 2022Date of Patent: February 20, 2024Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11909385Abstract: A fast-switching power management circuit is provided. The fast-switching power management circuit is configured to generate an output voltage(s) based on an output voltage target that may change on a per-frame or per-symbol basis. In embodiments disclosed herein, the fast-switching power management circuit can be configured to adapt (increase or decrease) the output voltage(s) within a very short switching interval (e.g., less than one microsecond). As a result, when the fast-switching power management circuit is employed in a wireless communication apparatus to supply the output voltage(s) to a power amplifier circuit(s), the fast-switching power management circuit can quickly adapt the output voltage(s) to help improve operating efficiency and linearity of the power amplifier circuit(s).Type: GrantFiled: October 19, 2020Date of Patent: February 20, 2024Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11908808Abstract: A monolithic microwave integrated circuit (MMIC) with embedded transmission line (ETL) ground shielding is provided. In an exemplary aspect, an ETL MMIC according to this disclosure includes a MMIC substrate having an active side, an ETL dielectric layer covering the active side, and a topside ground plane over the ETL dielectric layer. The active side includes one or more transmission lines or other components which may undesirably couple to metal signal lines (e.g., package metal interconnects) in an external circuit assembly. The topside ground plane in the ETL MMIC provides shielding to reduce such electromagnetic coupling. The topside ground plane can also facilitate improved thermal paths for heat dissipation, such as through a redistribution layer (RDL) to a next higher assembly (NHA) and/or through a backside ground plane of the MMIC substrate.Type: GrantFiled: January 17, 2023Date of Patent: February 20, 2024Assignee: Qorvo US, Inc.Inventor: Andrew Arthur Ketterson
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Patent number: 11901620Abstract: A directional coupler for co-located antennas contemplates coupling a first transceiver to an antenna through a directional coupler. A second transceiver is also coupled to the antenna using the directional coupler. When the first transceiver is transmitting, the second transceiver may receive through the antenna without suffering interference from signals transmitted by the first transceiver. To facilitate signal handling, a tunable or variable load may also be coupled to the directional coupler.Type: GrantFiled: July 9, 2021Date of Patent: February 13, 2024Assignee: Qorvo US, Inc.Inventor: Yilong Shen
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Patent number: 11894767Abstract: A power management circuit operable to reduce rush current is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying a radio frequency (RF) signal(s). Notably, a variation in the time-variant voltage(s) can cause a rush current that is proportionally related to the variation of the time-variant voltage(s). To reduce the rush current, the power management circuit is configured to maintain the time-variant voltage(s) at a non-zero standby voltage level when the power amplifier(s) is inactive. When the power amplifier(s) becomes active and the time-variant voltage(s) needs to be raised or reduced from the non-zero standby voltage level, the rush current will be smaller as a result of reduced variation in the time-variant voltage(s). As such, it is possible to prolong the battery life in a device employing the power management circuit.Type: GrantFiled: May 11, 2021Date of Patent: February 6, 2024Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Michael R. Kay
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Patent number: 11885007Abstract: A structure includes a substrate including a wafer or a portion thereof; and a piezoelectric bulk material layer comprising a first portion deposited onto the substrate and a second portion deposited onto the first portion, the second portion comprising an outer surface having a surface roughness (Ra) of 4.5 nm or less. Methods for depositing a piezoelectric bulk material layer include depositing a first portion of bulk layer material at a first incidence angle to achieve a predetermined c-axis tilt, and depositing a second portion of the bulk material layer onto the first portion at a second incidence angle that is smaller than the first incidence angle. The second portion has a second c-axis tilt that substantially aligns with the first c-axis tilt.Type: GrantFiled: June 14, 2022Date of Patent: January 30, 2024Assignee: Qorvo US, Inc.Inventors: Derya Deniz, Matthew Wasilik, Robert Kraft, John Belsick
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Patent number: 11881833Abstract: An integrated passive die includes a substrate, an input node, an output node, and RF filtering circuitry. The RF filtering circuitry includes a number of LC tank circuits coupled between the input node and the output node. Each one of the LC tank circuits include an inductor and a capacitor. The inductor is formed by a metal trace over the substrate. The capacitor is coupled in parallel with the inductor over the substrate. The inductor and the capacitor are provided such that a resonance frequency of the combination of the inductor and the capacitor is less than a self-resonance frequency of the inductor.Type: GrantFiled: October 18, 2022Date of Patent: January 23, 2024Assignee: Qorvo US, Inc.Inventor: Peter V. Wright
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Patent number: 11877505Abstract: Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.Type: GrantFiled: October 14, 2021Date of Patent: January 16, 2024Assignee: Qorvo US, Inc.Inventors: Christo Bojkov, Michael Roberg, Matthew Essar, Walid Meliane, Terry Hon
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Patent number: 11876488Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.Type: GrantFiled: June 16, 2022Date of Patent: January 16, 2024Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Michael R. Kay, Jeffrey D. Potts, Michael J. Murphy
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Patent number: 11869825Abstract: The present disclosure relates to a radio frequency device that includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion, first bump structures, a first mold compound, and a second mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The BEOL portion is formed underneath the FEOL portion, and the first bump structures and the first mold compound are formed underneath the BEOL portion. Each first bump structure is partially encapsulated by the first mold compound, and electrically coupled to the FEOL portion via connecting layers within the BEOL portion. The second mold compound resides over the active layer without a silicon material, which has a resistivity between 5 Ohm-cm and 30000 Ohm-cm, in between.Type: GrantFiled: October 20, 2022Date of Patent: January 9, 2024Assignee: Qorvo US, Inc.Inventors: Julio C. Costa, Michael Carroll
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Patent number: 11869947Abstract: The present disclosure relates to a Gallium-Nitride (GaN) based module, which includes a module substrate, a thinned switch die residing over the module substrate, a first mold compound, and a second mold compound. The thinned switch die includes an electrode region, a number of switch interconnects extending from a bottom surface of the electrode region to the module substrate, an aluminium gallium nitride (AlGaN) barrier layer over a top surface of the electrode region, a GaN buffer layer over the AlGaN barrier layer, and a lateral two-dimensional electron gas (2DEG) layer realized at a heterojunction of the AlGaN barrier layer and the GaN buffer layer. The first mold compound resides over the module substrate, surrounds the thinned switch die, and extends above a top surface of the thinned switch die to form an opening over the top surface of the thinned switch die. The second mold compound fills the opening.Type: GrantFiled: May 3, 2021Date of Patent: January 9, 2024Assignee: Qorvo US, Inc.Inventors: Julio C. Costa, Michael Carroll
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Patent number: 11867664Abstract: This disclosure describes methods and devices that assist in forming biosensors. Specifically, features that align solutions containing molecules to be immobilized on biosensors. A retaining structure may be disposed at least partially around a target surface of a substrate. A resonating structure may be disposed on the target surface. A droplet of functionalized material may be disposed on the resonating structure and the target surface, which may be auto-aligned and retained by the retaining structure on the target surface to consistently cover the resonating structure.Type: GrantFiled: August 20, 2021Date of Patent: January 9, 2024Assignee: Qorvo US, Inc.Inventor: James Russell Webster