Abstract: A semiconductor device includes an interrupt control circuit that receives a plurality of interrupt signals from the circuit blocks and outputs an interrupt request to the processor, and an interrupt monitoring circuit that corresponds to one of the interrupt signals and includes a setting circuit for setting a monitoring type and first and second monitoring periods. If the monitoring type indicates an asserted state of the interrupt signal, the interrupt monitoring circuit monitors the asserted state. If a first duration of the continuous asserted state exceeds the first monitoring period, the interrupt monitoring circuit detects the state as a failure. If the monitoring type indicates a negated state of the interrupt signal, the interrupt monitoring circuit monitors the negated state. If a second duration of the continuous negated state exceeds the second monitoring period, the interrupt monitoring circuit detects the state as a failure.

Abstract: A semiconductor device includes a communication unit which receives a frame at a first transmission period, demodulates control information from a received frame, modulates transmission data, and broadcasts a modulated transmission data at a second transmission period as a radio frequency packet signal, a period determination unit which determines the second transmission period based on vehicle information, and a transmission and reception control unit which generates a transmission timing trigger signal for determining a transmission timing of the transmission data based on the control information and the second transmission period, and outputs the transmission data to the communication unit in synchronization with the transmission timing trigger signal. The second transmission period is equal to or longer than the first transmission period.

Abstract: A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

Abstract: A roadside radio device includes a first radio unit which receives a radio data packet from an in-vehicle radio device, and a first application unit which receives application data included in the radio data packet. A first application unit includes a vehicle class information comparison unit which compares vehicle identification information with communication type information. When the vehicle class information comparison unit determines that the vehicle identification information and the communication type information match, the first application unit processes the application data received from the first radio unit. When the vehicle class information comparison unit determines that the vehicle identification information and the communication type information do not match, the first application unit treats, as invalid data, the application data received from the first radio unit.

Abstract: A computer-implemented method of generating functional safety data for a design of an electronic component includes receiving attribute data for elements in an electronic component. The attribute data include element data for the elements, wherein element data for a given element include an identity of the given element and a failure rate characteristic for the given element. The attribute data include functionality data for element functionalities, wherein functionality data for a given element functionality include an identity of a use case, an identity of an element, an identity of a fault characterization for providing information about one or more fault models and a configurable data for controlling selection and use of the given functionality data when generating the functional safety data. The method also includes generating the functional safety data using the attribute data and storing a report including the functional safety data.

Abstract: It is an object of the present invention to provide a technique capable of performing user estimation without making the user aware of it. The appliance has a first sensor input unit that inputs a plurality of control commands for controlling an operation, and estimates the user based on the control command input to the first sensor input unit and an operation feature amount at the time of inputting the control command. The first sensor input unit includes a touch panel. The operation feature amount includes an operation position of the touch panel, an electrostatic capacitance value corresponding to a pressing of the touch panel, and a time-dependent change pattern thereof.

Abstract: Along with the miniaturization of the semiconductor memory device, the resistor and parasitic capacitance of the wires become large, which prevents the semiconductor memory device from being speeded up. In a semiconductor memory device having a semiconductor substrate having a main surface, a first memory cell row having a plurality of first memory cells arranged in parallel to a first direction in plan view on the main surface, a first word line connected to the plurality of first memory cells, a first word line driver for changing a potential of the first word line, and a control circuit for outputting a first predecode signal to the first word line driver via the first predecode line in response to a clock signal and an address signal, a repeater is inserted between the control circuit and the first word line driver.

Abstract: The semiconductor device controls the first circuit for supplying/stopping the current supplied by a DC power supply to the latching solenoid consisting of a coil and a movable iron core and a permanent magnet, the current is measured based on the input from the current detection circuit. The semiconductor device includes a control circuit having a low power dissipation mode in which the leakage current is reduced, and a normal operation mode. The control circuit maintains the low power consumption mode when no current is flowing through the coil, when a current is flowing through the coil maintains the normal operation mode, further, the movable iron core It comprises a control circuit configured to detect the inflection point of the current detected by the current detection circuit when leaving the permanent magnet.

Abstract: When a memory cell is formed over a first fin and a low breakdown voltage transistor is formed over a second fin, the depth of a first trench for dividing the first fins in a memory cell region is made larger than that of a second trench for dividing the second fins in a logic region. Thereby, in the direction perpendicular to the upper surface of a semiconductor substrate, the distance between the upper surface of the first fin and the bottom surface of an element isolation region in the memory cell region becomes larger than that between the upper surface of the second fin and the bottom surface of the element isolation region in the logic region.

Abstract: The polysilicon resistance has a large resistance variation rate after the end of the mold packaging process. In order to enable high-precision trimming, it is desired to realize a resistance which is hardly affected by stress and temperature fluctuation generated in a substrate by a mold packaging process. A resistance element is formed in a plurality of wiring layers, and has a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and a repeating pattern of an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the interlayer conductive layer is formed of a plurality of types of materials.

Abstract: A semiconductor device is provided with a semiconductor chip. The semiconductor chip has a semiconductor substrate, an interconnect layer, an inductor and conductive pads (first pads). The interconnect layer is provided on the semiconductor substrate. The interconnect layer includes the inductor. The pads are provided on the interconnect layer. The pads are provided in a region within a circuit forming region of the semiconductor chip, which does not overlap the inductor.

Abstract: A semiconductor device capable of reducing electric power consumption while suppressing deterioration in reliability is provided. The semiconductor device includes a flash memory, a SRAM formed on a SOI substrate, oscillation circuits generating a signal of a first frequency and a signal of a second frequency lower than the first frequency, and a processor operating in synchronization with a system clock. The processor performs steps of turning on a power supply of the flash memory, lowering a threshold voltage of the SRAM, transferring a program from the flash memory to the SRAM by using the signal of the first frequency as the system clock, turning off the power supply of the flash memory, heightening the threshold voltage of the SRAM, and executing the program stored in the SRAM by using the signal of the second frequency as the system clock.

Abstract: A semiconductor device containing a CPU capable of receiving an interrupt request signal and a task control circuit is provided. The semiconductor device includes a CPU (processor), a save circuit, and a task control circuit. The CPU includes a program counter that is updated when a task is executed. The semiconductor device includes an interrupt-related data save circuit that stores the data of the program counter when the CPU receives a CPU interrupt request signal. The data of the program counter stored in the interrupt-related data save circuit is stored in an save circuit and is used for restoring from the interrupt processing.

Abstract: A pad is formed on an interlayer insulating film, art insulating film is formed on the interlayer insulating film to cover the pad, and an opening portion exposing a part of the pad is formed in the insulating film. A metal film electrically connected to the pad is formed on the pad exposed from the opening portion and on the insulating film. The metal film integrally includes a first portion on the pad exposed from the opening portion and a second portion on the insulating film. An upper surface of the metal film has a wire bonding region for bonding a wire to the metal film and a probe contact region for bringing the probe into contact with the metal film, the wire bonding region is located on the first portion of the metal film, and the probe contact region is located on the second portion of the metal film.

Abstract: A semiconductor device selects one start sequence of the normal start and the low-power-consumption start based on the determination result of the determination circuit. According to the configuration, the operation in the start sequence from the power supply input to the processor operation start can be selected from the operation in which the instantaneous current is suppressed and the high-speed operation based on the supplied power supply.

Abstract: The semiconductor device includes a first electrode, a second electrode electrically coupled to the first electrode, and a third electrodes electrically coupled to at least one of the first and the second electrode, a first plating deposition portion on the first electrode, a second and a third plating deposition portions formed on the second and the third electrode, respectively. The areas of the second and the third plating deposition portion are smaller than the area of the first plating deposition portion. The periphery length of the third plating deposition portion is longer than the periphery length of the second plating deposition portion.

Abstract: The present invention provides a current detection circuit, semiconductor device, and a semiconductor system suitable for improving a current sensing accuracy. According to one embodiment, the current detection circuit 12 comprises a sense transistor Tr11 through which a first sense current proportional to the current flowing through the drive transistor MN1 flows, an operational amplifier AMP1 for amplifying the potential difference of the voltage of the external output terminal OUT and the source voltage of the sense transistor Tr11 for outputting the first sense current, a transistor Tr12 provided in series with the sense transistor Tr11 and to which the output voltage of the operational amplifier AMP1 is applied to the gate, and a switch SW3 provided between the external output terminal OUT and the source of the sense transistor Tr11 and turned on when the drive transistor MN1 is turned off.

Abstract: A semiconductor device comprises a pulse signal output circuit providing a pulse signal for a transmission electrode of an electrode pair, a current converter converting a first current generated on the reception electrode to a second current, a current-controlled oscillator outputting an oscillation signal having a frequency depending on the second current, and a counter counting a number of oscillating times of the oscillation signal per a predetermined period; wherein the current converter comprises a first constant current source and output a combined current of the first constant current of the first constant current source and the first current as the second current in response to the pulse signal, so that the semiconductor device suppresses an increase circuit size.

Abstract: To provide a semiconductor device which can be stably operated while achieving a reduction of the power consumption. A semiconductor device includes a CPU, a system controller which designates an operation speed of the CPU, P-type SOTB transistors, and N-type SOTB transistors. The semiconductor device is provided with an SRAM which is connected to the CPU, and a substrate bias circuit which is connected to the system controller and is capable of supplying substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors. Here, when the system controller designates a low speed mode to operate the CPU at a low speed, the substrate bias circuit supplies the substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors.

Abstract: A radio communication device includes an application execution unit which generates first transmission data including first application identification information, a communication unit which receives a message including first reception data including the first application identification information, and an occupancy rate determination unit including a transmission ID number counter which counts the number of first application identification information included in the first transmission data and which outputs a count result as a first transmission ID count value, a reception ID number counter which counts the number of first application identification information included in the first reception data and which outputs a count result as a first reception ID count value, and a comparison unit which compares the first transmission ID count value with the first reception ID count value to determine the number of transmission data and the number of reception data have a predetermined ratio.