Abstract: A current mode control type switching power supply device includes a first switch having a first terminal connected to a first application terminal to which an input voltage is applied, and a second switch having a first terminal connected to a second terminal of the first switch and a second terminal connected to a second application terminal to which a predetermined voltage lower than the input voltage is applied. A current sensor is configured to sense current flowing in the second switch. A controller configured to control the first switch and the second switch, wherein the controller is configured to control the first switch and the second switch independently of a difference between the input voltage and an output voltage and in addition in accordance with the current sensed by the current sensor.
Abstract: A semiconductor device includes a semiconductor element, a plurality of leads electrically connected to the semiconductor element and one of which supports the semiconductor element, a sealing resin covering the semiconductor element and a portion of each leads, and first and second plating layers exposed from the sealing resin. The sealing resin includes a resin side surface facing in a first direction perpendicular to the thickness direction. At least one of the leads has a lead end surface connected to its back surface and flush with the resin side surface. The first plating layer covers the back surface of the lead. The second plating layer covers the lead end surface and projects in the first direction relative to the resin side surface. An edge of the second plating layer overlaps with the first plating layer as viewed in the first direction.
Abstract: A switch driving device 10 comprises: multichannel switch elements SW1 to SW8 which are connected in parallel to a plurality of light-emitting elements included in a vehicle-mounted light-emitting device; and a logic portion 120 which automatically starts a series of switch driving sequence so that the on-off states of the switch elements SW1 to SW8 are sequentially switched in a predetermined pattern in response to the power-on of the device.
Abstract: There is provided a semiconductor package including a mounting frame having a conductive chip mounting region, a first semiconductor chip mounted on the chip mounting region and including a first semiconductor element, a second semiconductor chip mounted on the chip mounting region and including a second semiconductor element, and a conductive clip of a plate shape. The conductive clip includes a first component disposed above the mounting frame with the first semiconductor chip interposed therebetween, and a second component separated from the first component and disposed above the mounting frame with the second semiconductor chip interposed therebetween. The second main electrode of the first semiconductor element and the first main electrode of the second semiconductor element are short-circuited by the chip mounting region, so that the first semiconductor element and the second semiconductor element are cascade-connected.
Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.
May 23, 2019
Date of Patent:
July 28, 2020
ROHM CO., LTD.
Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
Abstract: A method for producing a semiconductor power device, includes forming a gate trench from a surface of a semiconductor layer toward an inside thereof. A first insulation film is formed on an inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.
Abstract: A semiconductor device includes a substrate having a mounting surface, a plurality of internal terminals disposed on the mounting surface, a light-receiving element mounted on the mounting surface, a light-emitting element mounted on the mounting surface, a first bonding wire and a light-transmitting element. The light-receiving element has a light-receiving region that detects light and a plurality of element pad portions. At least one of the plurality of element pad portions is electrically connected to the light-receiving region. The light-emitting element is spaced apart from the light-receiving element along a first direction perpendicular to a thickness direction of the substrate. The first bonding wire connects one of the plurality of element pad portions of the light-receiving element to one of the plurality of internal terminals. The first bonding wire is located on a side of the light-receiving element opposite the light-emitting element along the first direction.
Abstract: A semiconductor device includes: a semiconductor layer of a first conductive type having a first surface and a second surface opposite to the first surface; a body region of a second conductive type selectively formed on the first surface of the semiconductor layer; a source region of the first conductive type formed inside the body region; a gate electrode opposing part of the body region via a gate insulating film; a column layer of the second conductive type formed at the second surface side with respect to the body region; an embedded electrode embedded in the column layer such that the embedded electrode is electrically isolated from the column layer; and a first electrode electrically connected to the embedded electrode.
Abstract: A clock generation circuit, which generates an output clock using an external clock as a target clock, includes a circuit arranged to change the output clock to high level in synchronization with an up edge of the target clock, circuits arranged to generate first and second ramp voltages with a period of interval between neighboring up edges of the target clock, and a circuit arranged to hold a comparison voltage corresponding to a second ramp voltage when an up edge of the target clock occurs. The level of the output clock is changed from high level to low level based on a comparison result between the first ramp voltage and the comparison voltage.
Abstract: A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.
Abstract: Gate driver circuit for driving power transistor includes: gate line to be connected to the transistor; source line to be connected to the transistor; first current source sourcing current to the gate line; and second current source sinking current from the gate line, wherein the first current source includes: first reference impedance element connected to power supply line; first reference transistor installed between the first reference impedance element and the gate line; first error amplifier having output connected to gate of the first reference transistor, one input connected to the first reference impedance element, and the other input where first reference voltage is input; and first transistor elements installed between the power supply line and the gate line, and wherein the first current source is switched between a state, in which gate of each first transistor element is connected to the output of the first error amplifier, and OFF state.
Abstract: A reception antenna includes a reception coil which receives a power signal. A rectification circuit rectifies an alternating current flowing to the reception antenna. A smoothing capacitor smoothes an output of the rectification circuit. A waveform stabilizer is enabled when a power receiver satisfies a predetermined condition and shifts a parallel resonance frequency of the reception antenna.
Abstract: A SiC semiconductor device is provided that is capable of improving the detection accuracy of the current value of a principal current detected by a current sensing portion by restraining heat from escaping from the current sensing portion to a wiring member joined to a sensing-side surface electrode. The semiconductor device 1 includes a SiC semiconductor substrate, a source portion 27 including a principal-current-side unit cell 34, a current sensing portion 26 including a sensing-side unit cell 40, a source-side surface electrode 5 disposed above the source portion 27, and a sensing-side surface electrode 6 that is disposed above the current sensing portion 26 and that has a sensing-side pad 15 to which a sensing-side wire is joined, and, in the semiconductor device 1, the sensing-side unit cell 40 is disposed so as to avoid being positioned directly under the sensing-side pad 15.
Abstract: A semiconductor light-emitting element according to the present invention includes a metal layer, a light-emitting layer, a first conductivity type layer and a second conductivity type layer sandwiching the light-emitting layer, and a plurality of contact portions that electrically connects the metal layer and the first conductivity type layer. The semiconductor light-emitting element includes a surface electrode including a pad electrode and a branch-shaped electrode that extends from the pad electrode between the plurality of contact portions.
Abstract: A semiconductor device includes leads, a semiconductor element and a sealing resin covering the leads and the semiconductor element. The sealing resin includes an obverse surface, a reverse surface, and an end surface between the obverse surface and the reverse surface. The leads include a peripheral lead with a reverse surface exposed from the reverse surface of the resin and with an outer end surface exposed from the end surface of the resin. The outer end surface is located inward from the end surface of the resin. The sealing resin includes an interior top surface connected to its end surface and the outer end surface of the lead. The interior top surface and the reverse surface of the resin face in the same direction.
Abstract: A switching power supply circuit includes a switching output unit that generates an output voltage from an input voltage using an output transistor, a switching control unit that controls on and off of the output transistor so that the output voltage or a feedback voltage in proportion to the output voltage agrees with a predetermined reference voltage, and one of an interrupt unit and a reference voltage setting unit. The interrupt unit forcibly turns off the output transistor during a period while the output voltage or the feedback voltage is higher than a threshold value voltage that is higher than the reference voltage in response to a periodic load change. The reference voltage setting unit temporarily changes the reference voltage in synchronization with timing of a periodic load change.
Abstract: A semiconductor device includes a semiconductor layer that has a main surface including a defined region defined by a trench, a trench insulation layer formed in the trench, a field insulation layer that covers the defined region away from the trench, and a bridge insulation layer that is formed in a region between the trench and the field insulation layer in the defined region and that is connected to the trench insulation layer and to the field insulation layer.
Abstract: A chip part is provided that includes a substrate in which an element region and an electrode region are set, an insulating film (a first insulating film and a second insulating film) which is formed on the substrate and which selectively includes an internal concave/convex structure in the electrode region on a surface, a first connection electrode and a second connection electrode which include, at a bottom portion, an anchor portion entering the concave portion of the internal concave/convex structure and which include an external concave/convex structure on a surface on the opposite side and a circuit element which is disposed in the element region and which is electrically connected to the first connection electrode and the second connection electrode.
Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
Abstract: The present invention improves the detection accuracy of the state of charge of a battery. A coulomb count value CC is generated by integrating a charge/discharge current IBAT of a battery (S100). An SOC value SOC1 is calculated (S102). Based on an SOC-OCV characteristic predetermined for the battery, an OCV value OCV1 corresponding to the value SOC1 is generated (S112). A voltage VBAT of the battery is detected (S104). A voltage drop VDROP1 between OCV1 and a detected value VBAT1 of the voltage VBAT is generated (S114). A value OCV2 greater than the minimum operating voltage of the system by ?V, which corresponds to the voltage drop VDROP1, is generated (S116). Based on the SOC-OCV characteristic, an SOC value SOC2 corresponding to OCV2 is generated (S118). Based on the value SOC2, at least one of the values SOC1, CC, CCFULL, and SOC-OCV characteristics is corrected.