Abstract: Disclosed here is a PLL circuit that is an injection-locked PLL circuit. The PLL circuit includes a variable frequency oscillator configured in such a manner that a ring oscillator is formed during a period in which a window signal is negated and an injection edge based on a reference clock is allowed to be injected during a period in which the window signal is asserted, a feedback circuit that controls the variable frequency oscillator in such a manner that an oscillation frequency of the variable frequency oscillator gets closer to a target frequency according to the reference clock, and a window generator that receives an internal clock of the variable frequency oscillator and cuts out one pulse to generate the window signal.
Abstract: A regulator includes: a first transistor connected between an input terminal and an output terminal; a feedback circuit configured to control a control voltage of a control electrode of the first transistor such that a voltage of the output terminal approaches a target voltage according to a feedback voltage proportional to the voltage of the output terminal; a second transistor having one end connected to the input terminal and a control electrode to which the control voltage is applied in common with the first transistor; and a clamp circuit configured to set the other end of the second transistor to a voltage determined by the voltage of the output terminal.
Abstract: A driver circuit driving a plurality of capacitive loads includes: a plurality of output terminals to which the plurality of capacitive loads are to be connected; a plurality of drivers corresponding to the plurality of output terminals, each of the plurality of drivers being configured to generate a drive signal to be applied to each of the plurality of capacitive loads respectively corresponding to the plurality of drivers; and a capacitance detection circuit configured to detect a capacitance associated with each of the plurality of output terminals.
Abstract: There is provided a differential amplifier including: an inverting input terminal to which a first voltage is applied; a non-inverting input terminal to which a second voltage proportional to the first voltage is applied; and an offset part configured to generate a predetermined input offset voltage between the inverting input terminal and the non-inverting input terminal.
Abstract: A light-emitting device includes a light-emitting element having an element front surface and an element back surface spaced apart from each other in a first direction, a supporting member on which the light-emitting element is mounted, and a light-transmitting resin formed on the supporting member to cover the light-emitting element. The supporting member includes a base having a base front surface and a base back surface opposite to the base front surface, and first and second wirings each disposed on the base and electrically connected to the light-emitting element. The light-emitting element is mounted on the support member with the element back surface facing the base front surface.
Abstract: A semiconductor device includes a semiconductor chip having a passivation film, a stress relieving layer provided on the passivation film, and a groove formed in a periphery of a surface of the semiconductor chip, the groove being provided inside of an edge of the semiconductor chip, wherein the stress relieving layer is partly disposed in the groove.
Abstract: A position detection unit generates a position detection value PFB that indicates the position of a control target. A temperature detection unit generates a temperature detection value that indicates the temperature. A correction unit corrects the position detection value PFB. A controller generates a control instruction value SREF such that the position detection value PFB_CMP subjected to the correction matches a position instruction value PREF that indicates the target position of the control target. A driver unit applies a driving signal that corresponds to the control instruction value SREF to an actuator. The correction unit corrects the position detection value PFB such that the relation between the position detection value PFB and the actual position exhibits linearity that is uniform independent of the temperature.
October 6, 2017
Date of Patent:
July 20, 2021
ROHM CO., LTD.
Jun Maede, Akihito Saito, Yoshihiro Sekimoto
Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.
Abstract: A semiconductor device includes a substrate having a mounting surface, a plurality of internal terminals disposed on the mounting surface, a light-receiving element mounted on the mounting surface, a light-emitting element mounted on the mounting surface, a first bonding wire and a light-transmitting element. The light-receiving element has a light-receiving region that detects light and a plurality of element pad portions. At least one of the plurality of element pad portions is electrically connected to the light-receiving region. The light-emitting element is spaced apart from the light-receiving element along a first direction perpendicular to a thickness direction of the substrate. The first bonding wire connects one of the plurality of element pad portions of the light-receiving element to one of the plurality of internal terminals. The first bonding wire is located on a side of the light-receiving element opposite the light-emitting element along the first direction.
Abstract: A variable-frequency oscillator generates an oscillator clock having a frequency that corresponds to a control signal. A programmable frequency divider divides the oscillator clock, so as to generate a divided clock. A F/V converter circuit includes a capacitor and a switch that switches at a frequency that corresponds to the divided clock, and generates a detection voltage that corresponds to a reference current. A reference voltage source outputs a reference voltage that corresponds to the electric potential that occurs at the resistor due to a reference current. A feedback circuit adjusts a control signal such that the detection voltage approaches the reference voltage. A correction circuit changes the frequency-dividing ratio of the programmable frequency divider based on a modulation signal modulated according to a correction coefficient that corresponds to the temperature.
Abstract: A filter circuit includes a first rise delay circuit that delays a rising time of a first shifted signal by a predetermined time for output and a first fall delay circuit that delays a falling time of a second shifted signal by a predetermined time for output. The first rise delay circuit is configured so that a second rise delay signal does not follow a change in a first voltage toward a decreasing side and follows a change in the first voltage toward an increasing side. The first fall delay circuit is configured so that a second fall delay signal does not follow a change in the first voltage toward a decreasing side and follows a change in the first voltage toward an increasing side.
Abstract: A semiconductor element includes an element body, a surface protective film and an electrode. The element body has a front surface and a side surface connected to the front surface. The surface protective film is supported on the front surface of the element body. The surface protective film has a cutout portion recessed inward from an outer edge of the surface protective film as viewed in a thickness direction of the element body. The electrode is disposed in the cutout portion and electrically connected to the element body. The element body has a ledge protruding with respect to the side surface in a direction perpendicular to the thickness direction. The ledge is adjacent to an opening of the cutout portion as viewed in the thickness direction.
Abstract: A low-side driving circuit forms a power conversion apparatus together with a power transistor to be driven. A protection circuit generates a protection signal S1. An alarm control circuit changes an electrical state of a fail terminal according to the protection signal S1. A judgment circuit compares a voltage VFO at a fail (FO) terminal with a predetermined threshold value, and generates a judgment signal S2 that indicates the comparison result. A control logic circuit controls the state of the power transistor based on the judgment signal S2 and the protection signal S1.
Abstract: A light emitting unit emits light including first light and second light. A light receiving unit outputs a signal of a level in accordance with intensity of incoming light. A first optical sensor is configured to outputs a first signal of a level in accordance with intensity of the first light entering the light receiving unit. A second optical sensor outputs a second signal of a level in accordance with intensity of the second light entering the light receiving unit. Based on the second signal, a controller determines whether or not the living body information sensor and a surface of the living body are in close contact with each other. The controller generates the information related to the living body based on the first signal obtained when the living body information sensor and the surface of the living body are in close contact with each other.
Abstract: An electronic component includes a lower insulating layer, an upper insulating layer formed on the lower insulating layer, a first via electrode embedded in the lower insulating layer, a second via electrode embedded in the lower insulating layer at an interval from the first via electrode, and a resistance layer that is made of a metal thin film, is interposed in a region between the lower insulating layer and the upper insulating layer, and is electrically connected to the first via electrode and the second via electrode.
Abstract: Disclosed is a flip flop circuit including a master latch circuit receiving master input data based on target input data, a slave latch circuit configured to load master output data from the master latch circuit and to hold the master output data, and a data output section, target output data based on the target input data being output from the data output section. The slave latch circuit includes a first to an N-th slave latch circuits provided in parallel with the master latch circuit (N is an integer of 2 or larger), the flip flop circuit further includes an output selection circuit selecting any one of data output from the first to N-th slave latch circuits, and selection data from the output selection circuit is output from the data output section as the target output data.
Abstract: The present disclosure provides a touch detection circuit which comes with additional, new functions, an input device and an electronic apparatus. N first terminals (Ps) are each connected with a corresponding first electrode (Es). A second terminal (Pc) is connected with a second electrode (Ec). N first capacitance detection circuits (210) correspond to the N first terminals (Ps), change voltages of the first terminals (Ps), respectively, and each generate a first detection signal indicating an electrostatic capacitance of the corresponding first electrode (Es) in accordance with movement of a charge produced in the corresponding first terminal (Ps). A cancelling circuit (240) driving the second terminal (Pc) in a manner that a voltage of the second terminal (Pc) follows a voltage of the first terminal (Ps). A second capacitance detection circuit (260) generating a second detection signal indicating an electrostatic capacitance of the second electrode (Ec).
Abstract: A ground fault detection circuit includes an input portion, and a ground fault determination unit. The input portion inputs an anode voltage of a series connection unit constituted of a plurality of light emission elements. When an anode voltage of the series connection unit input by the input portion is lower than or equal to a predetermined value less than a product of an on-resistance of the short-circuit switch disposed in parallel to each of the light emission elements and current supplied to the series connection unit, the ground fault determination unit determines that a ground fault has occurred without the short-circuit switch in a ground fault path.
Abstract: A semiconductor device includes an amplifier that has an output terminal and that outputs via the output terminal a signal commensurate with an input signal fed to the amplifier, a signal conductor that is connected to the output terminal and that conducts a target voltage signal based on the output signal of the amplifier, a shield conductor that is laid along the signal conductor, and a shield drive circuit that controls the voltage on the shield conductor based on the target voltage signal.
Abstract: A monitoring device includes a monitoring part configured to detect an abnormality of a monitoring target, a self-diagnosis part configured to diagnose whether or not the monitoring part operates normally during a period from a startup time point of a power supply to an elapse time point at which a reset release waiting time elapses, and a reset control part configured to release a reset of a reset output signal on or after the elapse time point.