Abstract: The present disclosure provides a nitride semiconductor element. The nitride semiconductor element includes a semiconductor substrate having a substrate upper surface and a substrate lower surface facing opposite to the substrate upper surface, and having an active region and a peripheral region. A nitride semiconductor layer is selectively formed in the active region at the substrate upper surface to form a transistor. A source electrode and a drain electrode are in contact with the nitride semiconductor layer. A gate electrode is disposed between the source electrode and the drain electrode. A first electrode is formed on the substrate lower surface and used to electrically connect to the source electrode. The nitride semiconductor element includes a bidirectional Zener diode formed in the peripheral region and electrically connected to the first electrode.

Abstract: The power module semiconductor device (2) includes: an insulating substrate (10); a first pattern (10a) (D) disposed on the insulating substrate (10); a semiconductor chip (Q) disposed on the first pattern; a power terminal (ST, DT) and a signal terminal (CS, G, SS) electrically connected to the semiconductor chip; and a resin layer (12) configured to cover the semiconductor chip and the insulating substrate. The signal terminal is disposed so as to be extended in a vertical direction with respect to a main surface of the insulating substrate.

Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion.

Abstract: Disclosed herein is a semiconductor device including a conductive member that has a main surface facing in a thickness direction, a semiconductor element that has a plurality of pads facing the main surface, a plurality of electrodes that are individually formed with respect to the plurality of pads and protrude from the plurality of pads toward the main surface, and a bonding layer for electrically bonding the main surface to the plurality of electrodes. The bonding layer includes a first region having conductivity and a second region having electrical insulation. The first region includes a metal portion. At least a part of the second region includes a resin portion.

Abstract: A semiconductor device includes a semiconductor element, a first terminal, a second terminal, a first conductor, a first connecting member, and a second connecting member. The semiconductor element includes a first electrode, a second electrode, and a third electrode, and is configured to perform on/off control between the first electrode and the second electrode based on a drive signal inputted to the third electrode. The first terminal and the second terminal are separated apart from each other and electrically connected to the first electrode. The first conductor is electrically connected to the first terminal. The first connecting member electrically connects the first electrode and the first conductor. The second connecting member electrically connects the first conductor and the second terminal.

Abstract: An inkjet printing head 1 includes a pressure chamber 5, a movable film formation layer 10 that includes a movable film 10A defining a top surface portion of the pressure chamber 5, and a piezoelectric element 6 that is formed to contact a surface of the movable film 10A at an opposite side from the pressure chamber 5 and having a peripheral edge receded further toward an interior of the pressure chamber 5 than the movable film 10A in plan view. The piezoelectric element 6 includes a lower electrode 7 formed on a surface of the movable film formation layer 10 at the opposite side from the pressure chamber 5, an upper electrode 9 disposed at an opposite side from the movable film formation layer 10 with respect to the lower electrode 7, and a piezoelectric film 8 provided between the upper electrode 9 and the lower electrode 7, and the upper electrode 9 has a thin portion 92 at least at a portion of a peripheral edge portion.

Abstract: A dimming data transmission device includes a determination unit configured to determine whether each of a plurality of divided regions, into which a lightable region of an illumination device is divided, is a light-on region or a light-off region, and a transmission unit configured to transmit dimming data to dim only such a divided region of the divided regions as is serving as the light-on region.

Abstract: A transducer includes: a film support portion; a vibration film that is connected to the film support portion and capable of displacing in a thickness direction; a base material having an opposed surface that is opposed to the vibration film; and a first piezoelectric element that is provided with a pair of electrodes and a piezoelectric film sandwiched between the pair of electrodes, and is arranged on the vibration film, in which the transducer maintains a pressure in a space between the base material and the vibration film so as to keep displacement of the vibration film within a certain range.

Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer made of a nitride semiconductor; a second nitride semiconductor layer made of a nitride semiconductor having a bandgap larger than that of the first nitride semiconductor layer; a gate electrode located above the second nitride semiconductor layer; and a source electrode and a drain electrode formed on the second nitride semiconductor layer, wherein the first nitride semiconductor layer includes one or more stacked bodies, each of which includes a doped layer as a carbon-doped gallium nitride layer, and a non-doped layer as a non-doped gallium nitride layer formed on the doped layer, and wherein in a region below at least one of the gate electrode or the drain electrode, the number of dislocation lines passing through a top surface of the non-doped layer is smaller than the number of dislocation lines passing through a bottom surface of the non-doped layer.

Abstract: A semiconductor device includes: a substrate; and a semiconductor element, wherein the substrate includes a base and a conductor pattern arranged on the base, the conductor pattern includes a die pad portion and first and second connection portions, the die pad portion includes first and second ends in a first direction, and third and fourth ends in a second direction, outer periphery of the die pad portion includes first and second sides in the second direction, and third and fourth sides in the first direction, a recess is formed on one of the first and second sides, the first and second connection portions are respectively connected to a first corner of the outer periphery where the second and third sides are joined, and a second corner of the outer periphery where the second and fourth sides are joined.

Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.

Abstract: The present invention provides a nitride semiconductor device, including: a silicon substrate; a first lateral transistor over a first region of the silicon substrate and including: a first nitride semiconductor layer formed over the silicon substrate; and a first gate electrode, a first source electrode and a first drain electrode formed over the first nitride semiconductor layer; a second lateral transistor over a second region of the silicon substrate and including: a second nitride semiconductor layer formed over the silicon substrate; and a second gate electrode, a second source electrode and a second drain electrode formed over the second nitride semiconductor layer; a first separation trench formed over a third region; a source/substrate connecting via hole formed over the third region; a first interlayer insulating layer formed over the first source electrode and the second source electrode; and a second interlayer insulating layer formed in the first separation trench.

Abstract: The semiconductor device includes a chip which has a main surface, a first conductivity type channel region which is formed in a surface layer portion of the main surface, a second conductivity type drift region which is formed in the surface layer portion of the main surface so as to be adjacent to the channel region, a gate insulating film which covers the channel region and the drift region on the main surface, and a polysilicon gate which has a second conductivity type first portion which faces the channel region across the gate insulating film and a first conductivity type second portion which faces the drift region across the gate insulating film and forms a pn-junction portion with the first portion.

Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a device forming region and an outside region, an impurity region of a second conductivity type formed in a surface layer portion of a first main surface in the device forming region, a field limiting region of a second conductivity type formed in the surface layer portion in the outside region and having a impurity concentration higher than that of the impurity region, and a well region of a second conductivity type formed in a region between the device forming region and the field limiting region in the surface layer portion in the outside region, having a bottom portion positioned at a second main surface side with respect to bottom portions of the impurity region and the field limiting region, and having a impurity concentration higher than that of the impurity region.

Abstract: The present disclosure provides a power supply control device and a flyback converter. The power supply control device includes: a comparator, comparing a current sensing signal generated by IN conversion of a primary side current flowing in the primary winding with a threshold voltage; a switching controller, turning off a switching element according to a comparing result of the current sensing signal and the threshold voltage by the comparator; an external terminal, connectable to a connection node of an external resistor connected in series between one end of the auxiliary winding and an application end of a ground potential; a current detector, detecting a terminal current flowing through the external terminal; and a threshold voltage corrector, correcting the threshold voltage based on a current detection signal of the current detector.

Abstract: A semiconductor module includes a conductive substrate, a plurality of first semiconductor elements, and a plurality of second semiconductor elements. The conductive substrate includes a first conductive portion to which the plurality of first semiconductor elements are electrically bonded, and a second conductive portion to which the plurality of second semiconductor elements are electrically bonded. The semiconductor module further includes a first input terminal, a second input terminal, and a third input terminal that are provided near the first conductive portion. The second input terminal and the third input terminal are spaced apart from each other with the first input terminal therebetween. The first input terminal is electrically connected to the first conductive portion. A polarity of the first input terminal is set to be opposite to a polarity of each of the second input terminal and the third input terminal.

Abstract: A semiconductor device includes a semiconductor layer having a first surface, an insulating layer formed at the first surface of the semiconductor layer, a Cu conductive layer formed on the insulating layer, the Cu conductive layer made of a metal mainly containing Cu, a second insulating layer formed on the insulating layer, the second insulating layer covering the Cu conductive layer, a Cu pillar extending in a thickness direction in the second insulating layer, the Cu pillar made of a metal mainly containing Cu and electrically connected to the Cu conductive layer, and an intermediate layer formed between the Cu conductive layer and the Cu pillar, the intermediate layer made of a material having a linear expansion coefficient smaller than a linear expansion coefficient of the Cu conductive layer and smaller than a linear expansion coefficient of the Cu pillar.

Abstract: A nitride semiconductor device includes a passivation layer which has a first opening and a second opening, and which covers an electron supply layer, a gate layer, and a gate electrode. The passivation layer includes: a first insulation layer formed on at least a portion of the electron supply layer positioned, in plan view, between the first opening and gate layer; and a second insulation layer which covers the gate layer and gate electrode, and which is formed on the electron supply layer positioned, in plan view, between the second opening and gate layer. The second insulation layer is formed from a material having a Young's modulus lower than that of the first insulation layer.

Abstract: A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.