Patents Assigned to ROHM Co., Ltd.
  • Patent number: 10381940
    Abstract: A rectifier IC seals, in a single package, a first transistor chip which integrates a first transistor, a second transistor chip which integrates a second transistor and a controller chip which detects a first node voltage and a second node voltage of each of the transistors so as to perform on/off control on the transistors, and the rectifier IC functions as a secondary-side rectification means of an isolated switching power supply.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: August 13, 2019
    Assignee: Rohm Co., Ltd.
    Inventor: Hiroki Kikuchi
  • Patent number: 10381939
    Abstract: A switch drive circuit drives a full-bridge output stage connected to a transformer to alternately switch between a first cycle in which a current in a first direction is supplied to the transformer and a second cycle in which a current in a second direction is supplied to the transformer. The switch drive circuit includes a mode in which a dead time of the output stage is set in accordance with a magnitude of a current flown in one of the first and second cycles, the dead time becoming an operation changing factor in the other cycle. Or, the switch drive circuit includes a mode in which the dead time of the output stage is set in accordance with a magnitude of an average current obtained by averaging currents flown in the first and second cycles. Or, the switch drive circuit switches between these modes in accordance with a signal.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: August 13, 2019
    Assignees: Rohm Co., Ltd., TDK Corporation
    Inventors: Yuichi Kokusho, Takuya Sakamoto
  • Patent number: 10379564
    Abstract: A constant voltage generating circuit includes an ED-type reference voltage supply that generates a predetermined constant voltage by using a first transistor of depletion-type and a second transistor of enhancement-type that are connected in series between a power supply terminal and a ground terminal, and a third transistor a source of which is connected to an output terminal for the constant voltage, a drain of which is connected to the power supply terminal or the ground terminal, and a gate of which is connected to a connection node between the first transistor and the second transistor.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: August 13, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Kiyotaka Umemoto, Genki Tsuruyama
  • Patent number: 10382035
    Abstract: Disclosed is a signal transmission circuit device (200) including a feedback signal transmission unit (210) that feeds back a control output signal (Sout) as a feedback signal (Sf) to an input side circuit (200A). A logical comparison circuit (212) detects “mismatch” between input and output by performing logical comparison between a control input signal (Sin) and the feedback signal (Sf). When a state of “mismatch” between input and output occurs, a first pulse generating circuit (202) or a second pulse generating circuit (204) outputs a first correction signal (Sa1) or a second correction signal (Sa2) corresponding to a potential (high level or low level) of the control input signal (Sin), and corrects the control output signal (Sout) to the same potential (high level or low level) as the control input signal (Sin). With such configuration, the mismatch between input and output can be automatically corrected.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: August 13, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Daiki Yanagishima, Toshiyuki Ishikawa, Hirotaka Takihara
  • Patent number: 10381082
    Abstract: A nonvolatile semiconductor storage device has floating-gate memory cells and a memory control circuit which controls them. During programming operation of the memory cells, the memory control circuit makes the potentials at the backgate and source of the memory cells equal. For example, during programming operation of the memory cells, the memory control circuit short-circuits together the backgate and source of the memory cells. For another example, during programming operation of the memory cells, the memory control circuit switches from a state where the potentials at the backgate and source of the memory cells are equal to a floating state.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 13, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Okamoto, Kazuhisa Ukai, Seiichi Yamamoto
  • Patent number: 10381331
    Abstract: A semiconductor light emitting device (A) includes an elongated substrate (1) formed with a through-hole (11), a first, a second and a third semiconductor light emitting elements (3R, 3G, 3B) mounted on the main surface of the substrate (1), and an electrode (2R) electrically connected to the first semiconductor light emitting element (3R) and extending to the reverse surface of the substrate (1) via the through-hole (11). The first semiconductor light emitting element (3R) and the through-hole (11) are positioned between the second semiconductor light emitting element (3G) and the third semiconductor light emitting element (3B) in the longitudinal direction of the substrate (1). The second semiconductor light emitting element (3G) is arranged closer to one end of the substrate (1), whereas the third semiconductor light emitting element (3B) is arranged closer to the other end of the substrate (1).
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: August 13, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Hideyuki Taguchi
  • Patent number: 10381244
    Abstract: The power module includes: a first metallic circuit pattern, a semiconductor device disposed on the first metallic circuit pattern; a leadframe electrically connected to the semiconductor device; and a stress buffering layer disposed on an upper surface of the semiconductor device, and capable of buffering a CTE difference between the semiconductor device and the leadframe. The leadframe is connected to the semiconductor device via the stress buffering layer, a CTE of the stress buffering layer is equal to or less than a CTE of the leadframe, and a cross-sectional shape of the stress buffering layer is L-shape. There is provided: the power module capable of realizing miniaturization and large current capacity, and reducing cost thereof by using leadframe structure, and capable of reducing a variation in welding and improving a yield without damaging a semiconductor device; and a fabrication method for such a power module.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: August 13, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Katsuhiko Yoshihara, Masao Saito
  • Publication number: 20190243401
    Abstract: A regulator includes: a first transistor connected between an input terminal and an output terminal; a feedback circuit configured to control a control voltage of a control electrode of the first transistor such that a voltage of the output terminal approaches a target voltage according to a feedback voltage proportional to the voltage of the output terminal; a second transistor having one end connected to the input terminal and a control electrode to which the control voltage is applied in common with the first transistor; and a clamp circuit configured to set the other end of the second transistor to a voltage determined by the voltage of the output terminal.
    Type: Application
    Filed: February 7, 2019
    Publication date: August 8, 2019
    Applicant: Rohm Co., Ltd.
    Inventor: Makoto Yasusaka
  • Publication number: 20190242707
    Abstract: This electronic compass has a magnetic sensor for detecting two predetermined axis components out of the three geomagnetic axis components in a location and generating biaxial magnetic detection data corresponding to the magnitudes of the components, an acceleration sensor for detecting three axis components of the acceleration thereof and generating triaxial acceleration detection data corresponding to the three axis components, and an azimuth angle detection unit for calculating assumed magnetic detection data corresponding to the one remaining undetected axis component of the three geomagnetic axis components from the biaxial magnetic detection data, the triaxial acceleration detection data, and the magnitude and the magnetic dip of the geomagnetic field and detecting an azimuth angle by determining the component of the geomagnetic field parallel to the surface of the earth using the assumed magnetic detection data.
    Type: Application
    Filed: August 24, 2017
    Publication date: August 8, 2019
    Applicant: Rohm Co., Ltd.
    Inventor: Tadashi KOBAYASHI
  • Publication number: 20190244763
    Abstract: A chip capacitor and a method for manufacturing the chip capacitor, where the chip capacitor includes a substrate, a first external electrode disposed on the substrate, a second external electrode disposed on the substrate, capacitor elements formed on the substrate and connected between the first external electrode and the second external electrode, and fuses that are formed on the substrate, are each interposed between the capacitor elements and the first external electrode or the second external electrode, and are capable of disconnecting each of the capacitor elements.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Applicant: ROHM CO., LTD.
    Inventors: Hiroyuki OKADA, Yasuhiro FUWA
  • Publication number: 20190244966
    Abstract: The semiconductor device according to the present invention includes a ferroelectric film and an electrode stacked on the ferroelectric film. The electrode has a multilayer structure of an electrode lower layer in contact with the ferroelectric film and an electrode upper layer stacked on the electrode lower layer. The electrode upper layer is made of a conductive material having an etching selection ratio with respect to the materials for the ferroelectric film and the electrode lower layer. The upper surface of the electrode upper layer is planarized.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Applicant: ROHM CO., LTD.
    Inventor: Yuichi NAKAO
  • Patent number: 10374413
    Abstract: A switching power supply detects a short circuit to ground, for example, by comparing a soft-start voltage Vss with a feedback voltage Vfb while securing an offset voltage ?V. The switching power supply includes, for example, a short-circuit-to-ground detection circuit which detects a short circuit to ground at a monitoring target terminal. When a short circuit to ground occurs for the first time, the output of the short-circuit-to-ground detection circuit is masked for a first period. When a short circuit to ground occurs for the second or any succeeding time, the output of the short-circuit-to-ground detection circuit is masked for a second period shorter than the first period.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: August 6, 2019
    Assignee: Rohm Co., Ltd.
    Inventor: Yukihiro Watanabe
  • Patent number: 10374047
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a main surface at which a trench is formed, a gate insulating layer formed along a side wall of the trench, a gate electrode embedded in the trench with the gate insulating layer interposed therebetween and having an upper surface located below the main surface of the semiconductor layer, a second conductivity type region formed in a surface layer portion of the main surface of the semiconductor layer and facing the gate electrode with the gate insulating layer interposed therebetween, a first conductivity type region formed in a surface layer portion of the second conductivity type region and facing the gate electrode with the gate insulating layer interposed therebetween, and a side wall insulating layer covering the side wall of the trench in a recessed portion defined by the side wall of the trench and the upper surface of the gate electrode.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: August 6, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Hajime Okuda, Adrian Joita
  • Patent number: 10374143
    Abstract: A semiconductor integrated circuit constituting a part of a sensor signal processing apparatus for processing sensor signal output from a sensor includes: a first terminal where one end of a vibrator externally attached to the semiconductor integrated circuit is connected and a second terminal where the other end of the vibrator is connected; and an oscillation circuit oscillating the vibrator connected via the first and second terminals, wherein the oscillator circuit intermittently oscillating the vibrator based on control signal, wherein a first period where the oscillation circuit oscillates the vibrator and a second period where the oscillation circuit does not oscillate the vibrator are alternately switched, wherein, during the first period, potentials of the first and second terminals are alternately switched complementarily to high level and low level, and wherein, during the second period, the potentials of the first terminal and the second terminal are fixed to the low level.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: August 6, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Akihiro Ota, Yuzo Mizushima, Yuji Kaneda, Isao Niwa
  • Publication number: 20190237033
    Abstract: A display driver IC (200) comprises: a digital circuit including a logic circuit (2); an output unit (11) for outputting, to the outside, a drive control signal with a level corresponding to the output from the logic circuit; and at least one of a first decision unit (21) for determining whether or not an abnormality is present in the register value in a register in the digital circuit and a second decision unit (22) for determining whether or not the level of the drive control signal is the level corresponding to the output from the logic circuit.
    Type: Application
    Filed: September 6, 2017
    Publication date: August 1, 2019
    Applicant: Rohm Co., Ltd.
    Inventors: Yasuhito Sugimoto, Sukenori ITO, Hiromitsu Nakaoka
  • Publication number: 20190235548
    Abstract: There is provided a regulator including: a first transistor connected between an input terminal and an output terminal; a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage; a second transistor having a control electrode to which the control voltage is applied in common with the first transistor; a first resistor connected with the second transistor in series between the input terminal and the output terminal; and a current limiting circuit configured to detect a voltage generated across the first resistor and to change the control voltage so as to limit a current flowing through the first transistor.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 1, 2019
    Applicant: Rohm Co., Ltd.
    Inventor: Makoto YASUSAKA
  • Publication number: 20190238129
    Abstract: A driver circuit (DRV1) includes a pull-up circuit (PU1) and a pull-down circuit (PD1) that share an output node (external terminal (T3)). A signal (DI1 (DI2)) input to the pull-up circuit (PU1) and a signal (DI3) input to the pull-down circuit (PD1) are selected in a complementary manner, and the output node outputs an output signal in which rising time and falling time of the signals (DI1 (DI2) and DI3) are adjusted in accordance with on-off operation of the signals. The rising time is adjusted by transistors (M1 and M2) and a resistor (R1), while the falling time is adjusted by transistors (M3, M4 and M5) and a resistor (R2).
    Type: Application
    Filed: January 30, 2019
    Publication date: August 1, 2019
    Applicant: ROHM CO., LTD.
    Inventors: Shun FUKUSHIMA, Kazuhiro Murakami
  • Patent number: 10366948
    Abstract: A semiconductor device 1 includes a semiconductor chip 2, a plurality of leads 4, disposed in a periphery of the semiconductor chip 2, and a sealing resin 5, sealing the semiconductor chip 2 and the leads 4 such that lower surfaces 18 and outer end surfaces 20 at sides opposite the semiconductor chip 2 of the leads 4 are exposed. Lead plating layers 21 arranged to improve solder wettability are formed on the lower surfaces 18 and the outer end surfaces 20 of the leads 4.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: July 30, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Yasumasa Kasuya
  • Patent number: 10366648
    Abstract: A semiconductor integrated circuit connected to another circuit via differential transmission lines of N channels (where N is a natural number), the circuit includes: N pairs of differential output pins each of which is connected to a differential transmission line of a corresponding channel; N differential transmitters each of which is configured to drive a differential transmission line of a corresponding channel; and an abnormality detection circuit configured to detect abnormality in the differential transmission lines. The abnormality detection circuit includes: N amplifiers configured to detect a potential difference between differential transmission lines of corresponding channels; N first comparators each of which is configured to compare an output voltage of a corresponding amplifier with a first threshold voltage; and a logic circuit configured to detect abnormality of a first mode in a differential transmission line of a corresponding channel based on an output from each of the N first comparators.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: July 30, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Takashi Shimizu
  • Patent number: 10366977
    Abstract: An overheat protection circuit has an NPN transistor, a power terminal to which a supply voltage is applied, a transmission path by which the supply voltage is transmitted from the power terminal to the collector of the NPN transistor without passing through a current source, and an output voltage generator that generates an output voltage commensurate with the base-emitter voltage of the NPN transistor.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: July 30, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Hirofumi Yuki, Shuntaro Takahashi