Abstract: In an ion implantation processing system including an ion implantation device, the ion implantation device acquires, from a server, off-angle data of a wafer that is an ion implantation processing target and controls an ion implantation angle with respect to the wafer based on the off-angle data.

Abstract: Disclosed herein is a semiconductor light emitting device including a semiconductor light emitting element, a Zener diode, and a conductive support component that supports the semiconductor light emitting element and the Zener diode. The semiconductor light emitting element has a first electrode. The semiconductor light emitting device further includes a first wire connected to the Zener diode and the first electrode.

Abstract: A delay control circuit generates output timing signals that cause pixel drive signals to be output at timings after elapse of different delay times. The delay control circuit includes: first to sth delay timing signal generation circuits, generating first to kth delay timing signals that bring about output timings increasing in delay time; a control signal generation circuit, supplying a start pulse signal that initiates generation of the first to kth delay timing signals to the first to sth delay timing signal generation circuits; and a delay signal selection circuit, for each output channel with respect to first to sth delay timing signal groups each including the first to kth delay timing signals, selecting from among s delay timing signals the delay timing signal that brings about an earliest output timing, and setting the delay timing signals as the first to kth output timing signals.

Abstract: A driving circuit controls driving of a switching element by outputting a driving signal to the switching element. The driving circuit includes an air-core transformer having a plurality of primary windings and a secondary winding magnetically coupled to each of the plurality of primary windings. An AC signal is input to each of the plurality of primary windings of the air-core transformer. The plurality of primary windings includes a first primary winding and a second primary winding. There is a phase difference between an AC signal input to the first primary winding and an AC signal input the second primary winding.

Abstract: For example, a semiconductor device includes one or more first subcontacts electrically conducted to a substrate. At least one of the one or more first subcontacts is formed in an element arrangement region, and has a lower impedance than the substrate. Preferably, at least one of the one or more first subcontacts is adjacent to a circuit element formed in the element arrangement region. Preferably, on the substrate, which is of a first conductivity type, an epilayer of a second conductivity type is formed, and the one or more first subcontacts include a first line having a lower impedance than the substrate, and a semiconductor region of the first conductivity type penetrating through the epilayer to electrically conduct the first line and the substrate to each other.

Abstract: Provided is a light-emitting element drive system including a leader light-emitting element drive device configured to be capable of driving light-emitting elements, and to include a DC/DC controller configured to be capable of controlling an output stage that can output an output voltage; and a plurality of follower light-emitting element drive devices configured to be capable of driving the light-emitting elements applied with the output voltage. The follower light-emitting element drive device includes at least one signal output terminal capable of outputting an operation information signal related to driving of the light-emitting elements. A plurality of the signal output terminals are connected to the same node, and the same node is connected to a signal input terminal of the leader light-emitting element drive device.

Abstract: An electronic component includes a substrate having a first main surface on one side and a second main surface on the other side, a chip having a first chip main surface on one side and a second chip main surface on the other side, and a plurality of electrodes formed on the first chip main surface and/or the second chip main surface, the chip being arranged on the first main surface of the substrate, a sealing insulation layer that seals the chip on the first main surface of the substrate such that the second main surface of the substrate is exposed, the sealing insulation layer having a sealing main surface that opposes the first main surface of the substrate, and a plurality of external terminals formed to penetrate through the sealing insulation layer so as to be exposed from the sealing main surface of the sealing insulation layer.

Abstract: A semiconductor device includes a first conductive type semiconductor layer which has a principal surface, a second conductive type well region which demarcates an active region and an outer region on the principal surface and is formed on a surface layer portion of the principal surface and includes a high concentration portion high in impurity concentration on the active region side and includes a low concentration portion lower in impurity concentration than the high concentration portion on the outer region side, and a second conductive type impurity region of the active region which is formed on a surface layer portion of the principal surface.

Abstract: A semiconductor device includes: a current sense circuit that generates a current sense signal corresponding to a monitoring target current; an error amplifier; a comparator; and a controller. The current sense circuit includes: a differential amplifier of a current output type; a first input resistor connected between a first input terminal of the differential amplifier and a first current sense terminal; a second input resistor connected between a second input terminal of the differential amplifier and a second current sense terminal; an output resistor configured to be connected to the output terminal of the differential amplifier; a first feedback current path across which a first feedback current is passed between the first input terminal and the output terminal of the differential amplifier; and a second feedback current path across which a second feedback current is passed between the second input terminal of the differential amplifier and the output terminal.

Abstract: A semiconductor device includes: a semiconductor layer of a first conductivity type having a first main surface and a second main surface; an active region defined in a surface layer of the first main surface; an outer region defined outside the active region in the surface layer; and a main junction region of a second conductivity type provided in the outer region as surrounding the active region. The semiconductor device includes: a floating region of the second conductivity type provided in an electrically floating state in the active region; a region isolation trench structure which isolates the floating region in the surface layer; an outer isolation trench structure disposed in spaced relation from the region isolation trench structure to define the main junction region outward thereof; and an intervening region disposed between the region isolation trench structure and the outer isolation trench structure.

Abstract: A semiconductor device includes: an output transistor of a split-gate type configured to have a plurality of channel regions controlled individually according to a plurality of gate control signals; an active clamp circuit configured to limit the terminal-to-terminal voltage across the output transistor to or below a predetermined clamp voltage after a control signal turns to a logic level requesting the output transistor to be off; a delay circuit configured to generate a delayed internal signal by giving a predetermined delay to an internal signal indicating whether the terminal-to-terminal voltage across the output transistor is higher than a predetermined threshold voltage lower than the clamp voltage; and a gate control circuit configured to control the plurality of gate control signals individually so as to raise the on resistance of the output transistor according to the delayed internal signal.

Abstract: A semiconductor light-emitting device includes: a substrate; front-surface electrodes; back-surface electrodes; a semiconductor light-emitting element; a first drive circuit; and a second drive circuit. The substrate includes a substrate front surface, and a substrate back surface. The front-surface electrodes are formed on the substrate front surface. The back-surface electrodes are formed on the substrate back surface and configured for mounting the semiconductor light-emitting device. The semiconductor light-emitting element includes a first light emitter and a second light emitter. The first drive circuit is configured to drive the first light emitter. The second drive circuit is configured to drive the second light emitter. The semiconductor light-emitting element, the first drive circuit, and the second drive circuit are mounted on the front-surface electrodes.

Abstract: A semiconductor device includes a first lead, a second lead, a third lead, a semiconductor element, a sealing resin and a coating layer. The sealing resin has a bottom surface and an outer side surface. The bottom surface of the sealing resin is formed with a recess having an inner side surface. The second lead includes a reverse surface exposed at the bottom surface and a side surface exposed at the outer side surface. The coating layer contains a metal element and covers the reverse surface and the side surface. The recess is located between the first lead and the second lead. The second lead and at least one of the first lead and the third lead have inner end surfaces exposed at the inner side surface.

Abstract: A power supply control device configured to control first and second DC/DC converters, each of which is a step-down or a step-up converter, of first and second channels respectively, wherein the step-down and step-up converters respectively include a first switch output stage including high-side and low-side transistors and a second switch output stage including a switching element and an inductor, wherein a switching voltage is generated at a node where the high-side and low-side transistors are connected or where the inductor and the switching element are connected, and the high-side transistor or the switching element is turned on during an on-time, and wherein the power supply control device includes: first and second PWM controllers performing PWM control on the first or second switch output stage in the first and second DC/DC converters respectively; and a delay controller delaying a switch voltage of a channel having a longer on-time.

Abstract: A semiconductor device according to the present disclosure includes a first semiconductor element; a first connecting member; and a first member. The first semiconductor element has a first element obverse surface and a first element reverse surface that face mutually opposite in a thickness direction. The first semiconductor element also has a first electrode disposed on the first element obverse surface. The first connecting member is electrically connected to the first electrode. The first member overlaps with the first electrode as viewed in the thickness direction, has a Vickers hardness lower than a Vickers hardness of the first connecting member, and has electroconductivity.

Abstract: A package structure includes a metal member and a resin member. The metal member has an obverse surface facing one side in a first direction. The resin member is disposed in contact with at least a portion of the obverse surface. The obverse surface has a roughened area. The roughened area includes a plurality of first trenches recessed from the obverse surface, each of the first trenches having a surface with a greater roughness than the obverse surface. The plurality of first trenches extend in a second direction perpendicular to the first direction and are next to each other in a third direction perpendicular to the first direction and the second direction. The plurality of first trenches are filled up with the resin member.

Abstract: A first circuit has a predetermined function with an output that has a small dependence on a certain operation condition. A second circuit has the same function as that of the first circuit with an output that has a large dependence on the certain operation condition. When the first circuit is operating normally, the main circuit operates according to the output of the first circuit. The main circuit is capable of generating a detection signal that indicates the certain operation condition based on a relative relation between the output of the first circuit and the output of the second circuit.

Abstract: Provided is a semiconductor integrated circuit device including a pseudo-random pattern generator configured to output a pseudo-random pattern, a terminal for externally outputting an output of the pseudo-random pattern generator or an evaluation result of noise tolerance evaluated on the basis of the pseudo-random pattern.

Abstract: A semiconductor device includes a chip having a main surface, a semiconductor region of a first conductivity type formed in a surface layer portion of the main surface, a terminal region of a second conductivity type formed in a surface layer portion of the semiconductor region in a peripheral edge portion of the main surface, and a high concentration region of the first conductivity type formed in the surface layer portion of the main surface so as to be positioned in a thickness range between the main surface and a bottom portion of the terminal region, and having an impurity concentration higher than an impurity concentration of the semiconductor region.