Abstract: The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.

Abstract: A semiconductor device includes an insulating support member, a first and a second conductive layer, a first semiconductor element, a first lead, a first detection conductor and a first gate conductor. The first and second conductive layers are disposed on a front surface of the insulating support member. The first semiconductor includes a first and a second electrode on the same side, and a third electrode disposed on the other side and electrically connected to the first conductive layer. The first lead is connected to the first and second conductive layer. The first detection conductor is connected to the first electrode. The first gate conductor is connected to the second electrode. At least one of the first detection conductor and the first gate conductor has an end connected to the first semiconductor element. The end has a coefficient of linear expansion smaller than that of the first conductive layer.

Abstract: A semiconductor module includes: a first conductive portion; a second conductive portion spaced from the first conductive portion in a first direction; first semiconductor elements electrically bonded to the first conductive portion and mutually spaced in a second direction perpendicular to the first direction; and second semiconductor elements electrically bonded to the second conductive portion and mutually spaced in the second direction. The semiconductor module further includes: a first input terminal electrically connected to the first conductive portion; a second input terminal of opposite polarity to the first input terminal; and an output terminal opposite from the two input terminals in the first direction and electrically connected to the second conductive portion.

Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.

Abstract: A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.

Abstract: An overcurrent protection circuit includes a low-pass filter configured to generate a smoothing voltage corresponding to a voltage across a lower transistor forming a half-bridge output stage of an inverting type switching power supply, wherein an overcurrent protection signal is generated based on the smoothing voltage.

Abstract: A semiconductor module includes: a first conductive portion; a second conductive portion spaced from the first conductive portion in a first direction; first semiconductor elements electrically bonded to the first conductive portion and mutually spaced in a second direction perpendicular to the first direction; and second semiconductor elements electrically bonded to the second conductive portion and mutually spaced in the second direction. The semiconductor module further includes: a first input terminal electrically connected to the first conductive portion; a second input terminal of opposite polarity to the first input terminal; and an output terminal opposite from the two input terminals in the first direction and electrically connected to the second conductive portion.

Abstract: Disclosed herein is a motor driver circuit including a first output terminal to be connected to a first end of a to-be-driven motor via a sense resistor, a second output terminal to be connected to a second end of the motor, an error detector that generates an error signal, an A/D converter that obtains a digital signal, a compensator that generates a voltage command value, a D/A converter that converts the voltage command value to an analog control signal, a pulse width modulator that generates a first pulse and a second pulse, and an output stage that generates a first driving voltage and a second driving voltage. During a first mode, the compensator uses the error signal obtained by the A/D converter at a negative edge timing of the first pulse, for the error signal at a positive edge timing of the second pulse.

Abstract: A comparator circuit includes a zeroth capacitor having a first terminal fed with an input voltage, a zeroth inverter having an input terminal connected to a second terminal of the zeroth capacitor at a zeroth node, a first capacitor having a first terminal connected to the output terminal of the zeroth inverter at a first node, a first inverter having an input terminal connected to a second terminal of the first capacitor at a second node, a second inverter having an input terminal connected to the output terminal of the first inverter at a third node, a zeroth switch switching conduction between the zeroth and first nodes, a first switch switching conduction between the second and third nodes, a second switch switching conduction between the first and third nodes, and a third switch switching conduction between the third node and the output terminal of the second inverter.

Abstract: A semiconductor device includes: first and second semiconductor elements, each of which has first and second electrodes; a first lead mounting the first semiconductor element; a second lead mounting the second semiconductor element; a sealing resin covering the first and second semiconductor elements; a third lead disposed apart from the first and second leads in a y direction, exposed from the sealing resin, and electrically connected to the first electrode of the first semiconductor element; a fifth lead disposed apart from the first and second leads on the opposite side to the third lead, exposed from the sealing resin, and electrically connected to the second electrode of the first semiconductor element; and a sixth lead disposed apart from the first and second leads on the same side as the fifth lead, exposed from the sealing resin, and electrically connected to the second electrode of the second semiconductor element.

Abstract: Disclosed herein is a control circuit of a three-phase DC motor used along with an external resistance and a three-phase inverter. The control circuit includes a current detection circuit that generates a first current detection value indicating an amount of current of a first current flowing through a first phase of the three-phase inverter. The current detection circuit can generate the first current detection value, based on a voltage drop of a resistance component of a wire existing on a path of the first current, the wire being formed from a material containing copper, or based on a voltage drop of a first resistance that is an on-resistance of an arm of the first phase, and can use, as a standard, a current detection value based on a voltage drop of the external resistance to calibrate the first current detection value based on the voltage drop of the first resistance.

Abstract: A semiconductor device is provided with: a plurality of gate trenches; a plurality of gate electrodes; a plurality of field plate electrodes; gate wiring that is connected to each gate electrode and forms a loop in plan view; first source wiring that is connected to a first end of each field plate electrode and is disposed within the loop of the gate wiring in plan view; second source wiring that is connected to a second end of each field plate electrode and is disposed outside the loop of the gate wiring in plan view; and, a connection structure. The connection structure includes a connection trench that intersects the gate wiring in plan view, and inter-source wiring embedded in the connection trench. The inter-source wiring electrically connects the first source wiring and the second source wiring.

Abstract: A nitride semiconductor device includes an electron transit layer composed of a nitride semiconductor, an electron supply layer formed on the electron transit layer and composed of a nitride semiconductor having a band gap that is larger than that of the electron transit layer, a gate layer formed on the electron supply layer and composed of a nitride semiconductor including an acceptor impurity, a gate electrode formed on the gate layer, and a source electrode and a drain electrode that are formed on the electron supply layer. The gate layer includes an upper surface in contact with the gate electrode. The upper surface is a Ga-polar surface.

Abstract: The semiconductor device includes a semiconductor layer having an active portion and a gate finger portion, an MIS transistor formed at the active portion including a gate trench and a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches.

Abstract: A semiconductor device includes: a semiconductor region of a first conductivity type having a main surface; a capacitor region of a second conductivity type formed in a surface layer portion of the main surface; and at least one trench structure including a trench formed in the main surface to penetrate the capacitor region, an insulating film covering a wall surface of the trench, and embedded electrodes embedded in the trench so as to form capacitive coupling with the capacitor region through the insulating film.

Abstract: A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections, a resin encapsulation portion having a recess portion for exposing at least a portion of the die pad sections, the resin encapsulation portion configured to cover the die pad sections and the semiconductor chips, and a heat radiation layer arranged in the recess portion. The heat radiation layer includes an elastic layer exposed toward a direction in which the recess portion is opened. The heat radiation layer directly faces at least a portion of the die pad sections. The elastic layer overlaps with at least a portion of the die pad sections when seen in a thickness direction of the heat radiation layer.