Abstract: A thermoplastic composition comprising the melt blending product of one or more thermoplastic polymers; and from 2 to 20 PHR, of one or more gloss reducing additives wherein each gloss reducing additive comprises a (meth)acrylate copolymer having a glass transition temperature of greater than or equal to 40° C. and 0.001 to 0.04 PHM derived from one or more crosslinking monomers and/or graft-linking agents having two or more ethylenically unsaturated radicals capable of free-radical polymerization, wherein a test specimen produced from the thermoplastic composition has roughness according to DIN 4768 of Ra greater than or equal to 0.6 microns, Rz greater than or equal to 6 microns, Rmax greater than or equal to 7 microns, and a gloss less than 65, 75 degree angle, is provided. Methods for producing the thermoplastic compositions, methods for producing articles from the thermoplastic compositions and such articles are also provided.

Abstract: A current detection circuit for detecting a maximum current value in a three-phase motor includes an identifier configured to identify a maximum current phase having the maximum current value among phases of the motor, and a detector configured to detects the maximum current value by summing current values of phases other than the maximum current phase when the current direction in the maximum current phase is a predetermined first direction.

Abstract: The invention relates to an oral dosage form, comprising at least one biologically active agent, formulation auxiliary substances and magnetizable particles, wherein the dosage form has an at least two phase composition, wherein the phases can dissolve in the body after oral administration due to their formulation and the magnetizable particles are bound in formulation auxiliary substances and are present in a magnetized state, wherein the magnetized particles are present in at least two phases of the dosage form and generate magnetic fields, wherein these phases dissolve at different times in the body after oral administration, and wherein the magnetic field strength with respect to time, position and movement in the body is acquired using a detection system and can be evaluated using a computer-based evaluation system.

Abstract: A motor drive device has a spindle motor driver adapted to drive a spindle motor. the spindle motor driver includes lower side NMOSFETs, one for each phase, which connect and disconnect terminals, one for each phase, of the spindle motor to and from a ground terminal; a controller adapted to generate a switch control signal and a brake control signal; lower side pre-drivers, one for each phase, connected between an application terminal of an internal power supply voltage and the ground terminal and adapted to generate lower side gate signals, one for each phase, in accordance with the switch control signal to output the lower side gate signals to the lower side NMOSFETs, one for each phase; and a brake unit adapted to pull up to the internal power supply voltage all the lower side gate signals, one for each phase, in accordance with the brake control signal.

Abstract: A photoacid generator compound has the formula (1) wherein a, b, c, d, e, x, L1, L2, L3, L4, R1, R2, X, and Z? are defined herein. The photoacid generator compound exhibits good solubility in solvents typically used to formulate photoresist compositions and negative tone developers. Described herein are a photoresist composition including the photoacid generator compound, a coated substrate including the photoresist composition, and a device-forming method utilizing the photoresist composition.

Abstract: The present invention provides hypophosphite (co)telomers of methacrylic anhydride having a weight average molecular weight of from 1,000 to 20,000, and having, on average, at least one phosphorus atom bound to two carbon atoms, and at least one carboxylic acid or salt group.

Abstract: A method for producing a semiconductor device (20) is disclosed. The semiconductor device (20) includes: 1) a semiconductor substrate (1, 2), 2) a hetero semiconductor area (3) configured to contact a first main face (1A) of the semiconductor substrate (1, 2) and different from the semiconductor substrate (1, 2) in band gap, 3) a gate electrode (7) contacting, via a gate insulating film (6), a part of a junction part (13) between the hetero semiconductor area (3) and the semiconductor substrate (1, 2), 4) a source electrode (8) configured to connect to the hetero semiconductor area (3), and 5) a drain electrode (9) configured to make an ohmic connection with the semiconductor substrate (1, 2). The method includes the following sequential operations: i) forming the gate insulating film (6); and ii) nitriding the gate insulating film (6).

Abstract: This invention relates to a process for preparing multi-color dispersions and the multi-color dispersions made thereof.

Abstract: The instant invention is an aqueous based blend composition and method of producing the same. The aqueous based blend composition according to the present invention comprises: (a) an aqueous polyolefin dispersion comprising the melt blending product of one or more base polymers and one or more stabilizing agents in the presence of water and optionally one or more neutralizing agents, wherein the polyolefin dispersion has an average volume particle size diameter in the range of from 400 to 1500 nm, and a pH range from 8 to 11; and (b) one or more crosslinking agents selected from the group consisting of phenol-formaldehyde resins, hydroxyalkylamide resins, amino-formaldehyde resins; epoxy group containing resins, and combinations thereof, wherein said crosslinking agents comprise form 0.

Abstract: A semiconductor device that includes the following is manufactured: an n? base layer; a p-type base layer formed on the surface of the n? base layer; an n+ source layer formed in the inner area of the p-type base layer; a gate electrode formed so as to face a channel region across a gate insulating film; a plurality of p-type columnar regions that are formed in the n? base layer so as to continue from the p-type base layer and that are arranged at a first pitch; and a plurality of p+ collector layers that are selectively formed on the rear surface of the n? base layer and that are arranged at a second pitch larger than the first pitch.

Abstract: A method of manufacturing a silver miniwire film is provided, wherein the film exhibits a reduced sheet resistance.

Abstract: A semiconductor device has a source region, channel region, and drain region disposed in order from the surface of the device in the thickness direction of a semiconductor substrate. The device includes a source metal embedded in a source contact groove penetrating the source region and reaching the channel region, a gate insulating film formed on the side wall of a gate trench that is formed to penetrate the source region and channel and reach the drain region, a polysilicon gate embedded in trench so that at least a region facing the channel region in the insulating film is covered with the gate and so that the entire gate is placed under a surface of the source region, and a gate metal that is embedded in a gate contact groove formed in the gate so as to reach the depth of the channel region and in contact with the gate.

Abstract: An LED module includes a substrate, one or more LED chips supported by a main surface of the substrate, and wirings. The substrate has one or more through holes penetrating from the main surface to a rear surface. The wirings are formed on the substrate and make electrical conduction with the LED chips. The wirings include pads which are formed on the main surface and make electrical conduction with the LED chips, rear surface electrodes which are formed on the rear surface, and through wirings which make electrical conduction between the pads and the rear surface electrodes and are formed on the inner sides of the through holes.

Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.

Abstract: The invention relates to an improved blend of polyphenylsulfone (PPSU) and polytetrafluoroethylene (PTFE) for producing friction-reducing tapes (anti-wear tapes) used as a friction-reducing intermediate layer in flexible fluid pipes, e.g. oil pipes.

Abstract: A semiconductor device according to the present invention includes: a combination object; and a chip having a front surface opposed to a front surface of the combination object. The chip includes: a multi-level wiring structure provided in the front surface of the chip; a connection electrode provided in the multi-level wiring structure and electrically connected to the combination object; an alignment mark set provided in the multi-level wiring structure and electrically isolated from the connection electrode; and an electrically conductive film provided at a higher level than the alignment mark set in association with the multi-level wiring structure to cover the alignment mark set and electrically isolated from the connection electrode.

Abstract: An inventive semiconductor device includes: a first semiconductor chip; a second semiconductor chip having a front surface opposed to a front surface of the first semiconductor chip; a first electrode region including a first electrode provided between the first semiconductor chip and the second semiconductor chip to electrically connect the first semiconductor chip to the second semiconductor chip; and a juncture portion provided between the first semiconductor chip and the second semiconductor chip as surrounding the first electrode region to connect the first semiconductor chip to the second semiconductor chip.

Abstract: A lighting device includes a substrate and a planar light source portion including a plurality of LED chips arrayed on the substrate. The planar light source portion faces an illumination space (space to be illuminated) by a predetermined opening area. The plurality of LED chips are arrayed on the substrate such that the mounting density with respect to the opening area is not less than 3/cm2, and accordingly, a planar light source is formed.

Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.

Abstract: The present invention aims to simulate a response more similar to a actual machine while inhibiting load increase in analog operation. Program configuration of the present invention is a component of a simulation program for circuit design, which is executed by a computer. The computer includes an operation portion, a storage portion, a manipulation portion, and a display portion, so that the computer exerts a function of a circuit design simulator, and as a macro model of an operational amplifier for use in the circuit design simulator, enabling the computer to act by simulating a response of the operational amplifier on the circuit design simulator. The macro model of the operational amplifier includes a control portion (LMT1) for generating output exception in the event of input exception or power supply exception of the operational amplifier.