Abstract: The n-channel double diffusion MOS transistor includes a p-type semiconductor substrate, a p-type epitaxial layer, and an n-type buried layer provided in a boundary between the p-type semiconductor substrate and the p-type epitaxial layer. In a p-type body layer provided in a surface portion of the p-type epitaxial layer, an n-type source layer is provided to define a double diffusion structure together with the p-type body layer. An n-type drift layer is provided in a surface portion of the p-type epitaxial layer in spaced relation from the p-type body layer. An n-type drain layer is provided in a surface portion of the p-type epitaxial layer in contact with the n-type drift layer. A p-type buried layer having a lower impurity concentration than the n-type buried layer is buried in the p-type epitaxial layer between the n-type drift layer and the n-type buried layer in contact with an upper surface of the n-type buried layer.

Abstract: A LED module includes a substrate, a LED chip supported on the substrate, a metal wiring installed on the substrate, the metal wiring including a mounting portion on which the LED chip is mounted, an encapsulating resin configured to cover the LED chip and the metal wiring, and a clad member configured to cover the metal wiring to expose the mounting portion, the encapsulating resin arranged to cover the clad member.

Abstract: Provided are methods of forming photolithographic patterns by negative tone development. The methods employ a photoresist composition that includes a polymer having a unit of the following general formula (I): wherein: R1 represents hydrogen or a C1 to C3 alkyl group; a represents an integer from 1 to 3; and b represents 0 or 1. The methods find particular applicability in the manufacture of semiconductor devices.

Abstract: A monomer has the Formula I: wherein R1, R2, and R3 are each independently a C1-30 monovalent organic group, and R1, R2, and R3 are each independently unsubstituted or include a halogen, nitrile, ether, ester, ketone, alcohol, or a combination comprising at least one of the foregoing functional groups; R4 includes H, F, C1-4 alkyl, or C1-4 fluoroalkyl; A is a single bond or a divalent linker group, wherein A is unsubstituted or substituted to include a halogen, nitrile, ether, ester, ketone, alcohol, or a combination comprising at least one of the foregoing functional groups; m and n are each independently an integer of 1 to 8; and x is 0 to 2n+2, and y is 0 to 2m+2.

Abstract: A method for chemical mechanical polishing of a substrate comprising a germanium-antimony-tellurium chalcogenide phase change alloy (GST) using a chemical mechanical polishing composition comprising, as initial components: water; an abrasive; at least one of a phthalic acid, a phthalic anhydride, a phthalate compound and a phthalic acid derivative; a chelating agent; a poly(acrylic acid-co-maleic acid); and an oxidizing agent; wherein the chemical mechanical polishing composition facilitates a high GST removal rate with low defectivity.

Abstract: The present invention provides one component aqueous compositions comprising (i) a cationic stain blocking polymer chosen from (a) 0.01 to 7 wt. % of anion exchange resin copolymer gelular or dual morphology beads that have a weight average particle size of from 0.1 to 20 ?m and a low copolymerized crosslinker content of from 0.5 to 2.0 wt. %, (b) from 1 to 30 wt. % a crosslinked cationic addition polymer and (c) mixtures thereof, (ii) one or more emulsion copolymer having a copolymerized residue of at least one phosphorus acid monomer, and (iii) a stabilizer of from 0.1 to 2 wt. % of an inorganic phosphorus containing dispersant, and from 0.2 to 5.0 wt. % of a mixture of a nonionic surfactant and an anionic surfactant, both wt. % s based on the total weight of emulsion copolymer solids. The compositions provide stabilized binders for in a single coat primer plus topcoat coatings and paints.

Abstract: A semiconductor apparatus has a configuration in which multiple copper wiring layers and multiple insulating layers are alternately layered. A low-impedance wiring is formed occupying a predetermined region. A first wiring pattern includes multiple copper wiring members arranged in parallel with predetermined intervals in a first copper wiring layer, each of which has a rectangular shape extending in a first direction. A second wiring pattern includes multiple copper wiring members arranged in parallel with predetermined intervals in a second copper wiring layer adjacent to the first copper wiring layer, each of which has a rectangular shape extending in a second direction orthogonal to the first direction. The region occupied by the first wiring pattern and that occupied by the second wiring pattern are arranged such that they at least overlap. The first wiring pattern and the second wiring pattern are electrically connected so as to have the same electric potential.

Abstract: The present invention relates to a compound characterized by the following formula: wherein each R1 is independently methyl or ethyl; and n 1 to 10. The compound is useful in preparing hydrophobically modified alkylene oxide urethane polymers, which are useful as rheology modifiers for coatings formulations.

Abstract: An oscillation circuit includes: a ramp voltage generating unit configured to generate a ramp voltage; and a clock signal generating unit configured to generate a clock signal. The clock signal generating unit includes: a bias unit configured to apply one of the ramp voltage and a fixed voltage, as a bias voltage, to a resistor; and an oscillator configured to determine an oscillation frequency of the clock signal in response to a bias current flowing through the resistor.

Abstract: Compositions suitable for forming oxymetal hardmask layers are provided. Methods of forming oxymetal hardmask layers using such compositions are also provided, where the surface of the oxymetal hardmask layer formed has a water contact angle substantially matched to that of subsequently applied organic coatings.

Abstract: Methods of treating the surface of a metal-containing hardmask used in the manufacture of semiconductors by contacting the hardmask surface with a composition capable of adjusting the water contact angle so as to substantially match that of subsequently applied organic coatings are provided.

Abstract: A light emitting element includes: a sapphire substrate having a front surface and a rear surface opposite the front surface; a first conductive type semiconductor layer stacked on the front surface of the sapphire substrate; a light emitting layer stacked on the first conductive type semiconductor layer; a second conductive type semiconductor layer stacked on the light emitting layer; a reflective layer which contains Ag and is disposed on the rear surface of the sapphire substrate, the reflective layer reflecting light from the sapphire substrate toward the front surface of the sapphire substrate; and an adhesive layer which is interposed between the sapphire substrate and the reflective layer and is made of ITO, the adhesive layer being adhered to the reflective layer.

Abstract: The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage Vth of 0.3 V to 0.7 V and a leakage current Jr of 1×10?9 A/cm2 to 1×10?4 A/cm2 in a rated voltage VR.

Abstract: Described are personal care compositions, comprising water, a methylcellulose that gels at 45C or less, and at least one one hair fixative polymer, moisturizer, conditioner, humectant, cationic conditioning polymer, anti-aging active, or sun care active.

Abstract: A drive recorder of the invention includes a trigger judgment circuit that calculates, with respect to acceleration data of a vehicle, first and second moving averages as moving averages of two different time series, and that generates a trigger signal according to a result of comparing a differential value of the first and second moving averages or an absolute value of the differential value with a predetermined threshold value.

Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.

Abstract: A charging circuit receives electric power from a solar battery, and charges a secondary battery. A charging current detection unit generates a detection signal that corresponds to a charging current supplied from a DC/DC converter to the secondary battery. A control circuit generates a reference voltage that corresponds to the detection signal. A driving unit generates a pulse signal having a duty ratio that is adjusted such that the voltage output from the solar battery matches the reference voltage, and performs switching of a switching transistor according to the pulse signal. A control circuit adjusts the reference voltage such that the reference voltage becomes greater.

Abstract: An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the semiconductor chip. The sealing resin layer extends to a side surface of the passivation film to cover the side surface.

Abstract: A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the n-type column regions, the n-type column regions configured to form a super-junction structure in cooperation with the p-type column region, a channel region formed in the semiconductor layer, a source region formed in the channel region, a gate insulator film formed on the semiconductor layer, and a gate electrode formed on the gate insulator film and opposite to the channel region across the gate insulator film.

Abstract: A semiconductor device includes a substrate with first and second lower electrodes, a semiconductor element supported on the substrate and including upper and lower electrodes, a conductive bonding material bonding the lower electrode of the element and the substrate to each other, a wire connecting the upper electrode of the element and the substrate to each other, and a sealing resin covering the semiconductor element and the wire. The substrate includes a barrier that encloses at least partially the conductive bonding material.