Patents Assigned to Sanyo Semiconductor Co., Ltd.
  • Patent number: 8325243
    Abstract: A first equalizer generates a vibration-component signal indicating the amount of movement of an image pickup apparatus according to an output signal of a vibration detecting element for detecting the vibration of the image pickup apparatus. The second equalizer generates a drive signal used to control a driver element to correct the position of a lens or image pickup devices, based on the output signal of a position detecting element for detecting the position of the lens to be driven or the image pickup devices to be driven and the vibration-component signal. A control unit verifies the operations of the driver element, the position detecting element, the vibration detecting element and the first equalizer, based on the output signal of the position detecting element and the vibration-component signal.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 4, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Tomofumi Watanabe, Yasunori Nagata
  • Patent number: 8319317
    Abstract: Problems with a conventional mesa type semiconductor device, which are deterioration in a withstand voltage and occurrence of a leakage current caused by reduced thickness of an insulation film on an inner wall of a mesa groove corresponding to a PN junction, are solved using an inexpensive material, and a mesa type semiconductor device of high withstand voltage and high reliability is offered together with its manufacturing method. A stable protection film made of a thermal oxide film is formed on the inner wall of the mesa groove in the mesa type semiconductor device to cover and protect the PN junction, and an insulation film having negative electric charges is formed to fill a space in the mesa groove covered with the thermal oxide film so that an electron accumulation layer is not easily formed at an interface between an N? type semiconductor layer and the thermal oxide film.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: November 27, 2012
    Assignees: SANYO Semiconductor Co., Ltd., SANYO Semiconductor Manufacturing Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Katsuyuki Seki, Naofumi Tsuchiya, Akira Suzuki, Kikuo Okada
  • Patent number: 8316069
    Abstract: The invention reduces unnecessary electromagnetic radiation noise associated with a step pulse of an output signal. A random number control register is a register for controlling start, standby, stop, timing or the like of output of random number data from a random number generation circuit. Random number data outputted by the random number generation circuit is stored in a rise/fall time variable data register. The data stored in the rise/fall time variable data register is replaced by random number data sequentially generated by the random number generation circuit. An output circuit is a circuit for outputting a signal from an internal circuit of a microcomputer to an external device, and the rise/fall times of the output signal from the output circuit are variably controlled in response to the random number data stored in the rise/fall time variable data register.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: November 20, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventor: Hideo Kondo
  • Patent number: 8314458
    Abstract: In the semiconductor device according to the present invention, a P type diffusion layer and an N type diffusion layer as a drain lead region are formed on an N type diffusion layer as a drain region. The P type diffusion layer is disposed between a source region and the drain region of the MOS transistor. When a positive ESD surge is applied to a drain electrode, causing an on-current of a parasite transistor to flow, this structure allows the on-current of the parasite transistor to take a path flowing through a deep portion of an epitaxial layer. Thus, the heat breakdown of the MOS transistor is prevented.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: November 20, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventor: Seiji Otake
  • Patent number: 8311123
    Abstract: When data is an HDTV signal, a buffer memory is used as two banks and pipeline processing is performed. When data is an SDTV signal, on the other hand, the buffer memory is used as a bankless buffer memory, and the pipeline processing is not performed.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: November 13, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd
    Inventors: Tetsuo Kosuge, Kensuke Fujimura, Naoki Tanahashi
  • Patent number: 8305006
    Abstract: A light emitting element control circuit comprising: a variable current generation circuit configured to generate a variable current varying in a direction of increase or in a direction of decrease; a fixed current generation circuit configured to generate a fixed current smaller than a predetermined current of a light emitting element; and a mode setting circuit configured to selectively set a first mode of prohibiting supply of the variable current and the fixed current to the light emitting element, a second mode of supplying the variable current to the light emitting element, and a third mode of supplying the fixed current to the light emitting element, for the variable current generation circuit and the fixed current generation circuit.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: November 6, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Takaaki Ishii, Nobuyuki Ohtaka
  • Patent number: 8304856
    Abstract: A serially-connected diode pair made of diodes having a high withstand voltage and a low on-resistance is formed based on a high withstand voltage vertical PNP bipolar transistor process technology. Two of the diode pairs are connected in parallel to form a bridge so that there is formed a high-efficiency full-wave rectifier circuit that is free from a leakage current due to a parasitic transistor. The serially-connected diode pair is formed by connecting a diode composed of a P type semiconductor substrate, that makes an anode, and an N type buried layer, that makes a cathode, and a diode composed of a P+ type conductive layer, that makes an anode, and an N type epitaxial layer, that makes a cathode, in series with an electrode AC1.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: November 6, 2012
    Assignees: Sanyo Semiconductor Co., Ltd., Sanyo Semiconductor Manufacturing Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Keiji Mita, Yasuhiro Tamada, Masao Takahashi, Takao Maruyama
  • Patent number: 8305001
    Abstract: A light-emitting diode driver circuit includes: a first-rectifier circuit to output a first-rectified voltage; a transformer including primary and secondary coils and an auxiliary coil inductively coupled to the primary or secondary coils, the primary coil being applied with the first-rectified voltage; a transistor connected in series to the primary coil; a second-rectifier circuit to output a second-rectified voltage obtained by rectifying a voltage generated in the auxiliary coil; a capacitor to be charged with the second-rectified voltage; and a control circuit to control on and off of the transistor based on a charging voltage of the capacitor so that the charging voltage becomes equal to a predetermined voltage, the secondary coil outputting a voltage that varies with a frequency corresponding to a frequency of the first-rectified voltage and that corresponds to a turns ratio between the primary and secondary coils, as a voltage for driving a light-emitting diode.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: November 6, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Fumio Horiuchi, Toru Imaizumi, Takaya Kusabe
  • Patent number: 8285237
    Abstract: A receiving apparatus comprising: a frequency-fluctuation-detection unit to detect a frequency difference between a received and desired signals; a first-undesired-level-detection unit to output as a first-undesired level an amplitude-level-difference between the signals having passed through first-and-second-band-pass filters in the received signals; one or a plurality of second-undesired-level-detection units to output amplitude levels of signals having passed through third-and-fourth-band-pass filters in the received signals as second-and-third-undesired levels, respectively, and output a sum of the second-and-third-undesired levels as a fourth-undesired level; and a determination unit to determine whether an undesired state, where an adjacent-undesired signal is present, occurs according to the fourth-undesired level if an absolute value of the frequency difference is equal to or greater than a predetermined-reference value, and select any one of the first-to-third-undesired levels to be outputted accordi
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: October 9, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Masaaki Taira, Masaya Suto
  • Patent number: 8283681
    Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: October 9, 2012
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Noriaki Sakamoto, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
  • Patent number: 8278852
    Abstract: A motor-driving-circuit comprising: a first to-fourth-transistors; a drive-control-circuit to control a energization-state of a motor coil so as to be a driving-state where either one group of groups of the first-and-fourth-transistors and the second-and-third-transistors is on and the other group is off, or so as to be a regeneration-state where the first-and-third-transistors are off and the second-and-fourth-transistors are on; a set-current-detection-circuit; an overcurrent-detection-circuit; and an overcurrent-protection-circuit to output a regeneration-instruction-signal for shifting the energization-state to the regeneration-state if an overcurrent-state does not occur and output a drive-stop-signal for stopping driving the coil if the overcurrent-state occurs, when a current amount flowing through the coil has reached a set-level in the driving-state, the drive-control-circuit shifting the energization-state to the regeneration-state to be maintained for a predetermined time period and thereafter retu
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: October 2, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Yoshito Motoki, Yuji Uchiyama
  • Patent number: 8279002
    Abstract: A variable gain amplifier circuit includes: an operational amplifier having a non-inverting input terminal applied with a predetermined voltage; a feedback resistor having one end connected to an inverting input terminal of the operational amplifier and the other end connected to an output terminal of the operational amplifier; and a variable resistor having one end applied with an input voltage and the other end connected to the inverting input terminal of the operational amplifier.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: October 2, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Takahiro Kawashima, Rui Kurihara
  • Patent number: 8260233
    Abstract: The IFBPF (80) can variably set a passband width (WF) and an attenuation slope (KF). The bandwidth control circuit (102), which is constituted in hardware, controls the WF in accordance with the receiving state, which is composed of a combination of the receiving electric field intensity, the modulation degree, and the intensity of the adjacent-channel interference. A microcomputer (54) controls the KF on the basis of a program stored in a nonvolatile memory (60) and finely adjusts the effective passband width. Control of the WF contradictory for prevention of audio distortion and control of adjacent-channel interference is required when high modulation and adjacent-channel interference exist in a weak electric field state, and the setting becomes difficult. In this particular case, a configuration in which the KF can be modified by a program allows an advantageous receiving state to be readily obtained.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: September 4, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Keiji Kobayashi
  • Patent number: 8254171
    Abstract: The invention decreases the number of writing processes of EEPROM. When a mode change signal is L level, a EEPROM is set to a bank mode. In this case, first and second memory banks are independently accessed by a control signal of a first port and a control signal of a second port, respectively. When the mode change signal is H level, the EEPROM is set to a combine mode. In this case, the first and second memory banks are combined into a 4k-bit memory bank, and accessed by the control signal of the first port.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: August 28, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventor: Yoshinobu Kaneda
  • Patent number: 8253207
    Abstract: By integrating a diode and a resistor connected in parallel into the same chip as an IGBT and connecting a cathode of the diode to a gate of the IGBT, the value of dv/dt can be limited to a predetermined range inside the chip of the IGBT without a deterioration in turn-on characteristics. Since the chip includes a resistor having such a resistance that a dv/dt breakdown of the IGBT can be prevented, the IGBT can be prevented from being broken by an increase in dv/dt at a site (user site) to which the chip is supplied.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: August 28, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Shuji Yoneda, Hiroyasu Ishida, Makoto Oikawa
  • Patent number: 8255672
    Abstract: A processor includes: a plurality of registers; an instruction readout circuit configured to read out an instruction from a memory; an instruction generation circuit configured to generate instructions for saving data into a predetermined storage area, for the respective registers, if the instruction read out by the instruction readout circuit is an instruction causing the data stored in each of the plurality of registers to be saved; and an instruction execution circuit configured to execute the instruction read out from the memory and the instructions generated by the instruction generation circuit.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: August 28, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Iwao Honda, Shinya Kishida
  • Patent number: 8241958
    Abstract: To provide a semiconductor device and a semiconductor module in which breakage of a semiconductor element due to a pressing force given from the outside is prevented. A semiconductor device according to the present invention has a configuration mainly including an island, a semiconductor element mounted on a front surface of the island, a lead that functions as an external connection terminal, and a sealing resin that covers these components in an integrated manner and mechanically supports them. Further, a through-hole is provided so as to penetrate the sealing resin. A front surface of the sealing resin around the through-hole forms a flat part. The front surface of the sealing resin that overlaps the semiconductor element is depressed inward with respect to the flat part to form a depressed part.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: August 14, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventor: Haruhiko Sakai
  • Patent number: 8237649
    Abstract: A liquid crystal driving device includes, for each of a plurality of scanning lines, a level shift and output buffer circuit including a first PMOSFET and a first NMOSFET connected in series, a second PMOSFET and a second NMOSFET connected in series, and CMOS inverter circuit. A gate of the first PMOSFET and a gate of the second NMOSFET may be connected to respective bias voltages. Alternatively, a gate of the first NMOSFET and a gate of the second PMOSFET may be connected to respective bias voltages. Each level shift and output buffer circuit receives a binary input signal and outputs a buffered signal having both levels shifted with respect to the input signal using six transistors.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: August 7, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventor: Shuji Murai
  • Patent number: 8237327
    Abstract: Abnormal noise generated while driving a piezoelectric actuator is prevented. A pulse-generation circuit is capable of selectively generating a displacement pulse and a stationary pulse as a drive pulse for application to a piezoelectric element, the displacement pulse having a duty ratio for causing a lens to be displaced by a predetermined step width, and the stationary pulse having a duty ratio for causing the lens to remain stationary in a current position. The pulse-generation circuit controls the production of the drive pulse continuously for a plurality of times within the servo control cycle, causes the displacement pulse to be produced when the remainder of a required amount of displacement is equal to or greater than a threshold value, and causes the stationary pulse to be continuously produced until the initiation of the next servo control cycle when the remainder is less than the threshold value.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: August 7, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd., Fujifilm Corporation
    Inventors: Tetsuya Tokoro, Yukihiko Shigeoka, Hisao Ito, Hideo Yoshida, Takezo Nagamitsu
  • Patent number: 8238385
    Abstract: A data processing circuit comprising: a first circuit configured to time-division-multiplex a first digital signal synchronous with a clock signal input from an external controller and a second digital signal asynchronous with the clock signal; and a second circuit configured to output a digital signal time-division-multiplexed by the first circuit to the controller.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: August 7, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Hiroyuki Arai, Tetsuya Tokunaga, Yasuo Osawa, Kensuke Goto, Yoshiyuki Yamagata, Takeshi Kimura