Abstract: A system includes a crest-factor reduction circuit, a signal analyzer, and a pre-distortion circuit. The crest-factor reduction circuit reduces a crest factor of a baseband signal and generates a feedforward signal. The signal analyzer generates parameters based on the feedforward signal and an output signal from a power amplifier. The pre-distortion circuit generates a pre-distorted baseband signal based on the parameters for input to the power amplifier.

Abstract: A transceiver coupled to an antenna includes: (a) a multi-port filter having a bidirectional port coupled to the antenna, at least one input port and at least one output port; (b) a transmit datapath receiving a transmission signal and providing the transmission signal for transmission by the antenna through the multi-port filter, the transmit datapath being coupled to the input port of the multi-port filter; (c) a receive datapath receiving a reception signal from the antenna, the receive datapath being coupled to the output port of the multi-port filter; (d) a band-pass filter coupled to the antenna for receiving a sampled signal that includes intermodulation components between two or more of an external signal, the transmission signal and the reception signal; and (e) a monitoring and cancellation circuit receiving the transmission signal, the reception signal and the sampled signal to cancel the intermodulation components.

Abstract: A filter enhancer provides greater performance in a passive filter. The passive filter has an input terminal for receiving a signal in a first frequency band and an output terminal for providing a signal in a second frequency band. The filter enhancer includes: (a) a first canceller circuit coupled between input terminal and output terminal, the first canceller circuit including a first finite impulse response (FIR) filter for attenuating signals in the first frequency band; and (b) a control circuit coupled to output terminal and first canceller circuit for providing adaptive coefficients for configuring the first FIR filter. The first FIR filter may be implemented by either a digital FIR filter or an analog FIR filter. The filter enhancer may further include a second canceller circuit coupled between input terminal and output terminal, the second canceller circuit including a second FIR filter for attenuating signals in the second frequency band.

Abstract: A pre-distortion circuit for a power amplifier may include: (a) a digital interface for receiving a complex-value digital baseband signal; (b) a mixed-signal pre-distortion circuit adaptively controlled by a set of parameter values, receiving the complex-value digital baseband signal to provide a pre-distorted signal for input to the power amplifier, the mixed-signal pre-distortion circuit may include: (i) digital pre-distortion circuit that transforms the complex-value digital baseband signal to a pre-distorted complex-value digital baseband signal by applying to the complex-value digital baseband signal a memory-less non-linear gain and a polynomial function based on the complex-value digital baseband signal one or more delayed copies of the complex-value digital baseband signal; and (ii) up-converter that converts the pre-distorted complex-value digital baseband signal to the pre-distorted signal; and (c) a signal analyzer receiving an output signal from the power amplifier to provide the parameter values

Abstract: A circuit in a transmitter with multiple power amplifiers includes multiple individual linearizer circuits each receiving a corresponding input signal and each providing a conditioned input signal to a corresponding power amplifier. The linearizer circuit each include: (a) a pre-distortion circuit receiving (i) the corresponding input signal and (ii) the output signal of a corresponding power amplifier, and providing a pre-distortion signal; (b) a cancelation circuit receiving an interfering signal and providing a cancelation signal; and (c) a combination circuit that combines the cancelation signal and the pre-distortion signal to provide a conditioned input signal to the corresponding power amplifier.

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digital controlled analog sub-system responsive to the analysis.

Abstract: An apparatus and a method select and use parameter values for an RF power amplifier linearizer to pre-distort the input signals of a power amplifier, so as to achieve a linear output response in the power amplifier. The apparatus and the method select from a number of sets of parameter values, each set of parameter values corresponding to a different output power range of the power amplifier. The set of parameters include a coefficient vector tailored for the particular output power range for that set. The power amplifier input power is repeatedly measured and filtered at various time intervals. The input power measurements may be filtered by a fast attack/slow decay filter, which follows the peaks of the measurements under operation of the fast attack portion of the filter and provides a low variance during operation of the slow decay portion of the filter.

Abstract: A crest factor reduction (CFR) circuit reduces the peak-to-average (PAR) power of a digitally modulated signal in a complex baseband is achieved by post-processing the input signal, with negligible increase in out-of-band emissions. The CFR circuit takes advantage of a procedure that solves for an optimum CFR using a constraint-optimization approach. In one embodiment, the CFR circuit, which receives an input signal and provides an output signal, includes: (a) an error generation circuit that receives the input signal and provides an error signal representative of a measure of circuit-induced distortion and a delayed input signal, the delayed input signal being the input signal delayed by a predetermined value; (b) a linear-phase filter receiving the error signal to provide a correction signal; and (c) a summer that subtracts the correction from the delayed input signal to provide the output signal.

Abstract: A system for implementing linearization of a radio frequency (RF) power amplifier (PA) in a base station, as well as various component circuitry for implementing said system. By means of a smart partitioning of the signal processing for predistortion between the analog domain and the digital domain, a more linear relationship between the digital input data and the output RF signal is achieved. Linearization of the PA's output signal is obtained using a mixed-signal apparatus. The digital baseband signal enters the RF signal source. The RF signal source comprises an in-band predistortion circuit, a micro-controller and digital modulator. The output of the digital modulator is an RF signal that enters the PA module. The PA module is composed of the PA and the RF power amplifier linearizer (RFPAL). The RFPAL comprises an RF predistortion circuit, and RF signal analyzer and a microcontroller. In addition, a backward data interface connects the RF signal source with the RFPAL.

Abstract: An RF linearizer and an associated method are provided for linearizing a power amplifier. The RF linearizer may include: (a) a quadrature up-converter for up-converting a baseband input signal that is to be transmitted by the power amplifier; (b) an RF analog predistorter controlled by a set of coefficients for predistorting the up-converted input signal; (c) a down-converter for down-converting an output signal of the power amplifier; (d) an error monitor receiving the down-converted output signal and the input signal for providing an error signal; and (e) a signal analyzer receiving the error signal, the signal analyzer using an out-of-band power spectrum of the error signal to optimize the set of coefficients. The input signal may have an in-phase component and a quadrature component.

Abstract: In one embodiment a mixed-signal adaptive integrated circuit is comprised of a pre-distortion circuit operable to receive an RF input signal and to add a pre-distortion signal to the RF input signal to thereby provide a pre-distorted RF input signal, and a power amplifier coupled to the pre-distortion circuit and operable to receive the pre-distorted RF input signal and to provide an amplified RF output signal. The circuit further comprises a compensation module operable to receive the RF input signal and to provide a compensation signal, an auxiliary amplifier coupled to the compensation module and operable to selectively add the compensation signal to the amplified RF output signal, and a signal analyzer operable to receive and process the RF input signal and an RF output feedback signal to generate a first digital control signal for the pre-distortion circuit and a second digital control signal for the compensation module.

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digital controlled analog sub-system responsive to the analysis.

Abstract: An apparatus and a method select and use parameter values for an RF power amplifier linearizer to pre-distort the input signals of a power amplifier, so as to achieve a linear output response in the power amplifier. The apparatus and the method select from a number of sets of parameter values, each set of parameter values corresponding to a different output power range of the power amplifier. The set of parameters include a coefficient vector tailored for the particular output power range for that set. The power amplifier input power is repeatedly measured and filtered at various time intervals. The input power measurements may be filtered by a fast attack/slow decay filter, which follows the peaks of the measurements under operation of the fast attack portion of the filter and provides a low variance during operation of the slow decay portion of the filter.

Abstract: A system for implementing linearization of a radio frequency (RF) power amplifier (PA) in a base station, as well as various component circuitry for implementing said system. By means of a smart partitioning of the signal processing for predistortion between the analog domain and the digital domain, a more linear relationship between the digital input data and the output RF signal is achieved. Linearization of the PA's output signal is obtained using a mixed-signal apparatus. The digital baseband signal enters the RF signal source. The RF signal source comprises an in-band predistortion circuit, a micro-controller and digital modulator. The output of the digital modulator is an RF signal that enters the PA module. The PA module is composed of the PA and the RF power amplifier linearizer (RFPAL). The RFPAL comprises an RF predistortion circuit, and RF signal analyzer and a microcontroller. In addition, a backward data interface connects the RF signal source with the RFPAL.

Abstract: A system for implementing linearization of a radio frequency (RF) power amplifier (PA) in a base station, as well as various component circuitry for implementing said system. By means of a smart partitioning of the signal processing for predistortion between the analog domain and the digital domain, a more linear relationship between the digital input data and the output RF signal is achieved. Linearization of the PA's output signal is obtained using a mixed-signal apparatus. The digital baseband signal enters the RF signal source. The RF signal source comprises an in-band predistortion circuit, a micro-controller and digital modulator. The output of the digital modulator is an RF signal that enters the PA module. The PA module is composed of the PA and the RF power amplifier linearizer (RFPAL). The RFPAL comprises an RF predistortion circuit, and RF signal analyzer and a microcontroller.

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digitally controlled analog sub-system responsive to the analysis.

Abstract: An apparatus and a method select and use parameter values for an RF power amplifier linearizer to pre-distort the input signals of a power amplifier, so as to achieve a linear output response in the power amplifier. The apparatus and the method select from a number sets of parameter values, each set of parameter values corresponding to a different output power range of the power amplifier. The set of parameters include a coefficient vector tailored for the particular output power range for that set. The power amplifier input power is repeatedly measured and filtered at various time intervals. The input power measurements may be filtered by a fast attack/slow decay filter, which follows the peaks of the measurements under operation of the fast attack portion of the filter and provides a low variance during operation of the slow decay portion of the filter.

Abstract: A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to transform the combined inphase and quadrature output currents into an inphase output voltage and a quadrature output voltage.

Abstract: An RF linearizer and an associated method are provided for linearizing a power amplifier. The RF linearizer may include: (a) a quadrature up-converter for up-converting a baseband input signal that is to be transmitted by the power amplifier; (b) an RF analog predistorter controlled by a set of coefficients for predistorting the up-converted input signal; (c) a down-converter for down-converting an output signal of the power amplifier; (d) an error monitor receiving the down-converted output signal and the input signal for providing an error signal; and (e) a signal analyzer receiving the error signal, the signal analyzer using an out-of-band power spectrum of the error signal to optimize the set of coefficients. The input signal may have an in-phase component and a quadrature component.

Abstract: Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.