Patents Assigned to Scintera Networks
  • Patent number: 7379495
    Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: May 27, 2008
    Assignee: Scintera Networks Inc.
    Inventors: Qian Yu, Venugopal Balasubramonian, Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Edem Ibragimov, Fabian Giroud
  • Patent number: 7352225
    Abstract: A circuit and method for reducing the DC offset in a signal produced by the mixing of two AC signals.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: April 1, 2008
    Assignee: Scintera Networks, Inc.
    Inventor: Qian Yu
  • Patent number: 7339988
    Abstract: Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: March 4, 2008
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit G. Shanbhag, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Prashant Choudhary, Edem Ibragimov, Venugopal Balasubramonian, Qian Yu, Madabusi Govindarajan
  • Patent number: 7327204
    Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 5, 2008
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee
  • Patent number: 7302461
    Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: November 27, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Qian Yu, Abhijit Phanse
  • Publication number: 20070230557
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Application
    Filed: June 7, 2007
    Publication date: October 4, 2007
    Applicant: Scintera Networks, Inc.
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit Shanbhag, Qian Yu
  • Patent number: 7266145
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: September 4, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Qian Yu
  • Patent number: 7265623
    Abstract: A waveform shaping method comprises: (a) receiving link-distorted signal pulses; (b) passing the link-distorted signal pulses through a series of differential amplifiers each have independently tunable, base gains, peak boost gains, boost frequencies and boost bandwidths; and (c) adjusting one or more of the base gains, peak boost gains, boost frequencies and boost bandwidths of the series of differential amplifiers so as to realize a selective and progressive waveform re-shaping of the link-distorted signal pulses.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: September 4, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee
  • Publication number: 20070091995
    Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.
    Type: Application
    Filed: October 9, 2006
    Publication date: April 26, 2007
    Applicant: SCINTERA NETWORKS, INC.
    Inventors: Edem Ibragimov, Qian Yu, Prashant Choudhary
  • Patent number: 7203233
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: April 10, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
  • Publication number: 20070064845
    Abstract: A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.
    Type: Application
    Filed: October 26, 2006
    Publication date: March 22, 2007
    Applicant: SCINTERA NETWORKS, INC.
    Inventors: Abhijit Phanse, Abhijit Shanbhag
  • Patent number: 7190226
    Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: March 13, 2007
    Assignee: Scintera Networks
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee
  • Patent number: 7170349
    Abstract: T-coil structures are used in one embodiment to inject programmably-variable amounts of transistor biasing currents into the respective drains of current sinking transistor means of a broadband differential amplifier such that, when the differential amplifier is in common mode, total transistor drain current will exceed total voltage-dropping current passing through corresponding voltage-dropping resistances of the amplifier's transistor means. The T-coil structures keep the parasitic capacitances of the programmable current sources that provide the bias currents de-lumped from capacitances of the amplifier's output nodes and/or capacitances of the amplifier's voltage-dropping resistances (variable resistances) to thereby maintain a wide bandwidth.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: January 30, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee
  • Patent number: 7170274
    Abstract: A bandgap reference includes a current source providing a current that is proportional to the sum of a first voltage having a positive-to-absolute-temperature (PTAT) temperature dependency and a second voltage having a complementary-to-absolute-temperature (CTAT) dependency. The bandgap reference further includes a variable resistor comprising a fixed resistor that may be selectively combined with one or more of a plurality of selectable resistors, wherein the first voltage is inversely proportional to the resistance of the variable resistor.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: January 30, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Abhijit Phanse
  • Patent number: 7130366
    Abstract: A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: October 31, 2006
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit Phanse, Abhijit G. Shanbhag
  • Patent number: 7120193
    Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: October 10, 2006
    Assignee: Scintera Networks, Inc.
    Inventors: Edem Ibragimov, Qian Yu, Prashant Choudhary
  • Patent number: 7078969
    Abstract: A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0?r?1 and such that a second input voltage may be multiplied by the complement factor (1?r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: July 18, 2006
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse
  • Patent number: 7061978
    Abstract: In accordance with the presently claimed invention, compensation for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: June 13, 2006
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit G. Shanbhag, Abhijit M. Phanse
  • Patent number: 7053688
    Abstract: A low-voltage constrained coefficient adaptation and multiplication is provided. To provide the constrained coefficient adaptation, an adder adds an adaptive differential control voltage to a forcing differential control voltage to provide an effective coefficient. The adder is configured such that the forcing differential control voltage can prevent the adaptive differential control voltage from producing a sign change in the effective coefficient.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: May 30, 2006
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Abhijit Phanse
  • Publication number: 20060104342
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Application
    Filed: November 21, 2005
    Publication date: May 18, 2006
    Applicant: Scintera Networks, Inc.
    Inventors: Abhijit Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian